Multiphase Coupled and Integrated Inductors With Printed Circuit Board (PCB) Windings For Power Factor Correction (PFC) Converters
Multiphase Coupled and Integrated Inductors With Printed Circuit Board (PCB) Windings For Power Factor Correction (PFC) Converters
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Patent Application Publication Oct. 12, 2017 Sheet 8 of 20 US 2017/0294833 A1
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Patent Application Publication Oct. 12 , 2017 Sheet 14 of 20 US 2017 /0294833 A1
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Patent Application Publication Oct. 12, 2017 Sheet 18 of 20 US 2017 /0294833 A1
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Patent Application Publication Oct. 12, 2017 Sheet 19 of 20 US 2017/0294833 A1
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Patent Application Publication Oct. 12, 2017 Sheet 20 of 20 US 2017/0294833 A1
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US 2017 /0294833 A1 Oct. 12 , 2017
MULTIPHASE COUPLED AND INTEGRATED ogy of a boost PFC converter is complex and , hence , more
INDUCTORS WITH PRINTED CIRCUIT expensive to produce than other PFC converter topologies .
BOARD (PCB ) WINDINGS FOR POWER 10005 ]. For example , a so - called totem - pole PFC converter
FACTOR CORRECTION (PFC ) is far simpler than a boost converter or other bridgeless PFC
CONVERTERS converter topologies. While totem -pole topologies were not
practical in the past due to the reverse recovery performance
CROSS -REFERENCE TO RELATED of the body diodes of switches included therein , that prob
APPLICATIONS lem is ameliorated with GaN switches currently available ;
[ 0001] This application claims benefit of priority of U .S . increasing interest in this simplified topology . However,
Provisional Application 62/ 321,250 , filed Apr. 12 , 2016 , several intractable problems with the totem -pole PFC con
verter topology remain : large frequency excursions during
which is hereby incorporated by reference in its entirety . half- cycles of the input line frequency AC voltage and the
FIELD OF THE INVENTION inability to achieve zero voltage switching over the entirety
of an input voltage half-cycle ; both ofwhich engender large
[0002] The present invention generally relates to high losses and limit efficiency .
efficiency direct and inverse coupled multiphase inductor 0006 ] The concept of using coupled inductors has been
structures suitable for being fabricated with printed circuit widely applied in multiphase voltage regulator modules
board (PCB ) windings, particularly for use in high power (VRMs, as distinct from PFC converters ) to limit losses and
density power factor correction (PFC ) power converters and improve transient response . The concept of coupled induc
which reduce or eliminate common mode (CM ) noise reflec tors has also been evaluated in interleaved CRM boost PFC
tion to the power source . converters . However , no solution to the frequency excursion
and problems in achieving ZVS switching in totem - pole
BACKGROUND OF THE INVENTION PFC converters have been previously found . Additionally , in
interleaved multiphase PFC converters with coupled induc
[ 0003] A power factor correction (PFC ) converter is an tors, the input current ripple, which has an impact on
essential component of power converter structures that differential mode (DM ) noise , is determined by the leakage
derive power from an alternating current (AC ) source such inductance of the coupled inductor and , since the leakage
as the power distribution network or grid. The power factor inductance is smaller than the leakage inductance of the
correction function serves to prevent phase changes due to non - coupled inductors, the DM noise will be larger. Reduc
variation in load current from being reflected to the AC tion of common mode (CM ) noise by balancing techniques
source and to maintain high efficiency by insuring that in some types of power converters is also known . However,
power is transferred to a load substantially in phase with the it is not known if balancing techniques can be applied to
instantaneous voltage provided by the AC power source . reduce or eliminate CM noise problems in totem -pole PFC
This function is generally accomplished by switching that is converters or if suitable balancing techniques are consistent
varied in frequency and /or duty cycle with themagnitude of with compact coupled inductor structures , especially of the
the voltage provided by the AC power source . PCB winding type.
[0004] There are several trade-offs in the design of physi
cal PFC converters, particularly in regard to efficiency, SUMMARY OF THE INVENTION
filtering of switching noise and power density ( e .g . the
amount of power that can be provided to a load per unit of 100071. It is therefore an object of the present invention to
volume of the PFC converter ). In general, a nominal (or provide a an interleaved multiphase totem pole PFC con
minimum ) operating frequency is chosen to be in a range verter capable of reducing non -ZVS losses and reducing
below several hundred KHz. At such switching frequencies , average switching frequency with corresponding reduction
the PFC converter component requires about one- third of the in switching losses .
volume of an AC /DC converting power supply for the [0008 ] It is another object of the invention to provide a
necessary switches, EMI switching noise filter, inductors simplified PFC converter of reduced complexity and cost
and filter capacitor to provide power factor correction . which reduces non -ZVS switching losses and provides
Increasing the switching frequency can reduce the volumeof reduction in bot DM and CM noise .
a PFC converter and raise the corner frequency of the EMI [0009] It is a further object of the invention to provide a
filter and PFC converter to reduce overall power converter compact, light weight bi -directional power converter par
size . However, increased switching frequency substantially ticularly suitable for charging batteries and controlling pro
increases switching power losses, particularly due to the pulsion power for electrically powered vehicles.
high turn -on losses for cascade gallium nitride (GaN ) [0010 ] It is yet another object of the present invention to
devices currently preferred for high power applications . provide a compact, integrated coupled inductor structure
Such high turn - on losses can be overcome by a critical suitable for use in a totem -pole PFC converter with either
conduction control method (CRM ) in which switches are direct or inverse coupling and having PCB windings.
controlled to draw power from a source when inductor [0011 ] In order to accomplish these and other objects of
current reaches zero and turned off a fixed time later which the invention , a power converter is provided including a
is preferred for that reason and referred to as constant plurality of switches wherein the switches are controlled in
on -time (COT) control. Additionally , losses due to reverse a manner to provide a switching cycle , and an inductor
recovery of the power diode in a CRM boost PFC converter structure including at least two inductors wherein the at least
may be reduced through use of zero current switching two inductors are magnetically coupled with each other to
(ZCS ). Higher possible power factor and reduced peak present at least three different equivalent inductance values
inductor current are other advantages that can be obtained during the switching cycle and wherein windings of each of
from a CRM boost PFC converter. Unfortunately, the topol- the at least two inductors are formed of printed circuit board
US 2017 /0294833 A1 Oct. 12 , 2017
layers which are interleaved to provide at least one layer of [0032 ] FIGS. 16 and 17 are a schematic PCB coupled
each winding among layers of another of the at least two inductor structure with interleaving on an EI core and a
windings. simulation of magnetic flux in the left leg of FIG . 16 ,
[ 0012 ] In accordance with another aspect of the invention , respectively,
an inductor structure is provided including at least two [0033 ] FIGS . 18 and 19 are a schematic variant PCB
inductors wherein the at least two inductors are magnetically coupled inductor structure with interleaving on an El core
coupled with each other to present at least three different and a simulation ofmagnetic flux in the left leg of FIG . 18 ,
equivalent inductance values during a switching cycle and respectively ,
wherein windings of each of the at least two inductors are
formed of printed circuit board layers which are interleaved [0034 ] FIG . 20 is a schematic PCB coupled inductor
to provide at least one layer of each winding among layers structure with interleaving on an El core similar to FIG . 18
of another of the at least two windings. but including balancing windings ,
[0035 ] FIG . 21 is a schematic diagram of a proposed 6 .6
BRIEF DESCRIPTION OF THE DRAWINGS kW bi-directional on -board charger for the battery of an
[ 0013] The foregoing and other objects, aspects and electric vehicle ,
advantages will be better understood from the following [0036 ] FIG . 22 is a schematic diagram of a PFC converter
detailed description of a preferred embodiment of the inven having a direct or positive coupled inductor,
tion with reference to the drawings, in which : [0037 ] FIG . 23 illustrates waveforms of the direct or
[ 0014] FIG . 1 is a graph of switching frequency variation positive coupled inductor of FIG . 22 ,
over a one- half cycle time of a line frequency AC input
voltage (half line cycle), [0038 ] FIG . 24 illustrates variation in steady state induc
10015 ]. FIG . 2 is a schematic diagram of an interleaved tance over a half line cycle for different output voltages,
totem - pole PFC circuit with a coupled inductor, [0039 ] FIG . 25 illustrates switching frequency variation
[0016 ]. FIG . 2A is a schematic diagram of a single phase during a half line cycle for the PFC converter of FIG . 22 ,
totem -pole power converter useful for understanding the
operation of FIG . 2 , 10040 ] FIG . 26 illustrates an input current waveform com
parison between direct or positive coupled inductor and
[ 00171 FIGS. 2B , 2C , 2D , 2E and 2F are waveforms useful non - coupled inductors ,
for understanding the operation of FIGS. 2 and 2A ,
[0018 ] FIGS. 3A and 3B illustrate inductor current wave 0041] FIG . 27 illustrates an input current DM noise
forms at different duty cycles, D , for the circuit of FIG . 2 , comparison between direct or positive coupled inductor and
[ 0019 ] FIG . 4 is a graph of steady - state inductance value non -coupled inductors , and
variance over a half line cycle of an AC input voltage over [0042 ] FIG . 28 is a schematic illustration of a PCB direct
a range of coupling coefficients , or positive coupled inductor with balance .
[0020 ] FIG . 5 is a graph of switching frequency variance
over a half line cycle of an AC input voltage over a range of DETAILED DESCRIPTION OF A PREFERRED
coupling coefficients, EMBODIMENT OF THE INVENTION
[0021] FIGS. 6A and 6B are graphs of calculated DM
noise and preferred switching frequency variation , respec 10043 ] Referring now to the drawings , and more particu
tively over a range of coupling coefficients, larly to FIG . 1 , there is shown a graph of the switching
[0022 ] FIG . 7 is a schematic diagram of the circuit of FIG . frequency of a CRM totem -pole PFC converter over a half
2 with a balancing technique applied , line cycle of input voltage . The operating principle of CRM
[ 0023] FIGS. 8A and 8B are schematic diagrams of a CM PFC converters , regardless of converter topology, is well
noise model and a CM noise model for either of the voltage known . Ideally, when a switch is closed to draw power from
sources of the model of FIG . 8A , respectively, the input power source , the inductor current will increase
[ 0024 ] FIG . 9A is a schematic diagram of an improved and substantially linearly . When the switch is turned off , for
preferred balance technique of the circuit of FIG . 7, example , after a fixed time period in a so -called constant
[0025 ] FIG . 9B in a model of amagnetic structure suitable on - time (COT) mode of operation , the inductor current will
for use in the circuit of FIG . 9A , decrease substantially linearly . When the inductor current
[0026 ] FIGS. 10A and 10B are schematic diagrams of a reaches zero , the switch is again turned on and the switching
CM noise model and a CM noise model for either of the cycle is repeated . Thus, the inductor current will ideally be
voltage sources of the model of FIG . 8A , respectively, a series of triangular waves with a variable maximum
employing the magnetic circuit of FIGS. 9A and 9B , current given by
[0027 ] FIG . 11 is a schematic diagram of a model of the ipk =(Vin/L)* Ton (1 )
magnetic circuit of FIG . 9B ,
[0028] FIG . 12 is an equivalent circuit of the model of which varies with the sinusoidal variation of input voltage
FIG . 11 , and a minimum current of zero . Due to the substantial
[0029 ] FIGS. 13A and 13B illustrate unbalanced and bal linearity of the increase and decrease of inductor current, the
anced waveforms of a simulation of the operation of the period of each triangular inductor current waveform also
circuit of FIG . 10A , respectively, varies sinusoidally, resulting in a sinusoidal variation in
[0030 ] FIG . 14 is a graphic illustration of the CM noise switching frequency over a half line cycle . That is, as long
reduction achieved by the invention , as Ton is fixed , the peak current follows Vin and the resulting
[ 0031] FIG . 15 is a schematic diagram of a PCB coupled variation in switching frequency at any instant during a half
inductor structure using a UI core . line cycle can be calculated as
US 2017 /0294833 A1 Oct. 12 , 2017
a < 0 and Vds can reach zero and ZVS can be achieved for The same analysis can be performed for Vyz, yielding
a significantly larger range of Vin another balance inductor as shown in FIG . 9A in which the
0052]. Thus it is seen that the coupled inductor can assist balance inductors are labeled Lz and L4. It should be noted
in achieving ZVS when the input voltage is higher than 0 .5 that the CM noise is not impacted by themutual inductance .
V , when the duty cycle is small and can reduce non - ZVS [0056 ] At high frequencies where the currents in the
losses by as much as 50 % . Conversely , the reduction in parasitic capacitances are larger, better balance can be
circulating energy and reduction in duration of resonance obtained if the balance inductor L , is coupled with the
when the input voltage is less than 0 .5 V , and the duty cycle original inductor Ly. Thus, for the coupled inductors L , and
is large can substantially reduce conduction losses. L2, two coupled balance inductors, Lz and L4, are applied as
[0053 ] In an interleaved totem -pole PFC converter, the shown in FIG . 9A . The coupling of the inductors to and
input current ripple is determined by L . . . The input current between the balance inductors is illustrated by curved lines
ripple will impact the differential mode (DM ) noise of the in FIGS. 9A and 10A . A suitable magnetic structure to
PFC converter. Since Les is necessarily larger than the provide the coupling of the inductors is shown in FIG . 9B .
inductance of the non - coupled inductor, the DM noise is The CM noise model is schematically illustrated in FIG .
necessarily reduced in comparison; allowing the switching 10A and , as before , the effect of either noise voltage source ,
frequency to be slightly raised in the central region as shown alone , is modeled in FIG . 10B . The balance condition for the
in FIG . 6B without alteration of the filter configuration or circuit of FIG . 10B is:
characteristic (e .g . 80 dB /decade) as shown in FIG . 6A Zd/2 = (Ca + Cb)/ Cd (8 )
which is a plot of DM noise as a function of frequency for
the converter with non -coupled inductors and coupled [0057 ] As in the above analysis , Z _ Z must be calculated
inductors for a plurality of coupling factors. As can be first. It is assumed that L , and Lz are perfectly coupled as are
observed , DM (and CM noise increases slightly with L2 and L4 and that the number of turns of L? and L is N , and
increasing coupling factor. However, it can be seen from the number of turns of Lz and L4 is N2. Thus, for a balanced
FIG . 6B that other than the small central region and the small condition of Vni:
regions at the ends of the half line cycle period , the switch V1/V2= N ,/N2,
ing frequency is very much reduced compared with the
non -coupled case ; significantly reducing average switching V2/V4 = -N1/N2
frequency and further reducing switching losses while not
complicating DM noise filtering arrangements . V3V4 = V2, and
[ 0054 ] A balancing technique has been used to reduce or
substantially eliminate common mode (CM ) noise in an iq = i2
interleaved boost PFC converter. The inventors have found from which the ratio of Z /Z can be derived as:
that such a balancing technique can also be applied to as (10 )
totem -pole PFC converter with a coupled inductor . Refer ZZA =( V / VV -ix)=( N + N20N2 .
ring now to FIG . 7 , an extra inductor can be added to the Thus, the balance condition is :
circuit shown in FIG . 2 to achieve balance . The CM noise Ny/N2= C ;/ Cd (11)
model is shown in FIG . 8A . The slew rates (dv /dt) of the
active devices /switches are the dominant sources of CM which is also the balance condition for VN2. As long as this
noise and are modeled in FIG . 8A as separate noise sources , balance is achieved , CM noise is minimized in the totem
Vpi and Vn2. Under superposition theory, the effect of each pole PFC converter.
CM noise source can be analyzed independently of the other [0058 ] It will be recalled from the above analysis of the
as shown in FIG . 8B including only noise source Vy . Cb is performance of the inverse coupled inductor circuit of FIG .
the parasitic capacitance between the output terminal and 2 , that the equivalent inductances Legi - Leg4 were derived
ground . Cd is the drain to ground capacitance of the from the two coupled inductor circuit structure. In the case
switches. The balance condition is of the circuit of FIG . 10A , there are four inductors coupled
Za/Zb = (Cd + Cb)/Cd. (4) together. The equivalent inductances for the four coupled
inductor structure can be similarly derived by modeling the
[0055 ] In order to balance this equation , Za/ Zb must first magnetic circuit as shown in FIG . 11. The equivalent circuit
be calculated . From the circuit of FIG . 8B the following is shown in FIG . 12 . From the magnetic circuit of FIG . 11 ,
equations can be obtained : the inductance matrix can be derived as :
dii , (5 )
V1 = di Lk + d(i1di+12) M N21
1 a« Ni2 " ?i (12 )
TABLE 1
Veql = V1 + V3 + V4 (13)
Veg2 = V2 + 13 + 14 DC Winding AC Winding Core loss Total loss
loss (W ) loss (W ) (W ) (W )
From equations ( 12 ) and ( 13 ), Vegl and Veg2 can be 0.7 1.6 2.3 4.6
expressed as
[0060 ] A first PCB winding structure suitable for practice
of the invention is schematically shown in cross -section in
[Papa=LIC( N02++ 22((11 ++ a ))N1N2,NÎN2++ 2211( 1++ aa))NZNÉ) in
Vegl = L d
* (14)
(14 )
FIG . 15 using a UI core . This structure uses only the two
inductors as in the non - balanced embodiment of FIG . 2 . To
21(007+24 +0%,Na+24+698) 9
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NÎ
reduce the average switching frequency as much as possible
a large coupling coefficient of a = - 0.7 was chosen .However,
since a typical El core cannot support such a high coupling
|Vep2 = LI( N² + 241 +a))N/N2+ 241 +a)NŽ) dia +
eq2 =
( 1 + a ) N , N2
factor with separate PCB - type windings , a UI core was used
for this structure .
41 @ N } + 2(1 + a )N1NA
NPN2. + 2(1 + a )N ? J) didi
TABLE 2
DC Winding AC Winding Core loss Total loss
If it is assumed that loss (W ) loss ( W ) (W ) (W )
0 .5 6.2 1.3 8.0
Ni + 2(1 + a )N1N2 + 2 (1 + a )NŽ ( 15 )
NÎ It can be seen that this coupled inductor structure has a high
Meq == L11( @ N ? + 2 (1 + a )N1N2 + 2( 1 + a )N? AC winding loss and much increased total loss compared
meq NN ]? with the non -coupled inductors even though DC and core
losses are reduced . The increased AC loss is due to eddy
currents in the PCB winding.
the four inductor circuit of FIG . 10 can be simplified as the [0061] To reduce the AC winding loss a second embodi
two inductor structure of FIG . 2 in which the self-inductance ment of a PCB coupled inductor structure is schematically
is Leg and the mutual inductance is Meg . To verify the illustrated in FIG . 16 . This structure is formed on an El core
validity of this assumption , a circuit was simulated in which and includes two turns of each winding interleaved in the
Leg and Meg of the four inductor balanced circuit were made winding layers of the other winding . The interleaving of
equal to L and M of the two inductor unbalanced circuit, turns of respective windings on an El-type core raises the
respectively . The waveforms of the simulation of the bal coupling factor to be the same as the UI- type core of the
anced and non -balanced circuits are identical as shown in previously described embodiment. Table 3 contains a break
FIGS . 13A and 13B , respectively . A comparison of the down of the losses for this coupled inductor structure .
simulated CM noise in the balanced and non -balanced TABLE 3
circuits is shown in FIG . 14 from which it is seen that DC Winding AC Winding
balancing the inverse coupled inductors as discussed above Core loss Total loss
loss ( W ) loss ( W ) (W )
provides a 30 db reduction in CM noise. 0 .5 2.6 1.9 5.0
[0059] To achieve volume reduction in power converters
to achieve an increase in power density forming windings in
multi- layer printed circuit boards (PCBs ) has been investi With this interleaved PCB winding structure, AC winding
gated and found to facilitate control of parasitic capaci loss was greatly reduced but the total loss is still significantly
higher than the non -coupled structure . FIG . 17 shows results
tances . However, some increase in loss of efficiency has of a finite element analysis (FEA ) simulation which reveals
been observed and the acceptability of PCB windings is a strong fringing flux ( as dark regions ) near the air gap
largely a matter of whether economic advantage of fabrica between the two parts of the EI core .
tion and material cost of such structures makes the loss of [0062 ] Fringing flux can be reduced by cutting the wind
efficiency tolerable and whether or not particular PCB ing near the air gap and spacing the cut parts of the winding
structure can be found that sufficiently limit such losses in in different layers at an increased distance from the air gap .
efficiency . To evaluate possible PCB structures, non -coupled The layers of the respective windings remain interleaved as
inductors suitable for a 1 KW converter were constructed in the second embodiment. The resulting third PCB winding
using two ER23 with ten turn windings of 250 - 46 Litz wire . structure embodiment is schematically illustrated in FIG . 18
A breakdown of observed losses is shown in Table 1 which and results of the FEA flux simulation is shown in FIG . 19
provides a baseline of inductor size and loss for comparison The loss breakdown for this embodiment is shown in Table
with several possible PCB winding structures.
US 2017 /0294833 A1 Oct. 12 , 2017
Table 6 provides a comparison of losses of the interleaved 2 . The power converter as recited in claim 1 , wherein said
PCB winding with a Litz wire wound embodiment suitable power converter has a multiphase totem - pole topology .
for a 6 KW converter such as in the electric vehicle battery 3 . The power converter as recited in claim 2 , wherein said
charger described above. While there is a significant power converter is a two-phase power converter.
increase of total losses , the PCB winding embodiment is 4 . The power converter as recited in claim 1 , wherein at
susceptible of automatic manufacture at reduced cost ; in least one said winding of at least one said printed circuit
view of which , the increased losses are very acceptable. board layer is split to form at least two turns on said winding .
TABLE 6
5 . The power converter as recited in claim 1, wherein at
least one said layer of said at least one printed circuit board
Winding Core Loss Total Loss layer forms a single turn of at least one said winding , said
loss ( W ) (W ) (W ) winding being spaced from a core by a distance greater than
a spacing of a winding that is split to form at least two turns .
Interleaved
PCB winding
19 17 3636 6 . The power converter as recited in claim 1 , wherein at
non -coupled
Litz Wire
13 25
25 least two of said layers of said at least one inductor form a
single turn of at least two said windings, said two windings
inductor being separate windings and spaced from a core by a
distance greater than a spacing of a winding that is split to
CM and DM noise are also reduced with the PCB winding form at least two turns.
structure due to the PCB structure facilitating control of 7 . The power converter as recited in claim 1 wherein said
parasitic capacitances Balancing for DM and CM noise at least two inductors are formed on an El- shaped core .
reduction is unnecessary in many applications for which 8 . The power converter as recited in claim 1 , wherein said
positive inductor coupling would be advantageous . at least two said inductors are positively coupled .
[0071] In view of the foregoing, it is seen that the inven 9 . The power converter as recited in claim 1 , wherein said
tion provides an interleaved multiphase PFC power con at least two inductors are inversely coupled .
verter capable of reducing non - ZVS losses and reducing 10 . The power converter as recited in claim 1 , wherein
average switching frequency over a half line cycle below a said switches are operated for power factor correction at a
nominal switching frequency which may thus be increased nominal switching frequency of at least 1 MHZ at a mid
to simplify and reduce size, weightand cost of EMIfiltering . point of a half line cycle .
These meritorious effects are achieved through positive or 11 . The power converter as recited in claim 1, wherein
inverse coupling of inductors of the respective phases that said at least two inductors include at least two inductors
presents at least three different equivalent inductances dur coupled to said at least two inductors for balancing parasitic
ing different portions of a switching cycle and which can be capacitances of said inductor structure .
balanced to substantially reduce DM and CM noise . The 12. An inductor structure including at least two inductors
coupled inductor structure can be constructed with printed wherein said at least two inductors are magnetically coupled
circuit board coils and can be automatically manufactured with each other to present one or more equivalent inductance
with very little loss of efficiency compared with wire wind values which are different from a value of either of said at
ings and facilitation of control of parasitic capacitances. The least two inductors and wherein windings of each of said at
basic principles of the invention can be applied to power least two inductors are formed of printed circuit board layers
converters of any number of phases and are appropriate to which are interleaved to provide at least one layer of each
many applications such as bidirectional power converters for winding among layers of another of said at least two
battery charging and control of propulsion power in electri windings.
cally powered vehicles or local power generation arrange 13. The inductor structure as recited in claim 12 , wherein
ments such as wind turbines . at least one said winding of at least one said printed circuit
10072 ] While the invention has been described in terms of board layer is split to form at least two turns of at least one
a single preferred embodiment, those skilled in the art will said winding.
recognize that the invention can be practiced with modifi 14 . The inductor structure as recited in claim 12 , wherein
cation within the spirit and scope of the appended claims. at least one said layer of said at least one printed circuit
Having thus described our invention , what we claim as board layer forms a single turn of at least one said winding ,
new and desire to secure by Letters Patent is as follows: said single turn being spaced from a core by a distance
1 . A power converter including greater than a spacing of a winding that is split to form at
a plurality of switches wherein said switches are con least two turns.
trolled in a manner to provide a switching cycle , and 15 . The inductor structure as recited in claim 12, wherein
an inductor structure including at least two inductors at least two of said layers of said at least one printed circuit
wherein said at least two inductors are magnetically board layer forms a single turn of at least two said windings,
coupled with each other to present one ormore equiva said two windings being separate windings and spaced from
lent inductance values differing from an inductance a core by a distance greater than a spacing of a winding that
value of either of said at least two inductances in series is split to form at least two turns .
with said plurality of switches during said switching 16 . The inductor structure as recited in claim 12 , wherein
cycle and wherein windings of each of said at least two said at least two inductors are formed on a Ul-shaped core .
inductors are formed of printed circuit board layers 17 . The inductor structure as recited in claim 12 wherein
which are interleaved to provide at least one layer of said at least two inductors are formed on an El- shaped core .
each winding among layers of another of said at least 18 . The inductor structure as recited in claim 12 , wherein
two windings. said at least two inductors are positively coupled .
US 2017 /0294833 A1 Oct. 12 , 2017