Scribd
Upload
187 views28 pages

Combinational Circuits Lab Assessment

This document contains a lab assignment for a digital logic and microprocessor course. It consists of 15 tasks involving designing and verifying combinational logic circuits like logic gates, multiplexers, decoders, adders, and subtractors using truth tables and the Multisim simulation tool. The final task involves designing a circuit to set a warning signal based on inputs from sensors indicating the engine status, door status, seat occupancy, and seat belt fastening.

Uploaded by

RANJITHKUMAR S
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
187 views28 pages

Combinational Circuits Lab Assessment

This document contains a lab assignment for a digital logic and microprocessor course. It consists of 15 tasks involving designing and verifying combinational logic circuits like logic gates, multiplexers, decoders, adders, and subtractors using truth tables and the Multisim simulation tool. The final task involves designing a circuit to set a warning signal based on inputs from sensors indicating the engine status, door status, seat occupancy, and seat belt fastening.

Uploaded by

RANJITHKUMAR S
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

School of Information Technology and Engineering (SITE)

Course: SWE1003- Digital Logic & Microprocessor Lab


Assessment 1: Combinational Circuits
NAME:Ranjithkumar.s
REGISTER NUMBER:21MIS0460

1. Verification of Logic gates


a) Verify the working of OR gate with its truth table

1
b) Verify the working of AND gate with its truth table

2
c) Verify the working of NOT gate with its truth table

3
d) Verify the working of NAND gate with its truth table

4
e) Verify the working of NOR gate with its truth table

5
f) Verify the working of X- OR gate with its truth table

6
g) Verify the working of X-NOR gate with its truth table

7
2. Verification of Boolean Expressions
a) X+X’Y=X+Y

8
b) X’+XY=X’+Y

9
c) AB+A’C+BC=AB+A’C

10
3. Simplify the expression to minimum number of literals and verify the
simplified
expression experimentally
a) (a + b + c’)(a’+ b’ + c)

11
b) (x + y) (x + y’)

12
4. Reduce the following Boolean expressions to the indicated number of
literals:
a) A’C’ + ABC + AC’ to three literals

13
b) (A’ + C) (A’ + C’) (A + B + C’D) to four literals

14
5. Write the following Boolean expressions in Standard Sum of Products form:
(b + d)(a’ + b’ + c)

15
6. Write the following Boolean expression in Standard Product of Sums form:
a'b + a ‘c ‘ + abc

16
7. Simplify the following Boolean functions:

17
a) F(A, B, C, D) = Π(1, 3, 5, 7, 13, 15)

b) F(A, B, C, D) = Σ(1, 3, 6, 9, 11, 12, 14)

18
8. Simplify the following functions, and implement them NAND and NOR gate
circuits:
F(A, B, C, D) = AC’D’ + A’C + ABC + AB’C + A’C’D’

19
NAND GATE:

NOR GATE:

20
9. Design a Half adder and verify the circuit using Multisim.

21
10. Design a Full adder and verify the circuit using Multisim.

22
11. Design a Half Subtractor and verify the circuit using Multisim.

23
12. Design a Full Subtractor and verify the circuit using Multisim.

13. Implement the following function using 8x1 Multiplexer


F(A,B,C,D)=Σ (0,1,3,4,8,9,15)

24
25
14. Design a 3x8 decoder and verify the circuit using Multisim.

26
15. You are asked to design the following circuit for your car. The warning
signal W should be set to high voltage (logical 1) if:
a) the engine is running and door is open; or
b) With the engine running, somebody is sitting in the driver‟s seat and the
belt is not fastened.
Otherwise output of the circuit is „0‟. The circuit should rely on the
following
sensors:
sensors from engine(C=„1‟ if engine is running, otherwise it is „0‟)
Seat sensor (S=1 if somebody is sitting on the seat, otherwise „0‟)
Door sensor (D=1 if the door is closed, otherwise „0‟)
Belt sensor (B=1 if the belt is fastened, otherwise „0‟)

27
*********************************************************************************************
>>>>>>>>>>>>>>>>>>>>>>>>>>>>======<<<<<<<<<<<<<<<<<<<<<<<<<<<<

28

You might also like