DESIGN CONSIDERATIONS FOR HIGH

PERFORMANCE VERY LOW FREQUENCY FILTERS

Josh Silva-Martinez and Sergio Solis-Bustos National Institute of Astrophysics Optics and Electronics Electronics Department Integrated Circuits Design Group P O Box 51 and 216 Puebla, Puebla 72000, Mhxico
ABSTRACT
This paper deals with the design of very low frequency continuous time filters based on Operational Transconductance Amplifiers (OTAs). Design techniques for both high-performance OTAs and large capacitors are presented. Very small transconductance OTAs with low noise levels and small harmonic distortion components are discussed. Large capacitors are implemented by using impedance scalers based on current mirrors. Design strategies and simulated results for a sixth order 1Hz lowpass filter are presented. analog process, are presented. At the end of the paper some conclusions are addressed.
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OTA FOR LOW FREQUENCY APPLICATIONS

INTRODUCTION

The voltage to current converter can generate huge harmonic distortion components; then it is mandatory to employ linearized input stages. It has been shown that voltage to current conversions can efficiently be realized using transistors biased in linear region with large saturation voltages [3,4]. If further transconductance reductions are required, current division [6]techniques can also be used. The basic idea of the current division technique is shown in Figure 1.

High-performance very low frequency filters are commonly required in medical equipment. For ECGs, pacemakers and other applications high order filters with cutoff frequencies in the range of 1Hz-100 Hz are required. Typically signals to be processed are in the range of 1OOpV - 100mV [1,2]. Due to silicon area limitations, practical capacitances are limited to be below 50pF. Hence, for the implementation of a 1Hz pole, transconductances in the order of 0.3 nA/V are required. The implementation of transconductances below 1nA f V is not trivial, especially if other design specifications such as low noise level, low distortion, high dynamic range and limited silicon area must be satisfied. In this paper, design techniques for the implementation of very large time

constants are presented. It is shown that using both linearized OTAs based on current division techniques and impedance scalers, very low frequency filters can be efficiently designed. In section 2, design techniques for linear OTAs with reduced transconductance are discussed. Special attention is paid to reduce the harmonic distortion components and to increase the dynamic range. It is well known that low noise integrators require large capacitors; techniques for the emulation of very large capacitors are discussed in section 3. In section 4, results for a sixth order 1Hz lowpass filter, designed in a 1.2pm CMOS
0-7803-5471-0/99/$10.0001999 IEEE

Figure 1: Current division technique for low frequency voltage to current converters. If the small signal transconductances are such that >> QoMR and M = > 1, then the input > voltage Z I D S M R ( = Z I ~ v2) is converted to current by the linear biased transistor MR, and this current is collected by MM and M1. In these expressions Q m M M and g m M 1 are the small signal transconductances of MM and M1, respectively, and Q o M R is the conductance of MR. Because the small signal transconductances are such that
QmMM

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gmMM

> g m M l then Only an small part of the current > is collected at the OTA output. It can be easily shown that the OTA small signal transconductance becomes
If the basic integrator is considered, computations for the integrated input referred noise voltage leads to

where p n , Cox and VT are the mobility of the carriers in the channel, the gate-channel capacitance and the threshold voltage, respectively. VG and V C M ( = are ~ ) ~ the gate and common-mode voltages, respectively. W and L are the width and length of the gate, respectively. In accordance to equation 1, the small signal transconductance can be reduced by increasing M and reducing the saturation voltage VDSAT(= - VCM VT). VG The current division principle has been used for the design of the OTA used in this work, shown in Figure 2. The small signal transconductance, Gm = is adjusted by controlling the drain-source voltage of MC. The linear biased transistor MR is split into two transistors and its gate voltage is related to the common source voltage; as a result of this the transconductance is little sensitive to the common-mode input voltage.

w,

vDD
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where C L is the load capacitance. According to this result, the noise level can be reduced if CL is increased, and both g m M l and g m M N are reduced. In order to reduce harmonic distortion components, it is convenient that MR transistors realize the voltage to current conversion. For a proper conversion it is desirable to keep g m 2 5 g o M R . In reference [4], it has been ~ ~ shown that the Third order Harmonic Distortion (HD3) of the MOSFET biased in linear region is inversely proportional to VDSAT, then it can not be further reduced. A rule of thumb for low distortion applications is to keep V D ~ A> 2 V D S M A X , where VD:;MAX the maximum T is input voltage. Further reductions on the small signal transconductance can be obtained if current cancellation techniques are used [5,6:1. Nevertheless, these techniques make the topology very sensitive to transistor mismatches because the use of partial positive feedback [6]. The small signal transconductance can also be reduced by using current mirrors [7]. The basic principle behind this approach is to attenuate the current by using current attenuators, in that case the OTA becomes a two-stage amplifier, and both noise level and offset voltage increase.
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I I

DESIGN TECHNIQUES FOR LARGE CAPACITORS

The effective impedance of a system is inversely proportional to the input current, if more current is generated by the same voltage, then the equivalent impedance is reduced; for capacitors, the equivalent capacitance is increased. If the current of a capacitor is sampled, ampliFigure 2: OTA for low frequency applications. fied and fedback to the input the equivalent capacitance is scaled up by the current amplification factor [8]. The Since the circuits are designed for very low frequency principle is shown in Figure 3. applications, the flicker noise components must be reIn accordance with Figure 3(a), if the small signal duced to a few microvolts; this can be done by using transconductance of the diode connected transistor is P-channel transistors and increasing the gate area of the large enough the equivalent impedance becomes critical transistors. Thermal noise components represent also a fundamental limit for the noise level. The noise contributions of the transistors MBP, MM alnd MR are I. 22. -. 3 = __(4) reduced by the current division factor; the most impor22 s ( N + 1)C; tant noise sources are due to transistors M1 and MN. If If N>1 and accounting the noise sources, it can be M > 1, where M = > and Q m M M >> goh..fR, it can be shown that the output referred thermal noise current found that the scaler's output referred thermal noise current is is approximately given by

e,

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For a proper frequency operation of the impedance scaler it is desirable to place >10 wp (or g m M S l > *), see Figure 3(a). It can be observed that g m M s l must be increased for a proper circuit operation, unfortuIf the basic integrator is considered, the integrated input nately the noise level of the impedance scaler increases. This trade-off can be overcome if cascode transistors are referred noise voltage can be computed as follows used, as shown in Figure 3(b). In this structure the main noise components and the frequency operation of the impedance scaler are almost independent. It can be easily shown that the noise level of the impedance scaler of Figure 3(b) is directly proportional to the small signal transconductances of transistors MB1 and MP1, while the main pole of the impedance scaler is related to the z is the integrator's unity gain fre- small signal transconductance of the cascode transistor where wp(= quency, Ci is the capacitor used in the impedance scaler, MC. k is the Boltzmann constant and T the temperature. From equation 6 it can be observed that the noise level is not related to the scaled capacitor CL but to Ci. It is 4 SIMULATED RESULTS clear that for low noise applications, it is also necessary to increment the value of the basic capacitor. Accord- The sixth order 1Hz lowpass filter is implemented by ing to equations 3 and 6, the fundamental noise level is using OTA-C design techniques. In order to minimize mainly due to the impedance scaler. the sensitivities, the filter is based on a double terminated RLC prototype. For the implementation of the singled ended filter, eigth 1.3nAJV transconductance OTAs are employed. The capacitors are in the range of 48.6pF - 500pF, and are implemented by using six impedance scalers combined with 25 pF capacitors. The magnitude response for both ideal and the OTA-C filter using the impedance scaler of Figure 3(b) are shown in Figure 4.

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VDD

om

0.10 Frequency

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1. om

Figure 4: Magnitude response for both ideal and OTA-C filter. Montecarlo analyses for the filter, with 2 % transistor mismatches and 5 % VTO tolerances are shown in Figure 5. Note in this figure that the filter is little sensitive t o (b) transistor mismatches and process parameters tolerances. Figure 3: Scaling U a grounded capacitance: a) Basic P The input referred noise voltage, integrated from circuit, b) Capacitance scaler using a cascode transistor. 10mHz to 1Hz, is around 250 pV. The HD3 is lower
vss

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than -60 dB for input signals up to 200 mV. Additional results for the filter are summarized in Table 1.

REFERENCES
[l]J. D. Bronzino, The Biomedical Engineering Handbook, IEEE and CRC Press, 1995.

[2] L. J . Istotts, Introduction to Implantable Biomedical IC Design, IEEE Circuits and. Devices Magazine, pp. 12-18, January 1989. [3] J. Silva-Martinez, M. Steyaert and W. Sansen, A Large-Signal Very Low Distortion Transconductor for High Frequency Applications,IEEE J. of Solid State Circuits, vol. SC-26, pp. 946-955, July 1991. [4] M. Banu and Y. Tsividis, Fully Integrated Active RC Filters in MOS Technology, IEEE Journal of Solid State Circuits, vol. SC-18, No. 6, pp.644-651, December 1983. Cancellation for Oper[5] P. Garde, LLTransconductance ational Amplifiers, IEEE Journal of Solid-state Circuits, vol. SC-12, pp. 310-311, June 1977. [61 J. Silva-Martinez and J. Salcedo-Suiier, IC Voltage to Current; Transducers with Very Small Transconductaince, Analog Integrated Circuits and Signal processing, vol. 13, pp. 285-293, July 1997. [7] P.Kinget, M. Steyaert and J. Van Der Spiegel, Full Analog CMOS Integration of Very Large Time Constants for Synaptic Transfer in Neural Networks , Analog Integrated Circuits and Signal Processing, vol. 2, no. 4 pp. 281-295, 1992.

0.01

0.10

1.w

10.00

Frequency [Hzl

Figure 5 : Montecarlo analyses for the OTA-C: filter magnitude response.

Parameter Bandwidth Integrated Noise HD3 Q Vi, = 100mV Dvnamic Ranne Q HD3 < -60 dB * PSRR, Q0.5~z PSRR, VSS @ 0.5Hz Power Consumption Power Supply

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I
F Z

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CDD

250pV -75 dB 58 dB

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kl.5V

Table 1: Simulated results for the 6 t h order 1Hz filter.

[8] J.
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CONCLUSIONS

Techniques for the design of very low frequency continuous time filters have been presented. Special attention has been paid in the design of low distortion OTAs. Also, impedance scalers are used for the implementation of large capacitances. The tradeoffs involved in the design of very low frequency filters are further discussed. It has been shown that combining these techniques, the implementation of high-performance very low frequency filters is feasible.

Silva-Martinez and A. Vdzquez-Gonzalez, Impedance Scalers for IC Active Filters, IEEE Proc. ISCAS-98, Monterey, vol. 1, pp. 151-153, May 1998

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