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UNZA Digital Electronics Exam 2022

This document contains the exam for the course Digital Electronics at the University of Zambia School of Engineering. The exam consists of 7 questions worth 20 marks each, covering topics like binary, hexadecimal, and excess-3 number systems; Boolean algebra and logic circuits; VHDL code; frequency division circuits; state machines; and microprocessor components and memory. Students are instructed to answer any 5 of the 7 questions within the allotted 3 hours.

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0% found this document useful (0 votes)
228 views6 pages

UNZA Digital Electronics Exam 2022

This document contains the exam for the course Digital Electronics at the University of Zambia School of Engineering. The exam consists of 7 questions worth 20 marks each, covering topics like binary, hexadecimal, and excess-3 number systems; Boolean algebra and logic circuits; VHDL code; frequency division circuits; state machines; and microprocessor components and memory. Students are instructed to answer any 5 of the 7 questions within the allotted 3 hours.

Uploaded by

Billy Mulenga
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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THE UNIVERSITY OF ZAMBIA

SCHOOL OF ENGINEERING
DEPARTMENT OF ELECTRICAL & ELECTRONIC
ENGINEERING
UNIVERSITY MID-YEAR EXAMINATIONS

JULY 2022

EEE 3131
DIGITAL ELECTRONICS

Time: Three (3) hours.

Answer any five (5) questions.


All questions carry equal marks (20 marks each)
QUESTION 1

1.1 Find the decimal equivalent of the following binary numbers expressed in the 2’s
complement format:
(a) 00001110 [2 marks]
(b) 10001110 [3 marks]
1.2 Find the octal equivalent of 73.7510 [2 marks]
1.3 Find the hexadecimal equivalent of 82.2510 [2 marks]
1.4 Find the binary equivalent of the decimal number 13.375 [2 marks]
1.5 Find the excess-3 code of 237. [2 marks]
1.6 Determine the binary equivalent of the hexadecimal number 16 5F [2 marks]
1.7 What is the binary result of 1112 x 1012? [2 marks]
1.8 Divide (100.0001)2 by (10.1)2 correctly to two binary places [3 marks]

[Total: 20 Marks]

QUESTION 2
2.1 In a car security system, we usually want to connect the siren in such a way that the siren
will activate when it is triggered by one or more sensors. In addition, there will be a master
switch to turn the system on or off. Let us assume that there is a car door switch D, a
vibration detector switch V, and the master switch M. We will use the convention that when
the door is opened D = 1, otherwise, D = 0. Similarly, when the car is being shaken, V = 1,
otherwise, V = 0. Thus, we want the siren S to turn on, that is, set S = 1, when either D = 1
or V = 1, or when both D = 1and V = 1, but only for when the system is turned on, that is,
when M = 1. However, when we turn off the system, and either enter or drive the car, we do
not want the siren to turn on. Hence, when M = 0, it does not matter what values D and V
have, the siren should remain off.

Given the above description of a car security system, build a digital circuit that meets the
specifications. Start by constructing a truth table, extract and simplify the equation then
construct the logic circuit.
[4+2+4=10 marks]

2.2 Use karnaugh map to simplify the Boolean expression:


Y  ABC  ABC  ABCD  ABCD [4 marks]

2.3 Derive the Boolean expression and the truth table of the circuit given in Fig 2.1.

[2+4=6 marks]

[Total: 20 Marks]

1
Fig 2.1

Question 3
3.1 Using the four variable minterm Boolean expression below:
Y  ABCD  ABCD  ABCD  ABCD  ABCD  ABCD  ABCD  ABCD
Draw the minterm karnaugh map. [6 marks]
3.2 From the karnaugh map above, extract the minimized expression. [2 marks]
3.3 State two advantages of Integrated Circuits (IC). [4 marks]
3.4 Define Noise margin with regards to logic families. [2 marks]

3.5 What is the main advantage that CMOS logic families have over bipolar logic families?
[2 marks]
3.6 How many inputs of a low-power Schottky TTL NAND can be reliably driven from a
single output of a Schottky TTL NAND, given the following relevant specifications for
the devices of two TTL subfamilies: [4 marks]
Schottky TTL: IOH=1.0 mA; IIH= 0.05 mA; IOL=20.0 mA; IIL=2.0mA
Low-power Schottky TTL: IOH=0.4 mA; IIH= 0.02 mA; IOL=8.0 mA; IIL=0.4mA
[Total: 20 Marks]

2
Question 4
4.1 Study the VHDL code given in Fig 4.1 carefully and draw the logic circuit represented
by the code. [8 marks]
4.2 Draw the truth table of the circuit extracted above. [6 marks]
4.3 Design a circuit to convert 4-bit binary code to 4-bit gray code. [3 marks]
4.4 Design a circuit to convert 4-bit gray code to 4-bit binary code. [3 marks]

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY New_Dawn IS PORT (
x, y, z: IN STD_LOGIC;
a, b, c, d, e, f, g, h: OUT STD_LOGIC);
END New_Dawn;

ARCHITECTURE Bally OF New_Dawn IS


BEGIN
h <= (NOT x) AND (NOT y) AND (NOT z);
g <= (NOT x) AND (NOT y) AND z;
f <= (NOT x) AND y AND (NOT z);
e <= (NOT x) AND y AND z;
d <= x AND (NOT y) AND (NOT z);
c <= x AND (NOT y) AND z;
b <= x AND y AND (NOT z);
a <= x AND y AND z;
END Bally;

Fig 4.1
[Total: 20 marks]

Question 5
5.1 Design a circuit that will convert a 2-MHz input frequency into a 0.4-MHz output
frequency. [6 marks]

5.2 Differentiate between:


(a) Synchronous and asynchronous inputs; [2 marks]

(b) level-triggered and edge-triggered flip-flops; [2 marks]

(c) Active LOW and active HIGH inputs. [2 marks]

3
5.3 Construct the truth table for a full-subtractor. [8 marks]

[Total: 20marks]

Question 6
6.1 Using the diagram of the state machine in Fig 6.1, extract the Equations for Anext, Bnext
and output Y.
[3+3+2= 8 marks]
6.2 Using the same diagram of Fig 6.1, develop the State Table of the given state machine.
[12 marks]
[Total: 20 Marks]

Fig 6.1

4
Question 7
7.1 Name any five (5) components of an 8085 Microprocessor. [5 marks]
7.2 Name the three buses used by the Microprocessor to communicate with other devices and
state what each bus is used for. [6 marks]
7.3 State two advantages that Dynamic RAM has over Static RAM. [2 marks]
7.4 Name any three types of ROM. [3 marks]
7.5 Using Fig 7.1 and assuming that the closed base of the transistor represents a ‘1’ and the
open base represents a ‘0’. Write the truth table that shows the memory addresses and
their respective content. [4 marks]
[Total: 20 Marks]

Fig 7.1

End of Exam, Best Wishes!!!

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