SYSTOLIC ARCHITECTURE program counter.
Because a systolic array usually sends and receives multiple data
streams, and multiple data counters are needed to generate these data streams, it
A network of PEs that rhythmically produces and pass data through the system is supports data parallelism.
called systolic architecture. It is used as a co-processor in combination with a host
A systolic array is a network of processors that rhythmically compute and pass
computer and the behavior is analogous to the flow of blood through heart; thus
data through the system. They derived their name from drawing an analogy to how
named SYSTOLIC.
blood rhythmically flows through a biological heart as the data flows from memory
· A systolic architecture has the following characteristics: in a rhythmic fashion passing through many elements before it returns to memory.
It is also an example of pipelining along with parallel computing. It was introduced
A massive and non-centralized parallelism in 1970s and was used by Intel to make CMU’s iWarp processor in 1990.
Local communications In a systolic array there are a large number of identical simple processors or
Synchronous evaluation processing elements(PEs) that are arranged in a well organized structure such as
linear or two dimensional array. Each processing element is connected with the
· Example of systolic network other PEs and has a limited private storage.
Characteristics:
1. Linear network
1. Parallel Computing –
2. Bi-dimensional network Many processes are carried out simultaneously. As the arrays have a non-
centralized structure, parallel computing is implemented.
3. Hexagonal network 2. Pipelinability–
It means that the array can achieve high speed. It shows a linear rate
Architecture pipelinability.
3. Synchronous evaluation –
A systolic array typically consists of a large monolithic network of primitive Computation of data is timed by a global clock and then the data is passed
computing nodes which can be hardwired or software configured for a specific through the [Link] global clock synchronizes the array and has fixed
application. The nodes are usually fixed and identical, while the interconnect is length clock cycles.
programmable. The more general wavefront processors, by contrast, employ 4. Repetability–
sophisticated and individually programmable nodes which may or may not be Most of the arrays have the repetition and interconnection of a single type of
monolithic, depending on the array size and design parameters. The other PE in the entire network.
distinction is that systolic arrays rely on synchronous data transfers, 5. Spatial Locality –
while wavefront tend to work asynchronously. The cells have a local communication interconnection.
Unlike the more common Von Neumann architecture, where program execution 6. Temporal Locality –
follows a script of instructions stored in common memory, addressed and One unit time delay is at least required for the transmission of signals from
sequenced under the control of the CPU's program counter (PC), the individual one cell to another.
nodes within a systolic array are triggered by the arrival of new data and always 7. Modularity and regularity –
process the data in exactly the same way. The actual processing within each node A systolic array consists of processing units that are modular and have
may be hard wired or block microcoded, in which case the common node homogeneous interconnection and the computer network can be extended
personality can be block programmable. indefinitely.
The systolic array paradigm with data-streams driven by data counters, is the Advantages of Systolic array –
It employs high degree of parallelism and can sustain a very high throughput.
counterpart of the Von Neumann architecture with instruction-stream driven by a
These are highly compact, robust and efficient.
Data and control flow are simple and regular.
Disadvantages of Systolic array –
They are highly specialized and thus are inflexible regarding the problems
they can solve.
These are difficult to build.
These are expensive.
