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Assignment LAB2

This laboratory manual document describes Experiment 2 on designing and implementing universal gates. The objectives are to design NAND and NOR gates using DSCH 3 and Microwind 3.1 software and observe the output waveforms. The document outlines the theory of universal gates, equipment used, procedures to design the gates in the software, display the layouts and output waveforms, and analyze the results against the truth tables. The conclusion is that the NAND and NOR logic gate circuits were designed using the software tools, simulations were run to obtain the input-output timing diagrams, and the output waveforms were verified against the truth tables.

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88 views12 pages

Assignment LAB2

This laboratory manual document describes Experiment 2 on designing and implementing universal gates. The objectives are to design NAND and NOR gates using DSCH 3 and Microwind 3.1 software and observe the output waveforms. The document outlines the theory of universal gates, equipment used, procedures to design the gates in the software, display the layouts and output waveforms, and analyze the results against the truth tables. The conclusion is that the NAND and NOR logic gate circuits were designed using the software tools, simulations were run to obtain the input-output timing diagrams, and the output waveforms were verified against the truth tables.

Uploaded by

midun
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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FACULTY OF ENGINEERING AND BUILT ENVIRONMENT

ADVANCED VLSI DESIGN


MEE 1123

LABORATORY MANUAL
EXPERIMENT 2

STUDENT NAME :MIDUN MOHANAN

STUDENT ID :01252301331

PROGRAMME : MASTERS IN ELECTRICAL AND ELECTRONICS

SEMESTER :1
FACULTY OF ENGINEERING AND BUILT
ENVIRONMENT

EXPERIMENT 2 (CLO 6, PLO 2):


THE DESIGN AND IMPLEMENTATION OF UNIVERSAL GATES.

1.0 Objectives

1. Design and implementation of Universal Gates – NAND & NOR.


2. To show the output waveform using DSCH 3 and MICROWIND 3.1.

2.0 Equipment
Software: DSCH 3 and MICROWIND 3.1
3.0 Theory
A universal gate is a gate which can implement any Boolean function without need to use any other gate type. The NAND and NOR gates are
universal gates. In practice, this is advantageous since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in
all IC digital logic families.

Logic Symbol & Truth Table:

NAND Gate
NOR Gate

4.0 Procedure

1. Design the CMOS circuit diagram for NAND & NOR gates in DSCH (Schematic Editor) and run the simulation to obtain timing diagram for
input and output by referring the following CMOS circuit diagram:
2 input NAND Gate 2 input NOR Gate

2. Display the layout of DSCH schematic diagram.


3. Display the output results for DSCH schematic simulation.
4. Draw the layout design using the schematic (NAND & NOR) as reference in Microwind software tool.
5. Run the simulation to obtain the timing diagram of input and output.
6. Display the layout design of NAND & NOR.
7. Display the output results for Microwind simulation.
8. Analyse the simulation result with truth table in stated in theory parts.

5.0 Conclusion
By using DSCH and Microwind software, circuit layout of NAND and NOR logic gate is prepared, simulation carried
out to obtain the timing diagram of inputs and outputs and output waveform verified as per truth table.
DSCH-NAND GATE
CIRCUIT
NAND GATE-OUTPUT WAVE
FORM
DSCH-NOR GATE
CIRCUIT
OUTPUT WAVE
FORM-
NOR GATE
MICROWIND-NAND GATE
CIRCUIT
MICROWIND-NAND GATE
OUTPUT
WAVEFORM
MICROWIND-NOR GATE
CIRCUIT
MICROWIND-NOR GATE
OUTPUT
WAVEFORM

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