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collect! 19 methods and

techniques for converting 5V to
3.3V level
lillian Lee
AC DC & DC DC converter , wireless module . switching power supply 54 artículos Seguir
,IC , electronics

21 de febrero de 2023

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Tip 1, Use LDO regulator to supply power from 5V power supply to 3.3V
system

A standard three-terminal linear regulator typically has a dropout voltage of 2.0-

3.0V. They cannot be used to reliably convert 5V to 3.3V. Low Dropout (LDO)
regulators with a dropout voltage of a few hundred millivolts are ideal for this
application. Figure 1-1 is a block diagram of a basic LDO system with the
corresponding currents labeled. As can be seen from the figure, the LDO consists
of four main parts:

1. Turn on the transistor

2. Band gap reference source

3. Operational amplifier

4. Feedback resistor divider

When choosing an LDO, it is important to know how to differentiate the various

LDOs. The device's quiescent current, package size and type are important device
parameters. Depending on the specific application to determine various
parameters, the optimal design will be obtained.

The quiescent current IQ of the LDO is the ground current IGND of the device
when the device is operating with no load. IGND is the current used by the LDO for
regulation. When IOUT>>IQ, the efficiency of the LDO can be approximated by
dividing the output voltage by the input voltage. However, at light loads, IQ must
be factored into the efficiency calculation. LDOs with lower IQ have higher light
load efficiency. Increased light load efficiency has a negative impact on LDO
performance. LDOs with higher quiescent current respond faster to sudden line
and load changes.

Tip 2, Low Cost Power Supply System Using Zener Diodes

A low-cost regulator scheme using Zener diodes is detailed here.

A simple low-cost 3.3V regulator can be made with Zener diodes and resistors, as
shown in Figure 2-1. In many applications, this circuit can be a cost-effective
replacement for an LDO regulator. However, this regulator is more load sensitive
than an LDO regulator. Also, it is less energy efficient because R1 and D1 always
have power dissipation. R1 limits the current into D1 and the PICmicro® MCU to
keep VDD within the allowable range. Since the reverse voltage of the Zener diode
changes as the current through it changes, the value of R1 needs to be carefully
considered.

R1 is chosen so that at maximum load—typically when the PICmicro MCU is

running and driving its output high—the voltage drop across R1 is low enough that
the PICmicro MCU has enough voltage to maintain operation. Also, at minimum
load—usually when the PICmicro MCU is in reset—VDD does not exceed the
power rating of the Zener diode, nor does it exceed the maximum VDD of the
PICmicro MCU.

Tip 3, Lower cost power supply system using 3 rectifier diodes

Figure 3-1 details a lower cost regulator solution using 3 rectifier diodes.

We can also put several regular switching diodes in series and use their forward
voltage drop to reduce the voltage going into the PICmicro MCU. That's even less
than the cost of a zener diode regulator. The current consumption of this design is
usually lower than that of circuits using Zener diodes

The number of diodes required varies according to the forward voltage of the
diodes chosen. The voltage drop across diodes D1-D3 is a function of the current
through these diodes. R1 is connected to prevent the voltage on the PICmicro
MCU VDD pin from exceeding the maximum VDD value of the PICmicro MCU
during hours of minimal load—typically when the PICmicro MCU is in reset or sleep
state. Depending on the other circuits connected to VDD, the value of R1 can be
increased, or R1 may not be required at all. Diodes D1-D3 are chosen so that at
maximum load—typically when the PICmicro MCU is running and driving its output
high—the voltage drop across D1-D3 is low enough to meet the minimum VDD
requirement of the PICmicro MCU.

Tip 4, Using a Switching Regulator to Power a 3.3V System from a 5V Supply

As shown in Figure 4-1, a buck switching regulator is an inductor-based converter

used to step down an input voltage source to a lower-amplitude output voltage.
Output regulation is achieved by controlling the conduction (ON) time of MOSFET
Q1. Since the MOSFET is either in a low-impedance state or in a high-impedance
state (ON and OFF, respectively), high input source voltages are efficiently
converted to lower output voltages.

By balancing the voltage-time of the inductor while Q1 is in these two states, the
relationship between the input and output voltages can be established.

For MOSFET Q1, we have:

When choosing the value of the inductor, it is a good initial choice to make the
inductor's maximum peak-to-peak ripple current equal to ten percent of the
maximum load current.

When selecting the output capacitor value, a good initial value is to make the LC
filter characteristic impedance equal to the load resistance. In this way, if the load
is suddenly removed during full-load operation, the voltage overshoot can be
within an acceptable range.

When choosing diode D1, choose a component with a current rating high enough
to withstand the inductor current during pulse cycle (IL) discharge.

digital connection

When connecting two devices with different operating voltages, it is necessary to

know their respective output and input thresholds. Once the threshold is known,
the method of attaching the device can be chosen based on the other
requirements of the application. Table 4-1 is the output and input thresholds used
in this document. When designing your connections, be sure to refer to the
manufacturer's data sheet for actual threshold levels.

Tip 5, 3.3V → 5V direct connection

The easiest and most ideal way to connect a 3.3V output to a 5V input is a direct
connection. Direct connection needs to meet the following 2 requirements:

• VOH of 3.3V output is greater than VIH of 5V input

• VOL of 3.3V output is less than VIL of 5V input

One example where this approach can be used is connecting a 3.3V LVCMOS
output to a 5V TTL input. From the values given in Table 4-1 it is clear that the
above requirements are met.

VOH (3.0V) of 3.3V LVCMOS is greater than VIH (2.0V) of 5V TTL and

VOL (0.5V) of 3.3V LVCMOS is less than VIL (0.8V) of 5V TTL.

If these two requirements are not met, additional circuitry is required to connect
the two parts. See Tips 6, 7, 8, and 13 for possible solutions.

Tip 6, 3.3V→5V Using MOSFET Converter

If the VIH of a 5V input is higher than the VOH of a 3.3V CMOS device, additional
circuitry is required to drive any such 5V input. Figure 6-1 shows a low-cost two-
component solution.

When choosing the resistance value of R1, two parameters need to be considered,
namely: the switching speed of the input and the current consumption on R1.
When switching the input from 0 to 1, account for the input rise time due to the RC
time constant formed by R1, the input capacitance of the 5V input, and any stray
capacitance on the board. The input switching speed can be calculated by the
following formula:

Since the input capacitive reactance and stray capacitance on the board are fixed,
the only way to increase the input switching speed is to reduce the value of R1.
Reducing the resistance of R1 to obtain a shorter switching time is at the expense
of increasing the current consumption when the 5V input is low. Typically,
switching to 0 is much faster than switching to 1 because the on-resistance of the
N-channel MOSFET is much smaller than that of R1. Also, when selecting an N-
channel FET, the VGS of the selected FET should be lower than the VOH of the
3.3V output.

Tip 7, 3.3V→5V using diode compensation

Table 7-1 lists the input voltage thresholds for 5V CMOS, and the output drive
voltages for 3.3VLVTTL and LVCMOS.

From the above table it can be seen that both the high and low input voltage
thresholds of the 5V CMOS input are about one volt higher than the thresholds of
the 3.3V output. Therefore, even if the output from the 3.3V system could be
compensated, there would be little or no room for noise or component tolerances.
What is needed is a circuit that compensates the output and increases the
difference between the high and low output voltages.

Once the output voltage specification has been determined, it has been assumed
that the high output drives a load between the output and ground, and the low
output drives a load between 3.3V and the output. If the load for the high voltage
threshold is actually between the output and 3.3V, then the output voltage is
actually much higher because the mechanism pulling the output high is the load
resistor, not the output transistor.

If we design a diode compensation circuit (see Figure 7-1), the forward voltage of
diode D1 (typical value 0.7V) will make the output low voltage rise, and get 1.1V to
1.2V low voltage at 5V CMOS input. It is safely below the low input voltage
threshold of the 5V CMOS input. The output high voltage is determined by a pull-
up resistor and diode D2 to the 3.3V supply. This makes the output high voltage
approximately 0.7V above the 3.3V supply, or 4.0 to 4.1V, well above the 5V CMOS
input threshold (3.5V).

Note: For the circuit to work properly, the pull-up resistor must be significantly
smaller than the input resistance of the 5V CMOS input to avoid a drop in output
voltage due to the resistor divider effect at the input. The pull-up resistor must
also be large enough to ensure that the current loaded on the 3.3-V output is
within device specifications.

Tip 8, 3.3V→5V using a voltage comparator

The basic working of a comparator is as follows:

• When the inverting (-) input voltage is greater than the non-inverting (+) input
voltage, the comparator output switches to Vss.

• The output of the comparator is high when the voltage at the non-inverting (+)
input is greater than the voltage at the inverting (-) input.

To maintain the polarity of the 3.3V output, the 3.3V output must be connected to
the non-inverting input of the comparator. The inverting input of the comparator is
connected to the reference voltage determined by R1 and R2, as shown in Figure
8-1.

Calculate R1 and R2

The ratio of R1 and R2 depends on the logic level of the input signal. For a 3.3V
output, the inverting voltage should be placed at the midpoint voltage between
VOL and VOH. For LVCMOS output, the midpoint voltage is:

If the logic level relationship of R1 and R2 is as follows,

If the value of R2 is 1K, then R1 is 1.8K.

A properly connected op amp can be used as a comparator to convert a 3.3V input

signal to a 5V output signal. This takes advantage of the comparator's property
that the comparator forces the output high (VDD) or low (Vss) depending on the
magnitude of the voltage difference between the "inverting" input and the "non-
inverting" input.

Note: For the op amp to operate properly from a 5V supply, the output must have
rail-to-rail drive capability.

Tip 9, 5V→3.3V direct connection

Typical 5V output VOH is 4.7 volts, VOL is 0.4 volts; and typical 3.3V LVCMOS
input VIH is 0.7 x VDD, VIL is 0.2 x VDD.

When the 5V output is driven low, there is no problem because the 0.4V output is
less than the 0.8V input threshold. When the 5V output is high, the VOH of 4.7
volts is greater than the VIH of 2.1 volts, so, we can directly connect the two pins
without conflict, provided that the 3.3V CMOS output is 5 volt tolerant.

If the 3.3V CMOS input cannot tolerate 5 volts, there will be a problem because the
input's maximum voltage specification is exceeded. See Tips 10-13 for possible
solutions.

Tip 10, 5V→3.3V use diode clamp

Many manufacturers use clamping diodes to protect the device's I/O pins from
exceeding the maximum allowable voltage specification. Clamping diodes keep
the voltage on the pin from more than one diode drop below VSS or more than one
diode drop above VDD. To use clamping diodes to protect the input, the current
through the clamping diodes is still of concern. The current through the clamping
diode should always be small (on the order of microamps). If too much current
flows through the clamping diodes, there is a risk of component latch-up. Since
the source resistance of the 5V output is usually around 10Ω, a series resistor is
still required to limit the current flowing through the clamp diode, as shown in
Figure 10-1. A consequence of using a series resistor is that the input switching
speed is slowed because of the RC time constant formed on the pin (CL).

If a clamping diode is not available, an external diode can be added to the current
flow, as shown in Figure 10-2.

Tip 11, 5V→3.3V Active Clamp

One problem with using a diode clamp is that it will inject current into the 3.3V
supply. In a design with a high current 5V output and a lightly loaded 3.3V rail, this
current injection can push the 3.3V supply voltage beyond 3.3V. To avoid this
problem, a triode can be used instead, which directs excess output drive current to
ground instead of the 3.3V supply. The designed circuit is shown in Figure 11-1.

2111-1: 晶体管钳位

5V输出 3.3V4^

01 o3.3V

The base-emitter junction of Q1 performs the same function as the diode in the
diode clamp circuit. The difference is that only a few percent of the emitter current
flows out of the base into the 3.3V rail, and the vast majority of the current flows
into the collector, from which it flows harmlessly to ground. The ratio of base
current to collector current, determined by the current gain of the transistor,
typically 10-400, depending on the transistor used.

Tip 12, 5V → 3.3V Resistive Divide

A simple resistor divider can be used to step down the output of the 5V device to a
level suitable for the input of the 3.3V device. The equivalent circuit of this
interface is shown in Figure 12-1.

usually, The source resistance RS is very small (less than 10Ω), if the selected R1 is
much larger than RS, then the influence of RS on R1 can be ignored. At the
receiving end, the load resistance RL is very large (greater than 500 kΩ), if the
selected R2 is much smaller than RL, then the influence of RL on R2 can be
ignored.

There is a tradeoff between power consumption and transient time. To minimize

the power dissipation requirements of the interface current, the series resistors R1
and R2 should be as large as possible. However, the load capacitance (combined
by the stray capacitance CS and the input capacitance CL of the 3.3-V device)
may adversely affect the rise and fall times of the input signal. If R1 and R2 are too
large, the rise and fall times may be unacceptably long.

If the effects of RS and RL are neglected, the equations to determine R1 and R2

are given by Equation 12-1 below.

Equation 12-2 shows the formula for determining rise and fall times. To facilitate
circuit analysis, the Thevenin equivalent calculation is used to determine the
applied voltage VA and the series resistance R. The Thevenin equivalent
calculation is defined as the open circuit voltage divided by the short circuit
current. With the constraints imposed by Equation 12-2, for the circuit shown in
Figure 12-1, the Thevenin equivalent resistance R should be determined to be
0.66*R1 and the Thevenin equivalent voltage VA should be 0.66*VS.

For example, suppose the following conditions exist:

• Stray capacitance = 30 pF

• Load capacitance = 5 pF

• ≤ 1 µs maximum rise time from 0.3V to 3V

• Applied source voltage Vs = 5V

The calculation to determine the maximum resistance is shown in Equation 12-3.

Tip 13, 3.3V→5V Level Shifter

Although level translation can be done discretely, an integrated solution is

generally preferred. Level shifters are available in a wide range of applications:
unidirectional and bidirectional configurations, different voltage translations, and
different speeds allow the user to choose the best solution.

Board-level communication between devices (for example, MCU to peripherals) is

most common via SPI or I2C™. For SPI, a unidirectional level shifter is appropriate;
for I2C, a bidirectional solution is required. Figure 13-1 below shows both solutions.

simulation

The final challenge of the 3.3V to 5V interface is how to convert the analog signal
so that it crosses the power barrier. Low-level signals may not require external
circuitry, but systems that pass signals between 3.3V and 5V will be affected by
power supply variations. For example, in a 3.3V system, an ADC converts a 1V
peak analog signal with higher resolution than an ADC in a 5V system, because
more of the ADC's range is used for conversion in a 3.3V ADC. On the other hand,
the relatively high signal amplitudes in a 3.3V system may conflict with the
system's lower common-mode voltage limitations.

Therefore, to compensate for the above differences, some kind of interface

circuitry may be required. This section discusses interface circuits to help alleviate
the problem of signals transitioning between different power supplies.

Tip 14, 3.3V→5V Analog Gain Block

When connecting from a 3.3V supply to 5V, an analog voltage boost is required.
The 33 kΩ and 17 kΩ resistors set the gain of the op amp so that full scale is used
at both ends. The 11 kΩ resistor limits the current flowing back into the 3.3V
circuit.

Tip 15, 3.3V→5V Analog Compensation Module

This module is used to compensate the analog voltage from 3.3V to 5V

conversion. The following is to convert the analog voltage powered by 3.3V power
supply to be powered by 5V power supply. The 147 kΩ, 30.1 kΩ resistors and +5V
supply on the upper right are equivalent to a 0.85V voltage source with a 25 kΩ
resistor in series. This equivalent 25 kΩ resistor, three 25 kΩ resistors, and the op
amp form a difference amplifier with a gain of 1 V/V. The 0.85V equivalent voltage
source will shift any signal present at the input upward by the same amount; a
signal centered at 3.3V/2 = 1.65V will also be centered at 5.0V/2 = 2.50V. The
upper left resistor limits the current from the 5V circuit.

Tip 16, 5V→3.3V Active Analog Attenuator

This trick uses an op amp to attenuate signal amplitude from a 5V to 3.3V system.

The easiest way to convert a 5V analog signal to a 3.3V analog signal is to use a
resistor divider with an R1:R2 ratio of 1.7:3.3. However, there are some problems
with this approach.

1) The attenuator may be connected to a capacitive load, forming an undesired

low-pass filter.

2) An attenuator circuit may need to drive a low impedance load from a high
impedance source.

In either case, an op amp is needed to buffer the signal.

The required op amp circuit is a unity-gain follower (see Figure 16-1).

The output voltage of the circuit is the same as the voltage applied to the input.

To convert the 5V signal to a lower 3V signal, we just add a resistive attenuator.

If the resistor divider precedes the unity gain follower, it will provide the lowest
impedance for the 3.3V circuit. Also, the op amp can be powered from 3.3V, which
will save some power. Power dissipation on the 5V side can be minimized if X is
chosen to be very large.

If the attenuator is after the unity gain follower, then there is the highest
impedance to the 5V source. The op amp must be powered from 5V, the
impedance on the 3V side will depend on the value of R1||R2.

Tip 17, 5V→3.3V Analog Limiter

Attenuation can sometimes be used as gain when passing a 5V signal to a 3.3V

system. If the desired signal is less than 5V, then feeding the signal directly into
the 3.3V ADC will result in a larger conversion value. The danger arises when the
signal approaches 5V. Therefore, there is a need for a method of controlling
voltage overshoot while not affecting the voltage in the normal range. Three
implementation methods will be discussed here.

1. Use diodes to clamp overvoltage to 3.3V supply system.

2. Using Zener diodes, clamp the voltage to any desired voltage limit.

3. Use an op amp with a diode for accurate clamping.

The easiest way to do overvoltage clamping is exactly the same as connecting a

5V digital signal to a 3.3V digital signal. Use resistors and diodes to allow excess
current to flow into the 3.3V supply. Resistor values must be chosen to protect the
diodes and 3.3V supply without negatively impacting analog performance. This
type of clamping can cause the 3.3V supply voltage to rise if the impedance of the
3.3V supply is too low. Even though the 3.3V supply has a nice low impedance, this
type of clamping will make the input The signal adds noise to the 3.3V supply.

In order to prevent the input signal from affecting the power supply, or to make the
input more calm when dealing with large transient currents, a slight change to the
above method is used instead of a Zener diode. Zener diodes are usually slower
than the fast signal diodes used in the first circuit. However, Zener clamps are
generally more robust and do not depend on the characteristics of the power
supply when clamping. The size of the clamp depends on the current flowing
through the diode. This is determined by the value of R1. R1 may also be
unnecessary if the output impedance of the VIN source is large enough.
If more accurate overvoltage clamping independent of the power supply is
required, precision diodes can be obtained using op amps. The circuit is shown in
Figure 17-3. The op amp compensates for the forward voltage drop of the diode so
that the voltage is clamped exactly at the supply voltage at the non-inverting input
of the op amp. If the op amp is rail-to-rail, it can be powered by 3.3V.

Since the clamping is carried out through the op amp, it will not affect the power
supply.

The op amp does not improve the impedance that occurs in low voltage circuits,
the impedance is still R1 plus the source circuit impedance.

Tip 18, Driving Bipolar Transistors

When driving a bipolar transistor, the base "drive" current and the forward current
gain (Β/hFE) will determine how much current the transistor will sink. If the
transistor is driven by a microcontroller I/O port, use the port voltage and the
upper port current limit (20 mA typical) to calculate the base drive current. If using
3.3V technology, a lower value base current limiting resistor should be used
instead to ensure sufficient base drive current to saturate the transistor.

The value of RBASE depends on the microcontroller supply voltage. Equation 18-1
shows how RBASE is calculated.

If a bipolar transistor is used as a switch to turn on or off a load controlled by a

microcontroller I/O port pin, a minimum hFE specification and margin should be
used to ensure full saturation of the device.

3V technology example:

For both examples, it is good practice to increase the base current margin. Driving
a base current of 1 mA to 2 mA ensures saturation at the expense of increased
input power dissipation.

Tip 19, Driving N-Channel MOSFET Transistors

Care must be taken when selecting an external N-channel MOSFET for use with a
3.3V microcontroller. The MOSFET gate threshold voltage indicates the device's
ability to fully saturate. For 3.3V applications, select a MOSFET with an on-
resistance rating for a gate drive voltage of 3V or less. For example, a FET with a
rated drain current of 250 µA for a 100 mA load with a 3.3V drive will not
necessarily provide satisfactory results with 1V applied to the gate-source. When
transitioning from 5V to 3V technology, the gate-source threshold and on-
resistance characterization parameters should be carefully checked, as shown in
Figure 19-1. Slightly reducing the gate drive voltage can significantly reduce
leakage current.

For MOSFETs, low-threshold devices are common, with drain-to-source voltage

ratings below 30V. MOSFETs with a drain-source voltage rating greater than 30V
typically have a higher threshold voltage (VT). As shown in Table 19-1, the
threshold voltage of this 30V N-channel MOSFET switch is 0.6V. With 2.8V applied
to the gate, this MOSFET has a nominal resistance of 35mΩ, making it ideal for
3.3V applications.

For the specifications in the IRF7201 data sheet, the gate threshold voltage
minimum is specified as 1.0V. This does not mean that the device can be used to
switch current at 1.0V gate-source voltage, because for VGS(th) lower than 4.5V,
no specification is stated. The IRF7201 is not recommended for 3.3V driven
applications requiring low switch resistance, but it can be used for 5V driven
applications.

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