VEL TECH MULTI TECH Dr.RANAGARAJAN Dr.

SAKUNTHALA
ENGINEERING COLLEGE

(An Autonomous Institution)

Common for Department of Computer Science Engineering and Information Technology

Year: III Semester: V

Subject Code: 191EC511 Subject Name: Microprocessors & Microcontrollers

Question Bank
UNIT 1 – THE 8086 MICROPROCESSOR

Overview of Microprocessors, 8086 – Architecture, Signals, Addressing modes, Instruction set

assembler directives ,Assembly language programming , Stacks , Procedures ,Macros , Interrupts
and interrupt service routines , Introduction to advanced microprocessors..

Part A

K
QUESTIONS CO
S.No level
1 When was the first 8-bit microprocessor introduced? CO1.1 CL1
a.1969 b.1974 c.1979 d.1985
2 Which of the following are the three basic sections of a CO1.1 CL1
microprocessor unit?
a. Operand, Register, and ALU
b. Control and timing, Register and ALU
c. Control and timing, Register, and Memory
d. ALU, Memory, and Input/Output
3 In 8086, the address bus is ___ bits wide. CO1.1 CL1
[NPTEL]
a. 16 b. 18c. 20 d. 24
4 -----------represents the result when the system capacity is CO1.1 CL2
exceeded
a. Carry flag b. Auxiliary flag c. Trap flag d. Overflow flag
5 Calculate the physical address for the segment offset pair CO1.1 CL2
7213:5686
a.0C899H b.777B6H c.776B6H d.777B9H
6 The stack pointer register contains_____________ CO1.1 CL1
a. address of the stack segment
 b.pointer address of the stack segment
c. offset of address of stack segment
d. data present in the stack segment
7 Which of the following is not present in the bus interface CO1.1 CL2
unit?
a.Instruction queue b,Segment registers
c.Instruction pointer d. Flag register
8 ______ signal used to demultiplex the AD0-AD15 bus in CO1.2 CL1
8086 microprocessors.
a.ALEb.NMIc.READYd.VCC
9 In _______ state the CPU sends the address to memory of CO1.2 CL1
I/O and the ALE signal for demultiplexing
a.T1 b.T2 c.T3 d.T4
10 BHE of 8086 microprocessor signals is used to interface the CO1.2 CL1
________
a. I/O b.DMA c.even bank memory d.odd bank memory
11 If S’2= 0, S’1 = 1, S’0 = 1, what is the status of the CO1.2 CL1
microprocessor?
a. Interrupt Acknowledge b.Read I/O Port
c. Write I/O Port d. Halt
12 ________ address lines are multiplexed with status signals CO1.2 CL1
in 8086. [NPTEL]
a.A3-A0 b.A19-A16 c.A15-A0 d.A8-A0
13 Choose the addressing mode that executes its instructions CO1.3 CL2
within CPU with the necessity of reference memory for
operands.
a. Implied Mode b. Immediate Mode
c. Direct Mode d. Register Mode
14 The instruction, MOV AX,[BX] is an example of_________ CO1.3 CL2
a. direct addressing mode
b. register addressing mode
c. register relative addressing mode
d. register indirect addressing mode
15 The instruction, MOV AX, [2500H] is an example CO1.3 CL2
of_________[NPTEL]
a. immediate addressing mode b. direct addressing mode
c. indirect addressing mode d. register addressing mode
16 The instruction, MOV AX, 1234H is an example CO1.3 CL2
of__________[NPTEL]
a. register addressing mode b. direct addressing mode
c. immediate addressing mode d. based indexed addressing
mode
17 The instruction that is used as prefix to an instruction to CO1.4 CL2
execute it repeatedly until the CX register becomes zero
is____________
a. SCAS b. REP c. CMPS d. STOS
18 The wait instruction of 8086 checks the pin_________. CO1.4 CL1
[NPTEL]
a.BHE b. DEN c. HOLD d. TEST

19 The result of MOV AL, 65 is to ___________ CO1.4 CL2

a. store 0100 0010 in AL b. store 42H in AL
c. store 40H in AL d. store 0100 0001 in AL
20 In PUSH instruction, after each execution of the instruction, CO1.4 CL2
the stack pointer is_____________
a. incremented by 1 b. decremented by 1
c. incremented by 2 d. decremented by 2
21 The directive that updates the location counter to the next CO1.5 CL2
even address while executing a series of instructions is
a. ALIGN b. EVEN c. ORG d. EQU
22 The directive that directs the assembler to start the memory CO1.5 CL2
allotment for a particular segment/block/code from the
declared address is_____
a. OFFSET b. LABEL c. ORG d. GROUP

23 Stack follows the sequence of __________ CO1.7 CL1

a. first-in-first-out b. first-in-last-out
c. last-in-first-out d. last-in-last-out
24 The stack is accessed by using__________ CO1.7 CL1
a. SP register b. SS register
c. SP and SS register d. none of the above
25 Procedures are also known as_____________ CO1.7 CL1
a. macros b. segment c. subroutines d. none of the above
26 The time required for execution of a macro is ________ that CO1.7 CL1
of the procedure.
a. greater than b. less than c. equal to d. none of the above
27 If a number of instructions are repeating through the main CO1.7 CL1
program, then to reduce the length of the program,
__________ is used.
a. procedure b. Subroutine c. macro d. none of the above
28 The INTR interrupt may be masked using __________ CO1.8 CL1
a. direction flag b. overflow flag c. interrupt flag
d. sign flag
29 An interrupt breaks the execution of instructions and diverts CO1.8 CL1
its execution to__________
a. interrupt service routine b. control word register
c. execution unit d. control unit
30 Name the interrupt that has highest priority among all the CO1.8 CL1
internal interrupts .
a. keyboard interrupt b. TRAP c. NMI d. INT
31 Which interrupt in 8086 microprocessor has the highest CO1.8 CL2
priority?
 a. NMI b.DIV 0 c. Type 255 d. Over flow

Part B

K
S.No QUESTIONS CO
level
1 Examine the status of CY, AC, ZF flags for the following CO1.1 CL3
i) 89H+64 H , ii) 69- 3A H
2 Calculate the physical address of the memory locations CO1.1 CL3
referred by the following instructions, when DS=BC00H,
SI=0023H, BX=0012H
a)MOV AL,[SI] b) MOV [BX],DL
3 Can you identify the information conveyed by the Queue status CO1.2 CL1
signals QS0 and QS1 of 8086 in maximum mode.
4 If AX= 69H, CL=0, analyze the content of the AX and CY flag CO1.5 CL4
register after performing RCR, SAR in 8086 Microprocessor.
Assume CY =0.
5 Provide the sequence of instructions to combine two 32-bit CO1.6 CL4
integers using an 8086 microprocessor.
6 Specify the sequence of operation using instructions of 8086 to CO1.6 CL4
transfer a series of data words with a length of 0FH from offset
2000H to offset 3000H.
7 For 8086 Micro Processor, develop a code that executes a 2’s CO1.6 CL4
complement of a number.
8 Can you compare the operations of PUSH and POP with an CO1.7 CL4
example using 8086 instruction?

9 Calculate the physical address of the top of the stack, if the CO1.7 CL3
stack segment register contains 3000H and the stack pointer
register contains 8434H.
10 Discuss the significance of macros and procedures in CO 1.7 CL1
programming. Compare and contrast these two concepts in
terms of their purpose, benefits, and limitations. How macros
and procedures contribute to code reusability, modularity, and
overall code readability?.
11. Find out the address for the interrupt service routine for the CO1.8 CL3
instruction INT 20H. Also list the priorities of interrupt of 8086
microprocessor.
12. Mention some of advance microprocessor with its special CO1.9 CL1
features and applications
 PART C

K
S.No QUESTIONS CO
level
1 Show the blocks of registers and the processing units of 8086 CO1.2 CL2
processor associated for execution of an instruction ADD
AX,[5000H]
2 Introduce the concept of a pin diagram and its role in CO1.2 CL2
illustrating the physical layout of the microprocessor's external
connections. Emphasize the importance of understanding pin
functions for effective programming and interfacing with
external devices..
3 Form effective address for different addressing modes for the CO1.3 CL3
contents of registers given below,
OFFSET (displacement)=5000H
[AX]=1000H, [BX]=2000H, [SI]=3000H, [DI]=4000H,
[BP]=5000H, [SP]=6000H, [CS]=0000H, [DS]=1000H,
[SS]=2000H, [IP]=7000H. Also explain the modes with
examples.
4 Develop an algorithm and draw the flowchart to add the CO1.6 CL3
contents of the memory location 2000H: 0500H to contents of
3000H: 0600H and store the result in 5000h: 0700H using 8086
microprocessor.
5 Discuss the significance of assembler directives in CO1.6 CL2
microprocessor programming. Provide the contributions of the
following assembler directives in the assembly language
program.

(a)ASSUME (b) EXTERN (c) GLOBAL (d)OFFSET (e)

PROC (f) PUBLIC

6 For the array of number 05H,1BH,0CH, 0BH,07H , how do CO1.6 CL3

you find out the largest number with the help of 8086
instructions.
7 Create a program that add the elements of two matrices which CO1.6 CL3
contain 3rows and 3 columns .
8. Explore the various types of interrupts, their prioritization, and CO1.6 CL2
the role of interrupt vectors in establishing communication
between the hardware and software components
 UNIT 2 PERIPHERAL INTERFACING AND PROGRAMMING

Parallel communication interface, Serial communication interface, D/A and A/D Interface,
Timer, Keyboard /display controller, DMA controller, Traffic Light control interfacing
techniques.
Part A

K
S.No QUESTIONS CO
level
1 All the functions of the ports of 8255 are achieved by programming
the bits of an internal register called______________.
a) data bus control
CO2.1 CL1
b) read logic control
c) control word register
d) none of the above
2 Port C of 8255 can function independently as ______________.
a) input port
b) output port CO2.1 CL1
c) either input or output ports
d) both input and output ports
3 The strobed input/output mode is another name of
_______________.
a) mode 0
CO2.1 CL1
b) mode 1
c) mode 2
d) none of the above
4 What is the primary function of the Intel 8255 programmable
peripheral interface?
A) Analog-to-Digital Conversion
CO2.1 CL1
B) Digital-to-Analog Conversion
C) Parallel I/O interfacing
D) Serial Communication
5 In BSR (Bit Set/Reset) mode of the Intel 8255, which of the
following statements is true?
A) It allows individual bits in the control register to be set or reset.
CO2.1 CL2
B) It is used for analog-to-digital conversion.
C) It provides serial communication capabilities.
D) It is not a valid mode of operation for the 8255.
6 The feature of mode 2 of 8255 is___________________.
a) single 8-bit port is available
b) both inputs and outputs are latched CO2.1 CL1
c) port C is used for generating handshake signals
d) all of the mentioned
7 The signals that are provided to maintain proper data flow and
synchronization between the data transmitter and receiver
are__________.
a) handshaking signals CO2.2 CL1
b) control signals
c) input signals
d) none
8 The port that is used for the generation of handshake lines in mode
1 or mode 2 is__________________.
a) port A
CO2.2 CL1
b) port B
c) port C Lower
d) port C Upper
9 In 8251A, the pin that controls the rate at which the character is to
be transmitted is____________.
a) TXC(active low)
CO2.2 CL1
b) TXC(active high)
c) TXD(active low)
d) RXC(active low)
10 The signal that may be used either to interrupt the CPU or polled
by the CPU is__________________.
a) TXRDY(Transmitter ready)
CO2.2 CL1
b) RXRDY(Receiver ready output)
c) DSR(active low)
d) DTR(active low)
In ______________ the character synchronization can be achieved
internally or externally.
a) Synchronous
CO2.2 CL1
b) Asynchronous
c) Both a & b
d) None of the above
………. register must be initialized before any use of 8251.
a. Command word register
b. Control word register CO2.2 CL1
c. Mode word register
d. Both a & c
11 In asynchronous mode D7, D6 defines number of ………..bits.
a. Stop
b. Parity CO2.2 CL2
c. Character length
d. None of these
12 While programming the ADC0808/0809 IC ,what steps are
followed?
a) select the analog channel, start the conversion, monitor the CO2.3 CL1
conversion, display the digital results
b) select the analog channel, activate the ALE signal (L to H
 pulse), start the conversion, monitor the conversion, read the digital
results
c) select the analog channel, activate the ALE signal (H to L pulse),
start the conversion, monitor the conversion, read the digital results
d) select the channel, start the conversion, end the conversion
13 The time taken by the ADC from the active edge of SOC(start of
conversion) pulse till the active edge of EOC(end of conversion)
signal is called _______.
a) edge time CO2.3 CL1
b) conversion time
c) conversion delay
d) time delay
14 The procedure of algorithm for interfacing ADC
contain_____________.
a) ensuring stability of analog input
CO2.3 CL1
b) issuing start of conversion pulse to ADC
c) reading digital data output of ADC as equivalent digital output
d) all of the mentioned
15 DAC (Digital to Analog Converter) finds application
in______________
a) digitally controlled gains
CO2.4 CL1
b) motor speed controls
c) programmable gain amplifiers
d) all of the mentioned
16 The mode that is used to interrupt the processor by setting a
suitable terminal count is_______
a) mode 0
CO2.5 CL1
b) mode 1
c) mode 2
d) mode 3
17 The counter starts counting only if the _____________.
a) GATE signal is low
b) GATE signal is high CO2.5 CL1
c) CLK signal is low
d) CLK signal is high
18 In control word format, if RL1=1, RL0=1 then the operation
performed is_____________.
a) read/load least significant byte only
CO2.5 CL2
b) read/load most significant byte only
c) read/load LSB first and then MSB
d) read/load MSB first and then LSB
19 Intel’s programmable _________device (8253) facilitates the
generation of accurate time delays.
a) counter CO2.5 CL1
b) timer
c) both a & b
 d) none of these
20 The programmable timer device (8253) contains three independent
__________ bit counters.
a) 8
CO2.5 CL1
b) 16
c) 20
d) 32
21 .________ are used to scan the key board matrix and display digits.
a) SL₀-SL₃
b) RL₀-RL₃ CO2.6 CL1
c) CL₀-CL₃
d) All of these
22 The 8-byte FIFO RAM now acts as________ bit memory matrix.
a) 4*4
b) 4*8 CO2.6 CL1
c) 8*8
d) 8*4
23 The sensor RAM acts as 8-byte first-in-first-out RAM
in__________ mode.
a) keyboard
CO2.6 CL1
b) strobed input
c) keyboard and strobed input
d) scanned sensor matrix
24 ______ flag increments automatically after each read or write
operation to the display RAM.
a) IF
CO2.6 CL2
b) RF
c) AI
d) WF
25 Which type of transfer mode allows DMA to take control of the
bus for the entire duration of the transfer?

A) Cycle Stealing
CO2.7 CL2
B) Burst Mode

C) Block Transfer

D) Cycle Master
26 What does DMA stand for?

A) Direct Memory Access

CO2.7 CL2
B) Digital Memory Allocation

C) Data Management Algorithm

 D) Dynamic Memory Allocation
27 What is the primary purpose of a DMA controller in a computer
system?

A) To manage data transfers between the CPU and I/O devices.

CO2.7 CL2
B) To perform complex arithmetic operations.

C) To control the execution of instructions in the CPU.

D) To manage memory allocation for the operating system.

PART B

K
S.No QUESTIONS CO
level
1 Find the control word of the 8255 for the following configurations: CL3
All the ports of A, B, and C are output ports (mode 0). CO2.1
PA = in, PB = out, PCL = out, and PCH = out.
2 Can you provide the salient features of mode 0, mode1 and mode 3 CO2.1 CL1
of 8255.
3 Create a code to send a data string of 100 bytes in asynchronous CL3
mode as a transmitter with even parity enabled, two stop bits, an 8- CO2.2
bit character length, a frequency of 160 kHz, and a baud rate of 10K.
4 Prepare the 8251 in asynchronous mode with even parity enabled 2 CO2.2 CL2
stop bits, 8 bit character length with baud rate 16Xasychronous.
5 Illustrate status read instruction format of universal synchronous and CO2.2 CL2
asynchronous receiver transmitter.
6 Develop the steps involved in the principle of operation of analog to CO2.3 CL3
digital conversion.
7 How do you generate saw tooth waveform with the help of DAC CL3
interface using 8086 instructions?. CO2.4
8 Draw the output waveform rate generator and square wave generator CL2
of programmable interval timers CO2.5
9 Illustrate the control word format for 8254. CO2.5 CL2
10. Find the control word format to display a 16 bit character in right CO2.6 CL3
entry and encoded scan N Key roll over mode in 8279.
11. Draw the command word of prescalar and Read display RAM of CO2.6 CL2
keyboard and display controller.
12. Assume port A to control traffic from north to south while port B CO2.8 CL2
controls the traffic from west to east. Sketch the initialization table.
PART C

K
S.No QUESTIONS CO
level
1 Interface an 8255 with 8086 to work as an I/O port. Develop a code CL2
in simple I/O mode to configure (i) port A (Switch) as input and port CO2.1
B (LED) as output port (ii) port A (switch) as input port and store
the result in memory.
2 Discuss the internal architecture of programmable peripheral CL2
interface and the modes of operation of 8255. CO2.1
3 Analyze the functional components and interactions within the block CL2
diagram of Universal Synchronous / Asynchronous Receiver / CO2.2
Transmitter. How do these components collaborate to facilitate
serial communication?
4 Interface ADC 0808 with 8086 using 8255 ports. Develop a code to CL3
transfer digital data from ADC to the CPU and port C for control CO2.3
signals. Assume that an analog input is present at I/P 2 and port A of
8255 for transferring digital data.
ii) Interface DAC with an 8086 and develop a code to generate
square wave and triangular wave
5 Examine the architectural features of the 8254 programmable CL2
interval timer. Narrate its internal structure, highlighting the roles of CO2.5
its different counters and modes. Illustrate how the 8254 can be
employed in various applications, such as timekeeping, event
counting, and frequency generation.
6 Interface keyboard and display controller with 8086, develop a code CL3
to display the word from left to right. CO2.6
7 Examine the block diagram of the 8257 Direct Memory Access CL2
controller and its integral components. Detail the purpose and CO2.7
function of channels, each channel having distinct modes of
operation. Discuss how these modes enable efficient data transfers
between peripheral devices and memory.
8 Interface traffic light controller with 8086 and develop an algorithm CL3
for the movement of vehicles from north to south direction and east CO2.8
to west direction.
 UNIT 3 8051 MICROCONTROLLER

Functional block diagram and pin diagram of 8051-Special Function register-Program and Data Memory
organization-addressing modes. Instruction Set: data transfer, arithmetic and logical, program branching
instructions and Boolean variable manipulation.

K
S.No QUESTIONS CO
level
1 AT8051 has RAM of _______ internal memory.
a) 128 bytes
b) 256 bytes CO3.1 CL1
c) 64 bytes
d) 512 bytes
2 8051 series has how many 16 bit registers? CO3.1
a) 2
b) 3 CL1
c) 1
d) 0
3 How are the status of the carry, auxiliary carry and parity flag CO3.1
affected if the write instruction
MOV A,#9C
ADD A,#64H
CL4
a) CY=0,AC=0,P=0
b) CY=1,AC=1,P=0
c) CY=0,AC=1,P=0
d) CY=1,AC=1,P=1
4 How are the bits of the register PSW affected if we select CO3.1
BanCL2 of 8051?
a) PSW.5=0 and PSW.4=1
CL2
b) PSW.2=0 and PSW.3=1
c) PSW.3=1 and PSW.4=1
d) PSW.3=0 and PSW.4=1
5 Which of the following should a microcontroller at-least CO3.1
should consist of?
a) CPU, ROM, I/O ports, and timers
CL2
b) RAM, ROM, I/O ports, and timers
c) CPU, RAM, I/O ports, and timers
d) CPU, RAM, ROM, I/O ports, and timers
6 What is the bit size of the 8051 microcontroller? CO3.1
a) 8-bit CL2
b) 4-bit
 c) 16-bit
d) 32-bit
7 When the port lines of a port are to be used as input lines then CO3.2
the value that must be written to the port address is
__________
a) F0H CL1
b) 0FH
c) FFH
d) 00H
8 PSEN stands for ________ CO3.2
a) Program Select Enable
b) Peripheral Store Enable CL1
c) Program Store Enable
d) Peripheral Select Enable
9 An alternate function of port pin P3.4 in the 8051 is: CO3.2
a) Timer 0
b) Timer 1 CL1
c) Interrupt 0
d) Interrupt 1
10 Which location specify the storage / loading of vector address CO3.3
during the interrupt generation?
a) Stack Pointer
CL1
b) Program Counter
c) Data Pointer
d) All of the above
11 Program counter stores the ___________ CO3.3
a) address of before instruction
b) address of the next instruction CL1
c) data of the before execution to be executed
d) data of the execution instruction
12 CO3.4
When the 8051 is reset and the EA line is HIGH, the program
counter points to the first program instruction in the:
a)Internal code memory CL2
b)External code memory
c)Internal data memory
d)External data memory
13 Which is the technology used in 8051? CO3.4
a) HCMOS
b) CHMOS CL1
c) HMOS –II
d) HMOS-I
14 What is the address range of SFRs? CO3.4
a) 80h to feh CL2
b) 00h to ffh
 c) 80h to ffh
d) 70h to 80h
15 The upper 128 bytes of an internal data memory from 80H CO3.4
through FFH usually represent ___________.
a) general-purpose registers
CL2
b) special function registers
c)stack pointers
d) program counters
16 What is the bit addressing range of addressable individual bits CO3.4
over the on-chip RAM?
a. 00H to FFH
CL2
b. 01H to 7FH
c. 00H to 7FH
d. 80H to FFH
17 The address register for storing the 16-bit addresses can only CO3.4
be____.
a) stack pointer
CL1
b) data pointer
c) instruction register
d) accumulator
18 In which of these addressing modes, a constant is specified in CO3.5
the instruction, after the opcode byte?
a) Register instructions
CL1
b) Register specific instructions
c) Direct addressing
d) Immediate mode
19 The only memory which can be accessed using indexed CO3.5
addressing mode is___________
a) RAM
CL1
b) ROM
c) Main memory
d) Program memory
20 The data address of look-up table is found by adding the CO3.5
contents of
a) accumulator with that of program counter__________
CL1
b) accumulator with that of program counter or data pointer
c) data register with that of program counter or accumulator
d) data register with that of program counter or data pointer
21 What does the instruction XCHD A, @Ri signify during the CO3.5
data transfer in the program execution?
a) Exchange of register with an accumulator
b) Exchange of direct byte with an accumulator CL2
c) Exchange of indirect RAM with an accumulator
d) Exchange of low order digit indirect RAM with an
accumulator
22 Which instruction should be adopted for moving an CO3.5
accumulator to the register from the below mentioned
mnemonics?
a) MOV A, Rn CL2
b) MOV A, @ Ri
c) MOV Rn, A
d) MOV direct, A
23 Which form of instructions also belong to the category of CO3.6
logical instructions in addition to bitwise logical instructions?
a) Single-operand instructions
CL1
b) Rotate instructions
c) Swap instructions
d) All of the above
24 What is the possible range of transfer control for 8-bit relative CO3.6 CO3.1
address especially in 2's complement form with respect to the
first byte of preceding instruction?
a) -115 to 132 bytes
b) -130 to 132 bytes
c) -128 to 127 bytes
d) -115 to 127 bytes
25 Which operations are performed by the bit manipulating CO3.6 CO3.1
instructions of boolean processor?
a) Complement bit
b) Set bit
c) Clear bit
d) All of the above
26 The LJMP instruction is very useful in programming in the CO3.6 CO3.1
external code memory space of__________
a) 32 MB
b) 64 MB
c) 32 KB
d) 64 KB
27 The mnemonic used to perform a subtraction of source with CO3.6 CO3.1
an 8-bit data and jumps to specified relative address if
subtraction is non-zero is_____________
a) DJNZ
b) CJNE
c) JZ
d) JNC
28 The operations performed by data transfer instructions are CO3.6 CO3.1
on_______
a) bit data
b) byte data
c) 16-bit data
d) all the above
29 The instructions that change the sequence of execution are CO3.6 CO3.1
_______
a) conditional instructions
b) logical instructions
c) control transfer instructions
d) data transfer instructions
30 The absolute jump instruction is intended mainly for a jump CO3.6 CO3.1
within a memory space of ____________
a) 2 bytes
b) 2 Kbytes
c) 2 Mbytes
d) none

PART B

K
S.No QUESTIONS CO
level
1 Depict the status CY and AC flags after execution of the following CO3.1 CL3
instructions.
i)MOV A,#3FH , ADD A,#45H
ii) MOV A,#99H, ADD A,#58H
2 Show how 8051 would represent -34H and -128D. CO3.1 CL3
3 Examine the operation performed in the following instruction also CO3.1 CL4
notify the role of overflow flag.
MOV A,#+7
MOV R1,#+18
ADD A,R1
4 With suitable example interpret the stack operations in 8051 CL2
microcontroller. CO3.1
5 State the significance of EA pin and PSEN pin in accessing RAM CO3.2 CL2
and ROM.
6 Specify the significance of bits in TCON register. CO3.3 CL3
7 Illustrate the PSW format of 8051., also name the pointer registers CO3.3 CL2
available.
8 Enumerate the addressing modes in 8051 also interpret any two with CO3.5 CL4
example
9 Show the stack and stack pointer for the following. Assume the CO3.5 CL4
default stack area.
MOV R6,#25H
MOV R1,#12H
MOV R4, #0F3H
PUSH 6
PUSH 1
PUSH 4.
 10 Construct an ALP that continually sends the values 55H and CO3.6 CL3
AAH to port 1 to toggle all of its bits. Specify a time interval
between each data transfer to port 1 as a delay.

11 Build a program for an 8051 microcontroller to generate a square CO3.6 CL3

wave with a 50% duty cycle on bit 0 of port 1.
12 Discuss the operation carried out in LJMP, CJNE, and DJNZ and CO3.6 CL3
RET instructions.

PART C

K
S.No QUESTIONS CO
level
1 Show the blocks of registers and the processing units of 8051 CL2
microcontroller associated for execution of an instruction ADD CO3.1
A,40H
2 Illustrate the signals of 8051 with neat diagram, also specify the CO3.2 CL2
significance of each signal.
3 i) Design a circuit to interface 64KB of External RAM and 64KB CL6
of External ROM with the 8051 Microcontroller. CO3.4 CL2
ii) Describe how the memory is organized for program and data.
4 Identify the addressing mode and explain each of the following: CL2
i) MOV B,#34H ii)MOV R2,07H iii) MOV A,@R1 iv) MOV B,A CO3.5
v) MOVC A,@A+DPTR vi) MOV 56H,A.
5 Interpret Data transfer and arithmetic instructions in 8051 with CL3
suitable examples. CO3.6
6 Build the sequence of instructions utilizing the 8051 to determine CO3.6 CL3
the square and cube of an 8-bit value.
7 Assuming that ROM space starting at 250H contains “America”, CO3.6 CL4
create a program to transfer the bytes into RAM locations starting
at 40H.
8 Construct a program for an 8051 microcontroller that sets, masks, CO3.6 CL3
and adds the 2's complement to an 8-bit value.

UNIT 4 ON-CHIP PERIPHERALS AND PROGRAMMING TECHNIQUES

Input output pins, ports and circuits, timer/counter-Operating Modes-Programming 8051 Timers - Counter
Programming-Serial Communication: Basics of Serial Communication Modes-Serial Port Programming.
Interrupt: 8051 Interrupt- External and Internal Interrupts- Programming timer Interrupts, external hardware
interrupts and serial communication interrupts -Interrupt Priority and Programming.

PART A

K
S.No QUESTIONS CO
level
1 _______ of 8051 needs a pull-up resistor for using it is as an input
or an output port.
a) PORT 0
CO4.1 CL1
b) PORT 1
c) PORT 2
d) PORT 3
2 The external interrupts of 8051 can be enabled
by______________’.
a) 4 LSBs of TCON register
CO4.1 CL2
b) Interrupt enable
c) priority register
d) all of the above
3 TF1, TR1, TF0, TR0 bits are available in ________ register.
a) TMOD
b) SCON CO4.2 CL2
c) TCON
d) SMOD
4 The frequency of the clock that is being used as the clock source
for the timer is ______
a) some externally applied frequency f’
CO4.2 CL1
b) controller’s crystal frequency f
c) controller’s crystal frequency /12
d) externally applied frequency/12
5 __________register is used to make the interrupt level or an edge
triggered pulse.
a) TCON
CO4.2 CL1
b) IE
c) IPR
d) SCON
6 What is the procedure to be followed when the timer needs to turn
on?
a) load the count, start the timer, keep monitoring it, stop the timer
b) load the TMOD register, load the count, start the timer, keep
CO4.2 CL2
monitoring it, stop the timer
c) load the TMOD register, start the timer, load the count, keep
monitoring it, stop the timer
d) none of the mentioned
7 Calculate the maximum delay that can be generated with the crystal
frequency of 22MHz.
a) 2978.9 sec
CO4.2 CL3
b) 0.011 msec
c) 11.63 sec
d) 2.97 msec
8 The roll over value for the timer in Mode 0, Mode 1 and Mode 2 is
_________ CO4.2 CL1
a) 00FFH,0FFFH,FFFFH
 b) 1FFFH,0FFFH,FFFFH
c) 1FFFH,FFFFH,00FFH
d) 1FFFH,00FFH,FFFFH
9 In the instruction “MOV TH1,#-3”, what is the value that is being
loaded in the TH1 register?
a) 0xFCH
CO4.2 CL1
b) 0xFBH
c) 0xFDH
d) 0xFEH
10 If Timer 0 is to be used as a counter, clock pulse need to be applied
at ____ pin.
a) P3.3
CO4.2 CL1
b) P3.4
c) P3.5
d) P3.6
11 The number of bits transmitted or received per second is defined
as__________
a) transmission rate
CO4.3 CL1
b) reception rate
c) transceiver rate
d) baud rate
12 The function of the SCON register is___________
a) to control SBUF and SMOD registers
b) to program the start bit, stop bit, and data bits of framing CO4.3 CL2
c) to control SMOD registers
d) none of the mentioned
13 Which of the following logic level is accepted by the micro-
controller/micro-processor?
a) TTL logic level
CO4.3 CL2
b) RS232 logic level
c) None of the mentioned
d) TTL & RS232 logic level
14 In mode 2, the baud rate depends only on__________________
a) SMOD bit
b) SCON bit CO4.3 CL2
c) Oscillator clock frequency
d) SMOD bit and oscillator clock frequency
15 The transmission unit does not require assistance from processor if
once a byte for transmission is written to_______________
a) SCON register
CO4.3 CL2
b) SBUF register
c) SFR address
d) all of the above
16 If the microcontroller is expected to communicate in a
multiprocessor system, then the required condition CO4.3 CL2
is________________.
 a) SM0 is set
b) SM1 is set
c) SM2 is set
d) REN is set
17 The mode that offers the most secured parity enabled data
communication at lower baud rates is _____________________..,
a) mode 2
CO4.3 CL1
b) mode 1
c) mode 0
d) all of the above
18 To double the baud rate set the SMOD bit in the ________ register.
a) TMOD
b) PCON CO4.3 CL1
c) SCON
d) SBUF
19 If SM0=1, SM1=0, then the transceiver selected is CO4.3
________________.
a) 8-bit synchronous
CL2
b) 9-bit synchronous
c) 8-bit asynchronous
d) 9-bit asynchronous
20 When an interrupt is enabled, the pointer moves does immediately CO4.4
after this interrupt _________________.
a) to the next instruction which is to be executed
CL1
b) to the first instruction of ISR
c) to a fixed location in memory called interrupt vector table
d) to the end of the program
21 __________ bit of the IE register is used to enable TxD/RxD CO4.4
interrupt.
a) IE.D5
CL2
b) IE.D2
c) IE.D3
d) IE.D4
22 The 8051 can handle ______ interrupt sources. CO4.4
a) 4
b)5 CL1
c)6
d)7
23 Which of the following combination is the best to enable the CO4.4
external hardware interrupt 0 of the IE register (assuming initially
all bits of the IE register are zero)?
a) EX0=1 CL2
b) EA=1
c) any of the mentioned
d) EX0=1 & EA=1
24 The bits that control the external interrupts are_________ CO4.4
a) ET0 and ET1
b) ET1 and ET2 CL1
c) EX0 and EX1
d) EX1 and EX2
25 What is the correct order of priority that is set after a controller gets
reset?
a) RI/TI > TF1 > TF0 > INT1 > INT0
CO4.4 CL1
b) RI/TI < TF1 < TF0 < INT1 < INT0
c) INT0 > TF0 > INT1 > TF1 > RI/TI
d) INT0 < TF0 < INT1 < TF1 < RI/TI

PART B

K
S.No QUESTIONS CO
level
1 Specify the alternate functions of port P3 in also depicts the CO4.1 CL3
important of TXD, RXD.T0and T1.
2 Construct a code that generate a square wave at pin P1.5 with a CO4.2 CL3
50% duty cycle. Use timer 0 in mode 1..
3 Assume that the timers are programming for mode 2; find the HEX CO4.2 CL3
value of the decimal number loaded in TH for each of the following
cases.
a) MOV TH1,#-200 b) MOV TH1,#-60 c) MOV TH1,#-12 d) MOV
TH1,#-48
4 Specify the significance of bits in TMOD register. CO4.2 CL2
5 Find the TH1 value needed for the following baud rates at XTAL= CO4.2 CL3
11.0952MHz a) 9600 b) 2400
6 Enumerate the steps involved in programming the 8051 to receive CO4.3 CL3
data serially.
7 Develop a code to continuously transfer the letter “A” serially at CO4.3 CL3
4800 baud rate. Use 8 bit data, 1 stop bit and timer 0.
8 Illustrate the format of SCON register and specify the significance CO4.3 CL2
of each bit.
9 Show the instructions to (a) enable serial port interrupt; Timer 0 CO4.4 CL3
interrupt and external hardware interrupt 1 (b) mask the Timer 0
interrupt, and then c) disable all the interrupts with a single
instruction.
10 Assume that after reset, the interrupt priority is set by the instruction CO4.4 CL3
MOV IP,#00001100B. Discuss the sequence in which the interrupts
are serviced.
11. Discuss what happens if interrupts INT0, TF0, INT1 are activated CO4.4 CL2
at the same time. Assume priority levels were set by the power up
reset and that the external hardware interrupts are edge triggered.
 12. Identify the difference between RET and RETI , also mention the CO4.4 CL2
reason for not using RET in interrupt.

PART C

K
S.No QUESTIONS CO
level
1 Discuss the functions of 8051's ports and circuitry with necessary CO4.1 CL2
diagram.
2 Interpret the modes of operations in 8051 timer, with suitable CO4.2 CL2
diagram.
3 Assume XTAL= 11.0952 MHz, determine the value need to be CO4.2 CL3
loaded in the timer register, if the delay is 5ms. Develop the program
using 8051 microcontroller to create a pulse width of 5ms on P2.3 .
Use Timer 0.
4 Create code to (a) deliver the message "We are ready" to the CO4.3 CL3
Computer. (b) take in any information supplied by the PC and
display it on the P1-connected LEDs. (c) gather information from
switches linked to P2 and send it serially to the PC. Use the 4800
Baud rate.
5 Illustrate the serial communication modes in 8051 . Depicts the CO4.3 CL3
format SCON and PCON register.
6 Create a program to transmit the character string "HELLO" to a CO4.3 CL3
serial port. Configure the baud rate to 9600 with an 8-bit data and 1-
bit stop.
7 Assume two switches are connected to pins P3.2 and P3.3, when a CO4.4 CL3
switch is pressed the corresponding lines goes low. Create a program
to (i) light all LEDs connected to port 0, if the first switched is
pressed. (ii) light all LEDs connected to port2 , if the second switch
is pressed.
8 Discuss role interrupts the in 8051 . Depicts the format IE and IP CO4.4 CL2
register.

UNIT-5 PERIPHERAL INTERFACING AND PROGRAMMING

D/A and A/D Interface, LED interfacing, LCD interfacing, Keyboard /display Interface,
Sensor Interfacing, and Stepper Motor Interfacing Techniques, Comparison of 8051, PIC,
ARM.

PART A

K
S.No QUESTIONS CO
level
1 Which of the following is an example of a common DAC interface
protocol?
A) SPI (Serial Peripheral Interface)
CO5.1 CL1
B) I2C (Inter-Integrated Circuit)
C) UART (Universal Asynchronous Receiver/Transmitter)
D) All of the above
2 Which type of DAC requires an external reference voltage?
A) R-2R ladder DAC
B) Binary-weighted DAC CO5.1 CL2
C) Voltage-switching DAC
D) All types of DACs require an external reference voltage
3 Which of the following is a potential application for a DAC
interface?
A) Audio signal processing
CO5.1 CL1
B) Digital communications
C) Motor control systems
D) All of the above
4 In a 12-bit DAC, how many different output voltage levels can be
represented?
a) 8
CO5.1 CL1
b) 64
c) 256
d) 4096
5 What is the primary advantage of a SAR (Successive
Approximation Register) ADC over other types of ADCs?
a) Fast conversion speed
CO5.1 CL1
b) High resolution
c) Simplicity of circuitry
d) High sample rate
6 Which of the following materials is commonly used to make the
semiconductor in LEDs?
a) Silicon
CO5.2 CL1
b) Copper
c) Gallium Arsenide
d) Aluminum
7 Which pin of a microcontroller is commonly used to control an
LED?
a) VCC
CO5.2 CL1
b) GND
c) GPIO (General Purpose Input/Output)
d) AREF
8 Which of the following commands is used to clear the display in CO5.3
most LCDs?
a) 0x01 CL1
b) 0x10
c) 0x20
 d) 0x30
9 What is the purpose of the RS (Register Select) pin in an LCD?
a) Selecting the mode (command or data) for communication
b) Reading data from the LCD CO5.3 CL2
c) Writing data to the LCD
d) Controlling the backlight brightness
10 How many rows and columns are present in a 16*2
alphanumeric LCD?
a) rows=2, columns=32
CO5.3 CL1
b) rows=16, columns=2
c) rows=16, columns=16
d) rows=2, columns=16
11 How many data lines are there in a 16*2 alphanumeric
LCD?
a) 16
CO5.3 CL1
b) 8
c) 1
d) 0
12 For writing commands on an LCD, RS bit is
a) set
b) reset CO5.3 CL1
c) set & reset
d) none of the mentioned
13 Which of the following step/s is/are correct to perform
reading operation from an LCD?
a) low to high pulse at E pin
CO5.3 CL2
b) R/W pin is set high
c) low to high pulse at E pin & R/W pin is set high
d) none of the mentioned
14 What is the purpose of the E (Enable) pin in an LCD?
a) Selecting the mode (command or data) for communication
b) Initiating data transmission CO5.3 CL1
c) Triggering display updates
d) Controlling the backlight brightness
15 In a keyboard matrix, how is a particular key uniquely identified? CO5.4
a) By its position in the matrix
b) By its color CL2
c) By its size
d) By its weight
16 What is the function of a pull-up resistor in sensor interfacing?
A) To provide a stable reference voltage
B) To convert analog signals to digital CO5.5 CL2
C) To ensure a defined logic level when the sensor is not active
D) To protect the sensor from overvoltage
17 Which port of the 8051 microcontroller is commonly used for
digital sensor interfacing?
A) Port 0
CO5.5 CL2
B) Port 1
C) Port 2
D) Port 3
18 When interfacing a sensor with an 8051 microcontroller, which
type of communication protocol is commonly used for digital
sensors?
CO5.5 CL2
A) I2C
B) UART
C) SPI
D) PWM
19 What is the purpose of a voltage regulator in a sensor interfacing
circuit?
A) To convert analog signals to digital
CO5.5 CL2
B) To regulate the voltage supplied to the sensor
C) To protect the sensor from overvoltage
D) To amplify the sensor signal
20 Which of the following is a commonly used digital temperature
sensor that can be easily interfaced with an 8051 microcontroller?
A) LM35
CO5.5 CL1
B) LDR
C) IR Sensor
D) Ultrasonic Sensor
21 Which of the following methods is commonly used for interfacing
a stepper motor with an 8051 microcontroller?
A) Half-step driving
CO5.6 CL2
B) PWM (Pulse Width Modulation)
C) H-bridge configuration
D) DAC (Digital-to-Analog Converter)
22 Which of the following is the most suitable method for controlling
a stepper motor using an 8051 microcontroller?
A) Full-step driving
CO5.6 CL1
B) Half-step driving
C) Wave-drive mode
D) Both A and B
23 What is the formula for calculating the step angle (θ) of a stepper
motor?
A) θ = 360 / Steps per Revolution
CO5.6 CL1
B) θ = 180 / Steps per Revolution
C) θ = 360 / Number of Phases
D) θ = 180 / Number of Phases
24 Which of the following is a common application of a stepper
CO5.6 CL1
motor?
 A) CNC Machines
B) Electric Fans
C) Hair Dryers
D) Toaster Ovens
25 ARM stands for __________
a)Advanced RISC Machine
b) Automated RISC Machine CO5.7 CL1
c) Autonomous RISC Machine
d) Advanced RISC model

PART B

K
S.No QUESTIONS CO
level
1 Enumerate the steps involved in ADC808/809 conversion process. CO5.1 CL2

How to interface DAC with 8051 and develop an assembly language CO5.1 CL2
2 program to generate the triangular wave..
3 Develop an assembly language program to generate the saw tooth CO5.1 CL2
wave with Digital to analog converter interface.
4 Discuss the applications and features of analog to digital converter CO5.1 CL3
interface.
5 Make an assembly language program to interface LED with 8051 CO5.2 CL2
Microcontroller.
6 Specify the reason why LCD is preferred over LED as display. CO5.3 CL2
7 In LCD interface , outline the purpose of RS and RW pins CO5.3 CL2
8 Specify the types of sensors that can be interfaced with 8051 and CO5.5 CL2
their purpose.
9 Point out the applications of stepper motor, also specify in what way CO5.6 CL2
it differs from other motors.
10 Interpret the concept of half step and full step sequence in driving CO5.6 CL2
the stepper motor.
PART C
 K
S.No QUESTIONS CO
level
1 Develop an ALP to covert an given analog value into digital using CO5.1 CL4
ADC interface with the steps involved in the process of conversion.
2 Build an ALP to to generate square and sawtooth waveform using CO5.1 CL2
DAC interface with the steps involved in the process of conversion.
3 How to interface 16X2 LCD with 8051 microcontroller also write CO5.3 CL3
an assemble language program to display a word “NO.”.
4 Construct the program to interface 4X4 keyboard with CO5.4 CL2
microcontroller
5 Illustrate how to interface temperature sensor with 8051 CO5.5 CL2
microcontroller also bulid an ALP for the same
6 Develop an ALP to rotate a stepper motor in forward direction with CO5.6 CL2
excitation table for half and full step sequence.
7. Develop an ALP to rotate a stepper motor in reverse direction with CO5.6 CL2
excitation table for half and full step sequence
8 Compare and contrast features of 8051, PIC and ARM. CO 5.7 CL2