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Datasheet TL-092

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0% found this document useful (0 votes)
111 views8 pages

Datasheet TL-092

Uploaded by

Chye Yao Hui
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd



       


SLOS372 − JUNE 2001

D Wide Range of Supply Voltages; Single PS PACKAGE


Supply . . . 3 V to 36 V, or Dual Supplies (TOP VIEW)

D Class AB Output Stage 1OUT 1 8 VCC +


D High-Impedance N-Channel-JFET Input 1IN − 2 7 2OUT
Stage . . . 1012 Ω Typ 1IN + 3 6 2IN −
D Internal Frequency Compensation VCC − 4 5 2IN +
D Short-Circuit Protection
D Input Common Mode Includes VCC−
D Low Input Offset Current . . . 50 pA
D Low Input Bias Current . . . 200 pA Typ

description
The TL092 JFET-input operational amplifier is similar in performance to the MC3403 family, but with much
higher input impedance derived from a FET input stage. The N-channel-JFET input stage allows a
common-mode input voltage range that includes the negative supply voltage and offers a typical input
impedance of 1012 Ω a typical input offset current of 50 pA, and a typical input bias current of 200 pA. This device
is designed to operate from a single supply over a range of 3 V to 36 V. Operation from split supplies also is
possible, provided the difference between the two supplies is 3 V to 36 V. Output voltage range is from VCC−
to VCC+ − 1.3 V, with a load resistor to VCC−.
The TL092 is characterized for operation from 0°C to 70°C.

AVAILABLE OPTIONS
PACKAGED DEVICE

TA PLASTIC
SMALL OUTLINE
(PS)
0°C to 70°C TL092CPSR
The PS package is only available taped and
reeled. Add the suffix R to device type for
ordering (e.g., TL092CPSR).

symbol

IN + +
OUT
IN − −

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

        !"# $% Copyright  2001, Texas Instruments Incorporated
$   ! ! &   ' 
$$ ()% $ !* $  #) #$
*  ## !%

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1



       
SLOS372 − JUNE 2001

schematic
VCC+

IN+

IN−

OUT

VCC−

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265



       
SLOS372 − JUNE 2001

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage: VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
VCC− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 V
VCC+ with respect to VCC− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±36 V
Input voltage, VI (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Package thermal impedance, θJA (see Notes 4 and 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC−.
2. Differential voltages are at the noninverting input with respect to the inverting input.
3. Neither input must ever be more positive than VCC+ or more negative than VCC− − 0.3 V.
4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability.
5. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions


MIN MAX UNIT
VCC± Supply voltage 3 36 V
TA Operating free-air temperature range 0 70 °C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3



       
SLOS372 − JUNE 2001

electrical characteristics at specified free-air temperature, VCC± = ±15 V


(all characteristics are specified under open-loop conditions, unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP† MAX UNIT
25°C 5 15
VIO Input offset voltage RS = 50 Ω mV
Full range 20

αVIO Temperature coefficient


25°C 10 µV/°C
of input offset voltage
25°C 50 200 pA
IIO‡ Input offset current
Full range 5 nA
25°C 200 400 pA
IIB‡ Input bias current
Full range 10 nA
Common-mode input VCC− VCC−
VICR 25°C V
voltage range to 12 to 13
RL = 2 kΩ 25°C ±10 ±13
VO(PP) Peak output voltage swing RL = 10 kΩ 25°C ±12 ±13.5 V
RL = 2 kΩ Full range ±10
Large-signal differential 25°C 20 200
AVD RL = 2 kΩ, VO = ±10 V V/mV
voltage amplification Full range 15
Maximum output swing RL = 2 kΩ, VO(PP) = 20 V,
BOM 25°C 9 kHz
bandwidth AVD = 1, THD < 5%
B1 Unity gain bandwidth RL = 10 kΩ, VO = 50 mV 25°C 1 MHz
φm Phase margin RL = 2 kΩ, CL = 200 pF 25°C 60°
ri Input resistance f = 20 Hz 25°C 1012 Ω
ro Output resistance f = 20 Hz 25°C 75 Ω
CMRR Common-mode rejection ratio RS = 50 Ω, VIC = VICR 25°C 70 90 dB
Supply-voltage rejection ratio
kSVR RS = 50 Ω, VCC± = ±3 V to ±15 V 25°C 75 90 dB
(∆VCC/∆VIO)
IOS Short-circuit output current 25°C 40 mA
ICC Supply current (per amplifier) VO = 0, No load 25°C 1.5 2.5 mA
† All typical values are at TA = 25°C.
‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques
that maintain the junction temperature as close to the ambient temperature as possible must be used.

electrical characteristics at specified free-air temperature, VCC+ = 5 V, VCC− = 0 V, TA = 25°C


(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
VIO Input offset voltage RS = 50 Ω, VO = 2.5 V 5 15 mV
IIO Input offset current VO = 2.5 V 50 200 pA
IIB Input bias current VO = 2.5 V 200 400 pA
RL = 10 kΩ 3.3 3.5 V
VO(PP) Peak output voltage swing
RL = 10 kΩ, VCC+ = 5 V to 30 V VCC+−1.7 V
Large-signal differential
AVD RL = 2 kΩ, ∆VO =1.6 V 20 200 V/mV
voltage amplification
Supply-voltage rejection ratio
kSVR RS = 50 Ω, VCC± = ±3 V to ±15 V 75 dB
(∆VCC/∆VIO)
ICC Supply current (per amplifier) VO = 2.5 V, No load 1.5 2.5 mA
VO1/VO2 Channel separation f = 1 kHz to 20 kHz 120 dB
† All typical values are at TA = 25°C.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265



       
SLOS372 − JUNE 2001

operating characteristics, VCC± = ±15 V, TA = 25°C


PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SR Slew rate at unity gain VI = ±10 V (see Figure 1), CL = 100 pF, RL = 2 kΩ 0.6 V/µs
tr Rise time ∆VO = 50 mV (see Figure 1), CL = 100 pF, RL = 2 kΩ 0.2 µs
tf Fall time ∆VO = 50 mV (see Figure 1), CL = 100 pF, RL = 2 kΩ 0.2 µs
Overshoot factor ∆VO = 50 mV (see Figure 1), CL = 100 pF, RL = 2 kΩ 20%
Crossover distortion VIPP = 30 mV, VO(PP) = 2 V, f = 10 kHz 1%
Equivalent input
Vn RS = 100 Ω, f = 1 kHz 34 nV/√Hz
noise voltage

PARAMETER MEASUREMENT INFORMATION

OUT
+
VI

CL = 100 pF RL = 2 kΩ

Figure 1. Unity-Gain Amplifier

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5


PACKAGE OPTION ADDENDUM
[Link] 27-Feb-2006

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TL092CPSR ACTIVE SO PS 8 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL092CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
[Link] for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

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Addendum-Page 1
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