Single Channel Single Phase Energy

Metering IC

SA4106A
FEATURES
 Meets the IEC62053, CBIP-88 and IS137799-1999  Unidirectional or bidirectional power and energy
specification requirements for Class 1 AC static watt- measurement
hour meters for active energy  Precision on-chip oscillator (70ppm/°C drift)
 Motor drive outputs (MOP, MON) provide average active  Precision on-chip voltage reference (10ppm/°C drift)
power information and can drive an electro-mechanical  Selectable on-chip anti-creep function (0.01% of FMAX,
counter or an impulse counter directly 0.004% of FMAX, disabled)
 LED pulse output for calibration purposes supplies  Anti-creep state indicator pin
average active power information  Low power consumption (<20mW typical)
 Configurable for different meter ratings  Measures AC inputs only

DESCRIPTION
The SA4106A is an accurate single phase power/energy (IMAX) and nominal voltages (VNOM) without having to change
metering integrated circuit providing a single chip solution for the stepper motor counter or impulse counter gear ratio. The
single phase energy meters. Very few external components LED pulse output follows the average active power
are required and the chip includes a direct drive capability for consumption measured and is intended for meter calibration
electro-mechanical counters. The SA4106A does not require purposes. In fast calibration mode this output provides a high
an external crystal or voltage reference. A precision oscillator frequency pulse rate following the average active power
and a precision voltage reference to supply the circuitry with consumption and can be used for fast calibration or to
a stable frequency and stable reference currents are interface with a microcontroller.
integrated on the chip.
The SA4106A includes an anti-creep feature preventing any
The SA4106A metering integrated circuit generates a pulse creep effects in the meter under no-load conditions. The anti-
output, the frequency of which is proportional to the active creep threshold can be set to 0.01% or 0.004% of F MAX. The
power consumption. anti-creep function can also be disabled.

Programmable inputs allow the meter manufacturer to The SA4106A integrated circuit is available in a 20 pin small
configure the SA4106A for different meter maximum currents outline (SOIC20) RoHS compliant package.

VDD DIRO DIRI ACST ACSEL FMS

POWER ON
RESET PIN STATE
DETECTION

IIP DIGITAL
CURRENT SIGNAL PROCESSING
OUTPUT
CHANNEL
ADC
IIN Instantaneous Average
power power
LED
PULSE DIVISION
GENERATION FOR
LPF
CALIBRATION
IVP DIGITAL LED OUTPUT
VOLTAGE OUTPUT
CHANNEL
ADC R0
AGND

R1
VOLTAGE REFERENCE OSCILLATOR DIVISION
AND AND FOR
R2
CURRENT BIASING TIMING COUNTER OUTPUT

COUNTER R3
DRIVE
BUFFERS

VREF VSS MON MOP

Figure 1: Block diagram

SPEC-1587 (REV. 5) 1/18 29-09-2017
 SA4106A

ELECTRICAL CHARACTERISTICS
(VDD - VSS = 5V ± 10%, over the temperature range -40°C to +85°C, unless otherwise specified. Refer to Figure 2 “Test circuit for
electrical characteristics”.)

Parameter Symbol Min Typ Max Unit Condition

General
Supply Voltage:
VDD 2.25 2.5 2.75 V With respect to AGND
Positive
Supply Voltage:
VSS -2.75 -2.5 -2.25 V With respect to AGND
Negative
Supply Current:
IDD 3.6 4.6 mA
Positive
Supply Current:
ISS -3.6 -4.6 mA
Negative
Analog Inputs
Current Sensor Inputs
(Differential)
Input Current Range IRIIP, IRIIN -25 25 μA Peak value
With R = 4.7k connected
Offset Voltage VOIIP, VOIIN -4 4 mV
to AGND
Voltage Sensor Inputs
(Asymmetrical)
Input Current Range IRIVP -25 25 μA Peak value
With R = 4.7k connected
Offset Voltage VOIVP -4 4 mV
to AGND
Digital Inputs
Pull-up/down Current on
IPUD 1.5 5.5 mA
FMS, ACSEL*
State Change Detection
TST 10 ms
Time for Digital Inputs
R0, R1, R2, R3, FMS,
ACSEL
Input High Voltage VIH VDD-1 V
Input Low Voltage VIL VSS+1 V
Digital Outputs
LED Output Frequency in 16μARMS input current per
FMAX 4.5 5 5.5 kHz
FAST Mode channel
LED, DIRO, ACST
Output High Voltage VOH VDD-1 V ISOURCE = 5mA
Output Low Voltage VOL VSS+1 V ISINK = 5mA
MOP, MON
Output High Voltage VOH VDD-1 V ISOURCE = 10mA
Output Low Voltage VOL VSS+1 V ISINK = 10mA
* This is the actual pull-up/down current during pin state scanning which is active for 70μs every 10ms. The average pull-up/down
current is therefore between 10μA and 40μA.

During manufacturing, testing and shipment we take great care to protect our products against potential external ATTENTION:
environmental damage such as Electrostatic Discharge (ESD). Although our products have ESD protection circuitry, Electrostatic
permanent damage may occur on products subjected to high-energy electrostatic discharges accumulated on the sensitive device.
human body and/or test equipment that can discharge without detection. Therefore, proper ESD precautions are Requires special
recommended to avoid performance degradation or loss of functionality during product handling. handling.

SPEC-1587 (REV. 5) 2/18 29-09-2017

 SA4106A

ELECTRICAL CHARACTERISTICS (continued)

(VDD - VSS = 5V ± 10%, over the temperature range -40°C to +85°C, unless otherwise specified. Refer to Figure 2 “Test circuit for
electrical characteristics”.)

Parameter Symbol Min Typ Max Unit Condition

On-chip Voltage Reference
Reference Voltage VR 1.15 1.20 1.25 V
With R = 47k connected
Reference Current -IR 24.4 25.5 26.6 μA
to VSS
Temperature Coefficient TCR 10 70 ppm/ºC
On-chip Oscillator
Oscillator Frequency fOSC 3.15 3.57 4.00 MHz
Temperature Coefficient TCOSC 70 200 ppm/ºC

ABSOLUTE MAXIMUM RATINGS*

Parameter Symbol Min Max Unit
Supply Voltage VDD - VSS 6 V
Current on any Pin IPIN -150 150 mA
Storage Temperature TSTG -60 +125 ºC
Specified Operating Temperature Range TO -40 +85 ºC
Limit Range of Operating Temperature Tlimit -40 +85 ºC
*Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only. Functional operation of the device at these or any other condition above those indicated in the operational sections of
this specification, is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.

VDD R1: 1.2

R2: 1.2
R3: 1.5k
Single Phase Source
R3 R4 DIRO DIRI VDD R4: 1.5k
IIP
R11 R5: 1.5k
0.2A R1 C1
R6: 1.5k
to 100A
R7: 250k
50Hz AC
R8: 1k
R2 GND C2 ACST
CT1 R9: 100k
IIN R10: 47k
R5 R6
Phase angle LED R11: 1k
between voltage CT1: TZ76V (2500:1)
R7
and current P1: 1k
-60 to 60 P1
IVP C1: 22nF
MOP
R9 C2: 22nF
220V
C3 SA4106A C3: 5.6nF
R8
50Hz AC C4: 220nF
MON
N C5: 220nF
GND GND
C6: 1µF

FMS
N GND VDD VDD

ACSEL 2.5V +
C4
DC -

AGND VREF VSS R0 R1 R2 R3 C6

2.5V +
GND C5
DC -
GND
R10
VSS VSS
VSS

Figure 2: Test circuit for electrical characteristics

SPEC-1587 (REV. 5) 3/18 29-09-2017

 SA4106A

PIN DESCRIPTION
Designation Pin No. Description
Analog Ground. This is the reference pin for the current and voltage signal sensing
AGND 20
networks. The supply voltage to this pin should be mid-way between VDD and VSS.
Positive Supply Voltage. The voltage to this pin should be +2.5V ± 10% with respect to
VDD 8
AGND.
Negative Supply Voltage. The voltage to this pin should be -2.5V ± 10% with respect to
VSS 14
AGND.
Analog Input for Voltage. The maximum current into the voltage sense input IVP should be
IVP 19
set at 16µARMS. The voltage sense input saturates at an input current of ±25µA peak.
Analog Inputs for Current. The maximum current into the current sense inputs IIP/IIN should
IIP, IIN 2, 1
be set at 16µARMS. The current sense inputs saturate at an input current of ±25µA peak.
This pin provides the connection for the reference current setting resistor. A 47k resistor
VREF 3
connected to VSS sets the optimum operating conditions.
Rated Condition Select inputs. These input pins are used for selecting between the different
R0, R1, R2, R3 6, 5, 4, 11
rated condition configurations. Refer to the Rated Condition Select section.
Fast Mode Select input. This three state input is used to select between STANDARD and
FMS 7 FAST mode and provides an extended selection of meter constants. Refer to the Rated
Condition Select and Fast Mode Select sections.
Direction Select input. This input is used to enable either bidirectional or unidirectional
DIRI 18
energy measurement.
Anti-Creep Threshold Select input. This three state input is used to select the anti-creep
ACSEL 9 threshold. It is also used to deactivate the anti-creep feature. Refer to the Anti-Creep
Threshold Select section.
Anti-Creep State output. This output pin indicates the state of the anti-creep circuit. Refer
ACST 16
to the Anti-Creep State Output section.
DIRO 17 Direction Indicator output. This output indicates the direction of energy flow.
Calibration LED output. Refer to the Rated Condition Select section for the pulse rate output
LED 13
options.
Motor pulse outputs. These outputs can drive an electro-mechanical counter directly. Refer
MON, MOP 15, 12
to the Rated Condition Select section for the pulse rate output options.
NC 10 No connection, leave unconnected.

IIN 1 20 AGND

IIP 2 19 IVP ORDERING INFORMATION

VREF 3 18 DIRI Part Number Package
SA4106ASAR SOIC20 (RoHS compliant)
R2 4 17 DIRO

R1 5 16 ACST

R0 6 15 MON

FMS 7 14 VSS

VDD 8 13 LED

ACSEL 9 12 MOP

NC 10 11 R3

Figure 3: Pin connections

SPEC-1587 (REV. 5) 4/18 29-09-2017

 SA4106A

TERMINOLOGY
Anti-Creep Threshold Limit Range of Operation*
The anti-creep threshold is defined as the minimum energy Extreme conditions which an operating meter can withstand
threshold below which no energy is registered and therefore without damage and without degradation of its metrological
no pulses are generated on the LED or motor drive outputs. characteristics when it is subsequently operated under its
rated operating conditions.
Positive Energy
Positive energy is defined when the phase difference Maximum Rated Mains Current (IMAX)
between the input signals IIP and IVP is less than 90 degrees Maximum rated mains current is the specified maximum
(-90..90 degrees). current flowing through the energy meter at rated operating
conditions.
Negative Energy
Negative energy is defined when the phase difference Constant*
between the input signals IIP and IVP is greater than 90 Value expressing the relation between the active energy
degrees (90..270 degrees). registered by the meter and the corresponding value of the
test output. If this value is a number of pulses, the constant
Percentage Error* should be either pulses per kilowatt-hour (imp/kWh) or watt-
Percentage error is given by the following formula: hours per pulse (Wh/imp).

𝐸𝑛𝑒𝑟𝑔𝑦 𝑟𝑒𝑔𝑖𝑠𝑡𝑒𝑟𝑒𝑑 − 𝑇𝑟𝑢𝑒 𝐸𝑛𝑒𝑟𝑔𝑦 Nominal Mains Voltage (VNOM)

%𝐸𝑟𝑟𝑜𝑟 = × 100
𝑇𝑟𝑢𝑒 𝐸𝑛𝑒𝑟𝑔𝑦 Nominal mains voltage (VNOM) is the voltage specified for the
energy meter at rated operating conditions.
NOTE: Since the true value cannot be determined, it is
approximated by a value with a stated uncertainty that can be Maximum Output Frequency (FMAX)
traced to standards agreed upon between manufacturer and The maximum output frequency (FMAX) is the output
user or to national standards. frequency in FAST mode when 16µARMS input current with
zero phase shift are applied to the voltage and current inputs.
Rated Operating Conditions* Both the voltage and current inputs saturate at an input
Set of specified measuring ranges for performance current magnitude of 25µA, or at 17.68µARMS when using sine
characteristics and specified operating ranges for influence waves. The maximum input current on each channel is
quantities, within which the variations or operating errors of a therefore defined to be 16µARMS, which leaves about 10%
meter are specified and determined. headroom to the saturation point. In FAST mode the nominal
maximum output frequency of 5kHz is achieved under such
Specified Measuring Range* conditions.
Set of values of a measured quantity for which the error of a
meter is intended to lie within specified limits. Repeatability of Error Test**
This test shall be carried out at 0.05Ib and Ib at UPF load
Specified Operating Range* under reference test conditions. Twenty error samples shall
A range of values of a single influence quantity, which forms be taken at time intervals of 30 minutes. Identical test
a part of the rated operating conditions. conditions shall be maintained throughout the test. For an
acceptance test six error tests may be carried out at time
intervals of at least 5 minutes.

* IEC 62052-11, 2003. Electricity Metering Equipment (AC) – General Requirements, Test and Test Conditions
– Part 11: Metering Equipment
** IS13779-1999 Indian Standard AC Static Watt-hour Meters Class 1 and 2 Specification Rev 1

SPEC-1587 (REV. 5) 5/18 29-09-2017

 SA4106A

PERFORMANCE GRAPHS
VDD R1: 1.2
R2: 1.2
R3: 1.5k
Single Phase Source
R3 R4 DIRO DIRI VDD R4: 1.5k
IIP
R11 R5: 1.5k
0.2A R1 C1
R6: 1.5k
to 100A
R7: 250k
50Hz AC
R8: 1k
R2 GND C2 ACST
CT1 R9: 100k
IIN R10: 47k
R5 R6
Phase angle LED R11: 1k
between voltage CT1: TZ76V (2500:1)
R7
and current P1: 1k
-60 to 60 P1
IVP C1: 22nF
MOP
R9 C2: 22nF
220V
C3 SA4106A C3: 5.6nF
R8
50Hz AC C4: 220nF
MON
N C5: 220nF
GND GND
C6: 1µF

FMS
N GND VDD VDD

ACSEL 2.5V +
C4
DC -

AGND VREF VSS R0 R1 R2 R3 C6

2.5V +
GND C5
DC -
GND
R10
VSS VSS
VSS

Figure 4: Test circuit for performance graphs

0.5 0.5

0.4 0.4

0.3 0.3

0.2 0.2

0.1 0.1
%Error
%Error

0.0 0.0

-0.1 -0.1

-0.2 -0.2
PF = 1
-0.3 PF = 0.5 LAG -0.3 VMains = 100%VNOM
PF = 0.5 LEAD VMains = 50% VNOM
-0.4 -0.4
PF = -1 VMains = 130% VNOM
-0.5 -0.5
0.1 1 10 100 0.1 1 10 100
%IMAX %IMAX

Graph 1: Freq = 50Hz, VMains = VNOM, Temp = 25°C, Graph 2: PF = 1, Freq = 50Hz, Temp = 25°C,
VDD-VSS = 5.0V VDD-VSS = 5.0V
0.5 0.5

0.4 0.4

0.3 0.3

0.2 0.2

0.1 0.1
%Error
%Error

0.0 0.0

-0.1 -0.1

-0.2 -0.2

-0.3 Freq = 50Hz -0.3 VDD-VSS = 5.0V

Freq = 45Hz VDD-VSS = 4.5V
-0.4 -0.4
Freq = 65Hz VDD-VSS = 5.5V
-0.5 -0.5
0.1 1 10 100 0.1 1 10 100
%IMAX %IMAX

Graph 3: PF = 1, VMains = VNOM, Temp = 25°C, Graph 4: PF = 1, Freq = 50Hz, VMains = VNOM,
VDD-VSS = 5.0V Temp = 25°C
SPEC-1587 (REV. 5) 6/18 29-09-2017
 SA4106A

FUNCTIONAL DESCRIPTION
Theory of Operation Analog Inputs
The SA4106A includes all the required functions for single The input circuitry of the current and voltage sensor inputs is
channel single phase power and energy measurement. Two illustrated in Figure 5. These inputs are protected against
AD converters sample the voltage and current input signals. electrostatic discharge through clamping diodes. The
The two digital signals, accurately representing the voltage feedback loops from the outputs of the amplifiers A I and AV
and current inputs, are multiplied using digital multiplication. generate virtual short circuits between IIP and IIN as well as
The output of the multiplier represents the instantaneous IVP and AGND. The current sense inputs (IIP and IIN) are
power, which is subsequently low pass filtered and integrated identical and balanced. The AD converters convert the
over time to remove the instantaneous components forming signals on the voltage and current sense inputs to a digital
the averaged instantaneous energy. This energy is format for further processing. All internal offsets are
accumulated over time to form the outputs of the device. eliminated through the use of various cancellation
techniques.
For given voltage and current signals the instantaneous
VDD
power is calculated by:
IIP

𝑝(𝑡) = 𝑣(𝑡) × 𝑖(𝑡)

VSS
𝑝(𝑡) = 𝑉𝑀 cos(𝜔𝑡 + 𝜃) × 𝐼𝑀 cos(𝜔𝑡 + 𝜓) CURRENT CURRENT
SENSOR
INPUT
AI CHANNEL
ADC
VDD
𝑉𝑀 𝐼𝑀
Let 𝜙 = 𝜃 − 𝜓, and 𝑉𝑅𝑀𝑆 = and 𝐼𝑅𝑀𝑆 = then
√2 √2
IIN

𝑝(𝑡) = 𝑉𝑀 cos(𝜔𝑡 + 𝜃) × 𝐼𝑀 cos(𝜔𝑡 + 𝜃 − 𝜙)

VSS
𝑝(𝑡) = 𝑉𝑅𝑀𝑆 𝐼𝑅𝑀𝑆 (cos 𝜙 + cos(2(𝜔𝑡 + 𝜃) − 𝜙)) VDD

where IVP

p(t) is the instantaneous power, VOLTAGE

SENSOR
v(t) is the instantaneous voltage signal, INPUT
VSS
VOLTAGE

i(t) is the instantaneous current signal, AV CHANNEL

ADC

VM is the amplitude of the voltage signal,

IM is the amplitude of the current signal,
 is the phase angle of the voltage signal and AGND

 is the phase angle of the current signal.

Figure 5: Analog input configuration
The instantaneous power is low pass filtered to remove the
double mains frequency component cos(2(t+)-) and is Digital Outputs
then integrated over time to provide the average power The calculations required for power and energy are
information performed and converted to pulses on the LED, MON and
MOP outputs. The complimentary output pins MON and MOP
1 𝑇 are provided for driving a stepper motor counter directly. The
𝑃= ∫ 𝑝(𝑡)𝑑𝑡
𝑇 0 output frequency on the LED output is, in both STANDARD
𝑃 = 𝑉𝑅𝑀𝑆 𝐼𝑅𝑀𝑆 cos 𝜙 and FAST mode, proportional to the average active power
consumption measured. The FAST mode is intended for fast
where meter calibration and verification purposes or for interfacing
P is the average power and the SA4106A to a microcontroller.
cos is the power factor.
Anti-Creep Threshold
Linearity An integrated anti-creep function prevents any output pulses
The SA4106A is a CMOS integrated circuit, which performs on the LED output and the MON/MOP motor drive outputs
power/energy calculations across a dynamic range of 500:1 when the level of measured energy is below the anti-creep
to an accuracy that exceeds the IEC62053 specification. threshold. This threshold is selectable between 0.01% and

SPEC-1587 (REV. 5) 7/18 29-09-2017

 SA4106A

0.004% of FMAX, where FMAX is the output frequency in FAST to be. The SA4106A can be calibrated to specification with a
mode when the input currents are IVP MAX = 16μARMS and minimum of two pulses on the LED output whilst in
IIPMAX = 16μARMS. The anti-creep function can also be STANDARD mode and utilizing an appropriate reference
disabled. The operation of the anti-creep function is fully meter. This reading is independent of time and will be
described in the Input Signals and Output Signals sections. repeatable so as to consistently achieve the required
accuracy for the full input current range that needs to be
Reverse Energy Flow Indication measured to IEC62053 accuracy. In Figure 6 the reference
The SA4106A assesses the phase difference between the meter pulses are counted between two pulses of the meter
voltage channel signal and the current channel signal. If this under test. The meter under test is then adjusted so as to
phase difference is greater than 90 degrees then the DIRO reflect the expected number of counted reference meter
signal will become active. This facility is designed to detect pulses. A worst-case scenario is for measurements obtained
the wrongful connection of the meter. This operation is fully for only two pulses of the meter under test and N pulses from
described in the Output Signals section. the reference meter. In this case the measurement resolution
will be:
Starting Current
The SA4106A generates pulses on the LED and MON/MOP 1
𝑀𝑒𝑎𝑠𝑢𝑟𝑒𝑚𝑒𝑛𝑡 𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 (%) = × 100
outputs for an input power greater than 0.01% or 0.004% of 𝑁
FMAX depending on the selected anti-creep threshold. This is
to comply with the IEC requirement where the meter is The corresponding calibration and repeatability results can
required to generate pulses for currents greater than 0.4%Ib. never be more accurate than this measurement resolution.

Calibration and Repeatability Power-On Reset

The SA4106A provides an output (LED) that is used for The SA4106A has a power-on reset circuitry that activates
calibration of the meter. The meter is calibrated by comparing whenever the voltage between VDD and VSS is less than
the energy reading of the meter under test with the energy 3.6V ± 8%.
reading of the reference meter. The reference meter should
have a considerably higher pulse rate than the meter under Power Consumption
test. The accuracy to which the meter has to be calibrated will The power consumption of the SA4106A integrated circuit is
dictate how much higher the reference meter pulse rate has less than 30mW.

N pulses
……….

……….

Voltage

Neutral

Single VIN N VIN N

Phase
Test Meter Under
Reference
Source Test
Meter
SA4106A
Pulse Out LED
IIN IOUT IIN IOUT

Current

Figure 6: Calibration and repeatability setup

SPEC-1587 (REV. 5) 8/18 29-09-2017

 SA4106A

INPUT SIGNALS
Voltage Reference (VREF) Voltage Sense Input (IVP)
A bias resistor of 47k sets optimum bias and reference Figure 8 shows the voltage sense input configuration. The
conditions on chip. Calibration of the SA4106A should be voltage sense input saturates at an input current of
done on the voltage input and not on the VREF input. ±17.6μARMS (±25μAPEAK). The current into the voltage sense
input should therefore be set between 11μARMS and 12μARMS
Current Sense Inputs (IIP and IIN) at nominal mains voltage (VNOM) to allow for a mains voltage
Figure 7 shows the typical connections for the current sensor variation of up to +30% and –50% without saturating the
input when using a shunt or a current transformer as a current voltage sense input. Typical VNOM values and the
sensing element. At maximum rated mains current (I MAX) the corresponding IVP input currents are shown in the following
resistor values should be selected for an input current of table.
16µARMS. The current sense inputs saturate at an input
current of ±17.6μARMS (±25μAPEAK), so this allows about 10% Table 1: IVP input current for typical values of VNOM
headroom until saturation occurs. VNOM (V) IVP Input Current (μARMS)
110 / 220 11
The resistor RSH is the shunt resistor. The voltage drop
115 / 230 11.5
across RSH at maximum rated mains current (IMAX) should
not be less than 5mVRMS and not exceed 100mVRMS. 120 / 240 12

The resistors RA and RB form the current transformers For best performance the SA4106A also requires an anti-
termination resistor. The reference level is connected in the alias filter on the voltage sense input. Referring to Figure 8,
centre of the termination resistor to achieve purely differential the capacitor C1 is used to implement the anti-alias filter. If a
input currents. The voltage drop across the termination current transformer is used as a current sensing element then
resistors at maximum rated mains current (IMAX) should be in C1 is also used to compensate for any phase shift caused by
the order of 100mVRMS. The termination resistance should the current transformer. The resistor R4 defines the input
also be significantly smaller than the DC resistance of the current into the device. The optimum input network is
current transformers secondary winding. achieved by setting R4 smaller than 100k. If R4 is made too
large the capacitor C1 will be very small and the phase shift
The resistors R1 to R4 define the current flowing into the of the input network could be affected by stray capacitances.
device. For best performance the SA4106A requires anti- The potentiometer P1 is used for calibration purposes.
alias filters on the current sense inputs. These filters are
realized by means of the capacitors C1 and C2. The typical R1 R2 R3
VNOM (220V)
Voltage In
cut-off frequency of these filters should be between 10kHz P1 R4
and 20kHz. The optimum input network is achieved by setting Neutral IVP
(11µARMS)
the input resistors equal, i.e. setting R1 = R2 = R3 = R4 = RC. GND
C1
This sets the equivalent resistance associated with each (P1 + R5) << R4 << (R1 + R2 + R3)
R5

capacitor to RC/2.
GND GND

R1 R2
Current In IIP
IMAX C1 16µARMS Figure 8: Voltage sense input configuration
GND RSH
GND
R3 R4
Current Out
IIN
C2

GND

R1 R2
IIP
CT1 C1 16µARMS
Current In
RA
IMAX

GND
Current Out RB C2

IIN
R3 R4

Figure 7: Current sense input configuration

SPEC-1587 (REV. 5) 9/18 29-09-2017

 SA4106A

Direction Select Input (DIRI) When FMS is floating the LED pin outputs fast mode pulses.
Depending on the state of the DIRI pin the energy to be The motor pulses occur as usual based on the last FMS
measured can be positive energy only, negative energy only, before a floating condition was detected as well as the current
or both positive and negative energy. Connecting DIRI to VDD states of R0, R1, R2 and R3. If a floating condition on FMS is
will result in only positive energy being measured. Energy detected at device start-up the motor pulses are generated
flowing in the negative direction will not be measured. based on FMS set to VSS.
Connecting DIRI to VSS will result in only negative energy
being measured. Energy flowing in the positive direction will Rated Condition Select (R0, R1, R2, R3)
not be measured. Connecting the DIRI pin to the DIRO output The Rated Condition Select inputs (R0, R1, R2 and R3) along
pin enables the bidirectional mode where energy is measured with the Fast Mode Select input (FMS) are used for obtaining
regardless of direction. a multitude of meter constants and motor drive ratios. The
different LED and motor division factors (DF_LED and
Anti-Creep Threshold Select (ACSEL) DF_MO) that can be selected via R0, R1, R2, R3 and FMS
The Anti-Creep Threshold Select input (ACSEL) is used to are shown Table 3.
select between different anti-creep thresholds. The
thresholds that can be selected are shown in Table 2. The To calculate the LED output pulse constant in STANDARD
anti-creep feature can also be disabled if required. In this mode and the motor drive pulse constant for any meter rating
case an external microcontroller could be used to implement (IMAX and VNOM) the following formulae can be used:
any desirable anti-creep threshold.
𝐼𝑉𝑃 5000 1000 × 3600
𝐿𝐸𝐷 𝑖𝑚𝑝/𝑘𝑊ℎ = × ×
Table 2: Anti-creep threshold selection via the ACSEL input 16 𝐷𝐹_𝐿𝐸𝐷 𝑉𝑁𝑂𝑀 × 𝐼𝑀𝐴𝑋
ACSEL Input Anti-Creep Threshold ...(1)
where
VSS Disabled
IMAX is maximum rated mains current,
VDD 0.01% FMAX VNOM is nominal mains voltage,
Floating 0.004% FMAX IVP is the analog input current on the voltage sense input at
VNOM as specified in Table 1 and
The anti-creep threshold is defined as a percentage of the DF_LED is the dividing factor for the LED output that is set by
maximum output frequency in FAST mode (FMAX). Any FAST the combination of R0, R1, R2, R3 and FMS as specified in
mode pulses that occur at a lower frequency are not passed Table 3.
to the pulse dividers and pulse output circuits.
Equation 1 is based on the assumption that the input current
Fast Mode Select (FMS) into the IIP/IIN current sense input is set to 16μARMS at IMAX.
The Fast Mode Select input (FMS) is used to select between
𝐿𝐸𝐷 𝑖𝑚𝑝/𝑘𝑊ℎ
STANDARD and FAST mode as well as to select between a 𝑀𝑜𝑡𝑜𝑟 𝑖𝑚𝑝/𝑘𝑊ℎ =
multitude of meter constants and motor drive dividing ratios. 𝐷𝐹_𝑀𝑂
…(2)
Connecting this pin to VDD or VSS enables the STANDARD
where
mode of operation while leaving this pin floating enables the
LED imp/kWh is the LED constant as calculated using
FAST mode of operation. When STANDARD mode is
Equation 1 and
enabled the LED output pulses at a low frequency. This low
DF_MO is the dividing factor for the motor output that is set
frequency allows a longer accumulation period and the output
by the combination of R0, R1, R2, R3 and FMS as specified
pulse rate is therefore proportional to the average power
in Table 3.
consumption measured.

Table 4 illustrates some of the possible LED and motor

The Rated Condition Select pins (R0, R1, R2, R3) together
constants that are achievable for some common values of
with the FMS pin are used to select different LED output
IMAX using a VNOM between 220V and 240V.
frequencies which in turn determine the applications meter
constant. Refer to Figure 9 for the LED output timing diagram.
When the FAST mode is enabled the LED output generates
pulses at a nominal frequency of 5kHz at I MAX and VMAX. In
this mode the pulse frequency is proportional to the average
power consumption measured. This mode is useful when
interfacing to a microcontroller.

SPEC-1587 (REV. 5) 10/18 29-09-2017

 SA4106A

Table 3: LED and motor division factors Table 4: LED and motor constants achievable for some
FMS R3 R2 R1 R0 DF_LED DF_MO common IMAX currents for VNOM = 220V to 240V
0 0 0 0 0 220 256 IMAX Dividing Factors LED Output Motor Output
0 0 0 0 1 440 128 (A) DF_LED DF_MO (imp/kWh) (imp/kWh)

0 0 0 1 0 880 64 6 1464 64 6400 100

0 0 0 1 1 1760 32 6 2928 32 3200 100
0 0 1 0 0 220 128 10 220 256 25600 100
0 0 1 0 1 440 64 10 440 128 12800 100
0 0 1 1 0 880 32 10 880 64 6400 100
0 0 1 1 1 1760 16 10 1760 32 3200 100
0 1 0 0 0 220 64 10 220 128 25600 200
0 1 0 0 1 440 32 10 440 64 12800 200
0 1 0 1 0 880 16 10 880 32 6400 200
0 1 0 1 1 1760 8 10 1760 16 3200 200
0 1 1 0 0 220 32 10 220 64 25600 400
0 1 1 0 1 440 16 10 440 32 12800 400
0 1 1 1 0 880 8 10 880 16 6400 400
0 1 1 1 1 1760 4 10 1760 8 3200 400
1 0 0 0 0 1464 64 10 220 32 25600 800
1 0 0 0 1 2928 32 10 440 16 12800 800
1 0 0 1 0 352 64 10 880 8 6400 800
1 0 0 1 1 704 32 10 1760 4 3200 800
1 0 1 0 0 584 32 20 220 128 12800 100
1 0 1 0 1 1168 16 20 440 64 6400 100
1 0 1 1 0 352 32 20 880 32 3200 100
1 0 1 1 1 704 16 20 1760 16 1600 100
1 1 0 0 0 584 16 20 220 64 12800 200
1 1 0 0 1 1168 8 20 440 32 6400 200
1 1 0 1 0 352 16 20 880 16 3200 200
1 1 0 1 1 704 8 20 1760 8 1600 200
1 1 1 0 0 292 16 20 220 32 12800 400
1 1 1 0 1 584 8 20 440 16 6400 400
1 1 1 1 0 234 16 20 880 8 3200 400
1 1 1 1 1 468 8 20 1760 4 1600 400
Note: Pin values defined as follows 25 352 64 6400 100
0 pin is connected to VSS 25 704 32 3200 100
1 pin is connected to VDD 25 352 32 6400 200
25 704 16 3200 200
25 352 16 6400 400
25 704 8 3200 400

SPEC-1587 (REV. 5) 11/18 29-09-2017

 SA4106A

Table 4: continued OUTPUT SIGNALS

IMAX Dividing Factors LED Output Motor Output LED Output (LED)
(A) DF_LED DF_MO (imp/kWh) (imp/kWh) The LED output pin provides a pulse output with a frequency
proportional to the average active energy consumption
30 584 32 3200 100
measured when in STANDARD mode or FAST mode. A low
30 1168 16 1600 100 pass filter is applied to the instantaneous energy output
30 584 16 3200 200 directly after multiplication. This filtering allows all
30 1168 8 1600 200 instantaneous components to be removed resulting in a
30 292 16 6400 400 constant output frequency at constant energy input, even
over a short period of time. The delay of this filter is about
30 584 8 3200 400
200ms.
40 220 64 6400 100
40 440 32 3200 100 The LED output is primarily used for calibration purposes.
40 880 16 1600 100 The Rated Condition Select inputs (R0, R1, R2, R3) and the
Fast Mode Select input (FMS) allow different nominal output
40 1760 8 800 100
frequencies to be selected. The FMS input also allows
40 220 32 6400 200 selection between STANDARD mode and FAST mode. The
40 440 16 3200 200 LED output is active low. Figure 9 shows the LED output
40 880 8 1600 200 waveform.
40 1760 4 800 200
In FAST mode the LED pulse output is set to a nominal
50 352 32 3200 100
frequency of 5kHz at an input current of 16µARMS on both the
50 704 16 1600 100 current and voltage channels.
50 352 16 3200 200
50 704 8 1600 200 The nominal output frequency of the LED pin is given by
60 584 16 1600 100
𝐼𝑉𝑃 × 𝐼𝐼𝑃 × |cos 𝜙|
60 1168 8 800 100 𝑓𝐿𝐸𝐷_𝐹𝐴𝑆𝑇 = 5000 ×
162
60 292 16 3200 200 …(3)
60 584 8 1600 200 in FAST mode and by

80 220 32 3200 100 𝑓𝐿𝐸𝐷_𝐹𝐴𝑆𝑇

𝑓𝐿𝐸𝐷_𝑆𝑇𝐷 =
80 440 16 1600 100 𝐷𝐹_𝐿𝐸𝐷
80 880 8 800 100 …(4)
in STANDARD mode where
80 1760 4 400 100
IVP and IIP are the analog input currents in µARMS on the
100 352 16 1600 100 voltage and current sense inputs,
100 704 8 800 100  is the phase angle between the current and voltage signals
120 292 16 1600 100 and
120 584 8 800 100 DF_LED is the LED divider selected by R0, R1, R2, R3 and
FMS according to Table 3.
150 234 16 1600 100
150 468 8 800 100 The timing values given below are based on the nominal
frequency value of the internal oscillator.
tL = 1/fLED_FAST in FAST mode (fLED_FAST as per Equation 3)
tLP tL = 1/fLED_STD in STANDARD mode (fLED_STD as per
Equation 4)
tLP = 91.5ms when tL > 183ms in STANDARD mode
= tL/2 when tL < 183ms in STANDARD mode
Figure 9: LED pulse output waveform = 69μs in FAST mode

SPEC-1587 (REV. 5) 12/18 29-09-2017

 SA4106A

Motor Pulse Output (MON, MOP) Anti-Creep State Output (ACST)

The MON and MOP pins are complimentary outputs with a The state of the anti-creep circuit is available on the ACST
frequency proportional to the average active power output pin. This pin allows the state of the anti-creep circuit to
consumption measured. These active high outputs can be be monitored. A low level on this pin indicates that the anti-
used to either directly drive a stepper motor counter or an creep circuit has detected an energy level below the
electro-mechanical impulse counter. The Rated Condition threshold set by the ACSEL pin. In this state no pulses will be
Select inputs (R0, R1, R2, R3) as well as the Fast Mode emitted on the LED and the motor pulse outputs. A high level
Select input (FMS) allow the selection of different output indicates that the detected energy is above the anti-creep
frequencies corresponding to different meter constants. threshold and pulses will be emitted on the LED and motor
Figure 10 indicates the timing of these signals. pulse outputs. The ACST pin can be used to drive an LED to
indicate when the SA4106A has detected energy below or
The nominal output frequency of each motor output is given above the anti-creep threshold. A power-on reset will set
by: ACST low and the pin will go high only once energy above
the anti-creep threshold has been detected. If the anti-creep
𝑓𝐿𝐸𝐷_𝑆𝑇𝐷 threshold is disabled the ACST pin will go high as soon as the
𝑓𝑀𝑂𝑇 =
𝐷𝐹_𝑀𝑂 logic low on ACSEL has been detected and it will remain high,
regardless what level of energy is detected.
where …(5)
fLED_STD is the output frequency of the LED output in Direction Indicator Output (DIRO)
STANDARD mode as per Equation 4 and The direction of the energy flow may be ascertained by
DF_MO is the motor divider selected by R0, R1, R2, R3 and monitoring the DIRO pin. A low level on this pin indicates
FMS according to Table 3 negative energy flow. Positive energy flow is indicated by a
high level. Should the energy (either negative or positive) be
When connecting a stepper motor counter between MON and less than the anti-creep threshold then this output will retain
MOP the output pulse rate is effectively doubled because the its previous state. This prevents a flickering output in the case
pulses on both MON and MOP contribute to incrementing the of no or very low current flow. The DIRO pin may be used to
counter. drive an LED. The state of the DIRO pin is updated on the
internal FAST mode pulses, regardless of whether the device
The timing values given below are based on the nominal is set to FAST or STANDARD mode and what state DIRI is
frequency value of the internal oscillator. set to. A power-on reset will set DIRO high and it will remain
tM = 1/fMOT (fMOT as per Equation 5) high until negative energy above the anti-creep threshold is
tMP = 220ms when tM > 440ms detected. Table 5 illustrates the operation of the DIRO output.
= tM/2 when tM < 440ms
tMS = tM/2 Table 5: Operation of the DIRO output
tMSP = tMS-tMP when tM > 440ms Energy Level |Phase Angle| State of DIRO
= 6.7μs when tM < 440ms
< FMIN 0º - 360º Previous State
tM > FMIN < 90º HIGH
> FMIN > 90º LOW
MOP tMP
Note: FMIN is the anti-creep threshold if enabled
tMS

MON tMSP

Figure 10: Motor pulse output waveform

SPEC-1587 (REV. 5) 13/18 29-09-2017

 SA4106A

TYPICAL APPLICATION
The following description outlines the basic process required Voltage Input Network
to design a typical single phase energy meter using the The voltage sense input requires an input current of 11μA RMS
SA4106A and a shunt resistor as a current sensing element. at VNOM (220V) according to Table 1. The mains voltage is
The meter is capable of measuring 220V/40A/50Hz with a divided by means of a voltage divider to a lower voltage that
precision better than Class 1. It uses a stepper motor counter is converted to the required input current by means of the
with 100imp/kWh and the calibration LED has a constant of input resistor. Once again an anti-alias filter is required to
1600imp/kWh. remove any high frequency signals that could affect the
performance of the SA4106A. A shunt typically has very little
The most important external circuits required for the phase shift so phase compensation is not required.
SA4106A are the current input network, the voltage input
network as well as the bias resistor. All resistors should be The input resistor R8 sets the current input into the device.
1% metal film resistors of the same type to minimize This resistor should not be too large else the capacitor for the
temperature effects. anti-alias filter will be quite small which could cause
inaccurate phase shift due to parasitic capacitances.
Bias Resistor Therefore R8 = 100k is chosen and the voltage at the centre
A bias resistor of R10 = 47k sets optimum bias and of the trimpot should be 1.1V (11μA x 100k). The calibration
reference currents on chip. Calibration of the meter should be range of the voltage input network should be about ±15% to
done using the voltage input and not by means of the bias ensure that all component tolerances can be catered for, so
resistor. the total tuning range can be set to ±0.17V. Therefore the
voltage across the trimpot and R9 is 1.27V. Choosing a 1k
Current Input Network trimpot results in:
The voltage drop across the shunt resistor at maximum rated
current should not be less than 5mVRMS and not exceed 1𝑘Ω
𝑅9 = × (1.27 − 2 × 0.17) ≈ 2.7𝑘Ω
100mVRMS. A 320μ shunt is chosen which sets the voltage (2 × 0.17)
drop at maximum rated current to 12.8mV and the maximum
power dissipation in the shunt to 0.5W. The voltage across The effect of R8 can be ignored in the above equation, given
the shunt resistor is converted to the required differential the fact that R8 is significantly larger than P1 and R9. Now let
input currents through the current input resistors. Anti-alias RA = R5 + R6 + R7 and
filters are incorporated on these input resistors to filter any
220𝑉
high frequency signal components that could affect the 𝑅𝐴 = (𝑃1 + 𝑅9) × ( − 1) ≈ 637𝑘Ω
performance of the SA4106A. 1.27𝑉

so choose R5 = 240k, R6 = 220k and R7 = 180k.

The four current input resistors (R1, R2, R3, R4) should be of
equal size to optimize the input networks low pass filtering
The cut-off frequency of the anti-alias filter is adjusted so that
characteristics, so the values can be calculated as follows:
it is identical to that of the current input network anti-alias
𝑅𝑆𝐻 filters. This ensures that the phase shift caused by the anti-
𝑅1 = 𝑅2 = 𝑅3 = 𝑅4 = 𝐼𝑀𝐴𝑋 × = 200Ω = 𝑅𝐶 alias filters is identical on the current and voltage input
4 × 16𝜇𝐴
networks. Therefore
For optimum performance the cut-off frequency of the anti-
1 1
alias filter should be between 10kHz and 20kHz. The =
𝜋𝐶𝐶 × 𝑅𝐶 2𝜋(𝑃1 + 𝑅9) × 𝐶3
equivalent resistance associated with each capacitor is R C/2
so the capacitor values should be in the order of
and so C3 = 2.7nF.
1 1
𝐶1 = 𝐶2 = = ≈ 100𝑛𝐹 = 𝐶𝐶
𝜋𝑓𝐶𝐼 𝑅𝐶 𝜋 × 15𝑘𝐻𝑧 × 200Ω

where fCI is the cut-off frequency of the anti-alias filter of the

current input network.

SPEC-1587 (REV. 5) 14/18 29-09-2017

 SA4106A

Device Setup
The SA4106A has to be set to STANDARD mode. Using The lowest possible creep limit is chosen to allow the meter
Equations 1 and 2 in the Rated Condition Select section the to register energy at very low currents, so ACSEL is left
required LED and motor dividers for 1600imp/kWh and floating. In order to obtain the highest immunity against
100imp/kWh respectively are calculated as DF_LED = 880 tampering the SA4106A is set up to measure bidirectional
and DF_MO = 16. Using Table 3 the device is set up using energy by connecting DIRI to DIRO.
FMS = VSS, R3 = VDD, R2 = VSS, R1 = VDD and R0 = VSS.

R5 R6 R7 P1 1k R9
NEUTRAL
240k 220k 180k 2.7k
C3
2.7nF 0V

0V
LIVE IN
U1
0V
R3 R4 1 20
IIN AGND
200 200 0V
RSH C2 100nF 19 R8
IVP
320µ C1 100nF 100k
0V
R1 R2 CNT1
2 +2.5V
IIP 765432.1
200 200 12 R13
MOP U2
R10 100
LIVE OUT 3
VREF 15 R12
+2.5V 47k MON Pulse Out
-2.5V 14 100
VSS
13 R11 D1
LED 4N35
C4 +2.5V 8 Pulse
680
VDD +2.5V
220nF
5 16 R14 D2
C6 R1 ACST
1k Creep
1µF 11
0V R3
C5 17 R15 D3
6 DIRO
220nF R0 1k Direction
4 18
R2 DIRI
-2.5V 7 9
FMS ACSEL
-2.5V
SA4106A

Figure 11: Typical application circuit

Table 6: Component list for typical application

Symbol Description Symbol Description
U1 Energy metering device, SA4106ASAR R14, R15 Resistor, 1k, 5%, carbon film
U2 Opto-coupler, 1N35 P1 Trim-pot, 25 turns, 1k
RSH Shunt Resistor, 40A, 320μ C1, C2 Capacitor, 100nF, ceramic
R1, R21, R3, C3 Capacitor, 2.7nF, ceramic
Resistor, 200, 1%, metal film
R41 C42, C52 Capacitor, 220nF, ceramic
R5 Resistor, 240k, 1%, metal film C62 Capacitor, 1μF, ceramic
R6 Resistor, 220k, 1%, metal film D1 Light emitting diode, pulse output
R7 Resistor, 180k, 1%, metal film Light emitting diode, anti-creep state
D2
R81 Resistor, 100k, 1%, metal film output
R9 Resistor, 2.7k, 1%, metal film Light emitting diode, energy direction
D3
R101 Resistor, 47k, 1%, metal film output

R11 Resistor, 680, 5%, carbon film CNT1 Stepper motor counter, 100imp/kWh

R12, R13 Resistor, 100, 5%, carbon film

Note 1: Resistors R2, R4, R8 and R10 must be positioned as close as possible to the respective device pins
Note 2: Capacitors C4, C5 and C6 must be positioned as close as possible to the VDD and VSS power supply pins

SPEC-1587 (REV. 5) 15/18 29-09-2017

 SA4106A

PACKAGE DIMENSIONS

SOIC20 Package Dimensions are shown in inches

SPEC-1587 (REV. 5) 16/18 29-09-2017

 SA4106A

NOTES

SPEC-1587 (REV. 5) 17/18 29-09-2017

 SA4106A

DISCLAIMER
The information contained in this document is confidential and proprietary to Integrated Circuit Design Centre (Pty) Ltd ("ICDC"),
a division of South African Micro-Electronic Systems (Pty) Ltd ("SAMES"), and may not be copied or disclosed to a third party, in
whole or in part, without the express written consent of ICDC. The information contained herein is current as of the date of
publication; however, delivery of this document shall not under any circumstances create any implication that the information
contained herein is correct as of any time subsequent to such date. ICDC does not undertake to inform any recipient of this
document of any changes in the information contained herein, and ICDC expressly reserves the right to make changes in such
information, without notification, even if such changes would render information contained herein inaccurate or incomplete. ICDC
makes no representation or warranty that any circuit designed by reference to the information contained herein, will function
without errors and as intended by the designer.

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SPEC-1587 (REV. 5) 18/18 29-09-2017