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74F10 and 74F11 Gate Specifications

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0% found this document useful (0 votes)
51 views9 pages

74F10 and 74F11 Gate Specifications

Uploaded by

pakkamus
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

INTEGRATED CIRCUITS

74F10 Triple 3-input NAND gate


74F11 Triple 3-input AND gate

Product specification 1989 Sep 20

IC15 Data Handbook

 
   
Philips Semiconductors Product specification

Gates 74F10, 74F11

74F10 Triple 3-input NAND gate


74F11 Triple 3-input AND gate

TYPICAL TYPICAL ORDERING INFORMATION


TYPE PROPAGATION SUPPLY CURRENT COMMERCIAL RANGE
DELAY (TOTAL) DESCRIPTION VCC = 5V ±10%, PKG DWG #
74F10 3.5ns 3.3mA Tamb = 0°C to +70°C

74F11 4.2ns 5.3mA 14-pin plastic DIP N74F10N, N74F11N SOT27-1


14-pin plastic SO N74F10D, N74F11D SOT108-1

INPUT AND OUTPUT LOADING AND FAN OUT TABLE


PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
Dna, Dnb, Dnc Data inputs 1.0/1.0 20µA/0.6mA
Qn Data output (74F10) 50/33 1.0mA/20mA
Qn Data output (74F11) 50/33 1.0mA/20mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.

PIN CONFIGURATIONS
74F10 74F11
D0a 1 14 VCC D0a 1 14 VCC
D0b 2 13 D0c D0b 2 13 D0c

D1a 3 12 Q0 D1a 3 12 Q0

D1b 4 11 D2c D1b 4 11 D2c

D1c 5 10 D2b D1c 5 10 D2b

Q1 6 9 D2a Q1 6 9 D2a

GND 7 8 Q2 GND 7 8 Q2

SF00055 SF00056

LOGIC SYMBOLS
74F10 74F11

1 2 13 3 4 5 9 10 11 1 2 13 3 4 5 9 10 11

D0a D0b D0c D1a D1b D1c D2a D2b D2c D0a D0b D0c D1a D1b D1c D2a D2b D2c

Q0 Q1 Q2 Q0 Q1 Q2

12 6 8 12 6 8
VCC = Pin 14 VCC = Pin 14
GND = Pin 7 GND = Pin 7
SF00057 SF00058

September 20, 1989 2 853–0329 97683


Philips Semiconductors Product specification

Gates 74F10, 74F11

IEC/IEEE SYMBOLS
74F10 74F11
1 & 1 &
2 12 2 12

13 13

3 3

4 6 4 6

5 5

9 9

10 8 10 8

11 11

SF00059 SF00060

LOGIC DIAGRAMS
74F10 74F11
1 1
D0a D0a
2 12 2 12
D0b Q0 D0b Q0
13 13
D0c D0c
3 3
D1a D1a
4 6 4 6
D1b Q1 D1b Q1
5 5
D1c D1c

9 9
D2a D2a
10 8 10 8
D2b Q2 D2b Q2
11 11
D2c D2c
VCC = Pin 14 VCC = Pin 14
GND = Pin 7 GND = Pin 7
SF00061 SF00062

FUNCTION TABLE
OUTPUTS
INPUTS
74F10 74F11
Dna Dnb Dnc Qn Qn
L L L H L
L L H H L
L H L H L
L H H H L
H L L H L
H L H H L
H H L H L
H H H L H
NOTES:
1. H = High voltage level
2. L = Low voltage level

September 20, 1989 3


Philips Semiconductors Product specification

Gates 74F10, 74F11

ABSOLUTE MAXIMUM RATINGS


(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL PARAMETER RATING UNIT
VCC Supply voltage –0.5 to +7.0 V
VIN Input voltage –0.5 to +7.0 V
IIN Input current –30 to +5 mA
VOUT Voltage applied to output in High output state –0.5 to VCC V
IOUT Current applied to output in Low output state 40 mA
Tamb Operating free-air temperature range 0 to +70 °C
Tstg Storage temperature range –65 to +150 °C

RECOMMENDED OPERATING CONDITIONS


LIMITS
SYMBOL PARAMETER UNIT
MIN NOM MAX
VCC Supply voltage 4.5 5.0 5.5 V
VIH High-level input voltage 2.0 V
VIL Low-level input voltage 0.8 V
IIK Input clamp current –18 mA
IOH High-level output current –1 mA
IOL Low-level output current 20 mA
Tamb Operating free air temperature range 0 +70 °C

DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS1 UNIT
MIN TYP2 MAX
VCC = MIN, VIL = MAX ±10%VCC 2.5
VOH
O High level output voltage
High-level V
VIH = MIN, IOH = MAX ±5%VCC 2.7 3.4
VCC = MIN, VIL = MAX ±10%VCC 0.35 0.50
VOL
O Low level output voltage
Low-level V
VIH = MIN, IOl = MAX ±5%VCC 0.35 0.50
VIK Input clamp voltage VCC = MIN, II = IIK –0.73 –1.2 V
II Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
IIH High-level input current VCC = MAX, VI = 2.7V 20 µA
IIL Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
IOS Short-circuit output current3 VCC = MAX –60 –150 mA
ICCH VIN = GND 1.8 2.1
74F10 VCC = MAX mA
ICCL VIN = 4.5V 6.0 7.7
ICC Supply current (total)
ICCH VIN = 4.5V 4.7 6.2
74F11 VCC = MAX mA
ICCL VIN = GND 7.2 9.7
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.

September 20, 1989 4


Philips Semiconductors Product specification

Gates 74F10, 74F11

AC ELECTRICAL CHARACTERISTICS
LIMITS
VCC = +5.0V VCC = +5.0V ± 10%
SYMBOL PARAMETER TEST Tamb = +25°C Tamb = 0°C to +70°C UNIT
CONDITION
CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
tPLH Propagation delay 2.4 3.7 5.0 2.4 6.0
74F10 Waveform 1 ns
tPHL Dna, Dnb, Dnc to Qn 1.5 3.2 4.3 1.5 5.3
tPLH Propagation delay 3.0 4.2 5.6 3.0 6.6
74F11 Waveform 2 ns
tPHL Dna, Dnb, Dnc to Qn 2.5 4.1 5.5 2.5 6.5

AC WAVEFORMS
For all waveforms, VM = 1.5V.

Dna, Dnb, Dnc


VM VM Dna, Dnb, Dnc VM VM

tPHL tPLH tPLH tPHL

VM VM Qn VM VM
Qn

SF00064 SF00063

Waveform 1. Propagation Delay for Inverting Outputs Waveform 2. Propagation Delay for Non-Inverting Outputs
(74F10) (74F11)

TEST CIRCUIT AND WAVEFORM

VCC tw AMP (V)


90% 90%
NEGATIVE
VM VM
PULSE
10% 10%
VIN VOUT 0V
PULSE D.U.T.
GENERATOR tTHL (tf ) tTLH (tr )

RT CL RL tTLH (tr ) tTHL (tf )


AMP (V)
90% 90%
POSITIVE
PULSE VM VM

Test Circuit for Totem-Pole Outputs 10% 10%


tw 0V

DEFINITIONS: Input Pulse Definition


RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value. INPUT PULSE REQUIREMENTS
CL = Load capacitance includes jig and probe capacitance; family
see AC ELECTRICAL CHARACTERISTICS for value. amplitude VM rep. rate tw tTLH tTHL
RT = Termination resistance should be equal to ZOUT of
74F 3.0V 1.5V 1MHz 500ns 2.5ns 2.5ns
pulse generators.

SF00006

September 20, 1989 5


Philips Semiconductors Product specification

Gates 74F10, 74F11

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

1989 Sep 20 6
Philips Semiconductors Product specification

Gates 74F10, 74F11

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

1989 Sep 20 7
Philips Semiconductors Product specification

Gates 74F10, 74F11

Data sheet status


Data sheet Product Definition [1]
status status

Objective Development This data sheet contains the design target or goal specifications for product development.
specification Specification may change in any manner without notice.

Preliminary Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date.
specification Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make
specification changes at any time without notice in order to improve design and supply the best possible product.

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors  Copyright Philips Electronics North America Corporation 1998


811 East Arques Avenue All rights reserved. Printed in U.S.A.
P.O. Box 3409
Sunnyvale, California 94088–3409 print code Date of release: 10-98
Telephone 800-234-7381
Document order number: 9397-750-05056

 
   
yyyy mmm dd 8
This datasheet has been download from:

[Link]

Datasheets for electronics components.

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