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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2019.2950845, IEEE
Transactions on Industrial Electronics

Analysis and Optimal Design of High Frequency

and High Efficiency Asymmetrical Half-Bridge
Flyback Converters
Mingxiao Li, Student Member, IEEE, Ziwei Ouyang, Senior Member, IEEE
and Michael A.E. Andersen, Member, IEEE
Abstract—The asymmetrical half-bridge (AHB) efficiency at high frequency. Many publications have done
flyback converter is capable to achieve zero voltage excellent works on ACF design [9]-[17]. However, the high
switching (ZVS) and has lower voltage stress compared voltage stress for ACF is still a problem. It poses obstacles
to the active clamp flyback converter (ACF). This to components selection and transformer design.
topology gives much margin for components selection
and transformer turns ratio design. It is well adapted to
The AHB flyback converter has lower voltage stress
voltage step-down applications. However, the optimal compared to ACF and is also capable to achieve soft-
design for AHB flyback converter taking current dip switching, which is gaining popularity. It can achieve strong
effect causing by components parasitic capacitances, output voltage regulation through PWM control, which is
and each component effect to power loss into the same with ACF. On the other hand, LLC is not suitable
consideration has never been explored. This paper gives to be used in the applications with a wide input voltage
detailed operation and mathematical analyses of this range, whose regulation capability relies on the small
effect. The optimal design procedure with the inductance ratio of magnetizing inductance to resonant
consideration of each circuit parameter is presented in inductance. A large resonant inductor is required, leading to
this paper. The transformer benefits low power loss from
interleaving winding layout. A 56W/inch3 1MHz 65W
small power density and low efficiency. This topology is not
prototype with 100V-250V input is built to verify the considered in this paper.
feasibility of the converter. Experimental results show Many publications have done excellent analyses on AHB
the peak efficiency 96.5% is achieved with 127V input flyback converter. It can be regarded as a buck converter
and the whole system efficiency under the entire input with a transformer [18]-[23]. Thus it is well adapted to
voltage range is above 93%. voltage step-down applications. The switching loss is
reduced and a larger margin for components selection and
turns ratio design are given. Detailed operating principles
Index Term— AHB flyback converter, high efficiency, can be found in [18][20][22]. The hybrid-switching
voltage step down applications
technique is proposed in [23] to achieve ZVS for primary
switches and ZCS for the secondary rectifier. However, ZCS
I. INTRODUCTION
realization relies on the resonance between the resonant

W ith the increasing demand for size reduction and high

power density, high frequency operation provides a way
to achieve these goals. The emerging gallium nitride (GaN)
inductor and resonant capacitor. It leads to high primary and
secondary RMS current. Detailed analysis can be found in
this paper. Literature [24] gives conventional analysis and
devices open the door for Megahertz (MHz) range switching design procedure for AHB flyback converter, but the current
frequency operation. GaN devices show better performance dip effect is not considered. It affects primary and secondary
than silicon MOSFETs under a similar voltage and current RMS current.
ratings, such as smaller output capacitance, lower gate To obtain soft-switching properties, capacitances of
charge and smaller package. Thus GaN devices can be switches are always taken into consideration, as many
applied to a considerably high frequency converters design publications have explored [19][20][24][25]. However, the
[1]-[6]. current dip effect due to the current shared by the primary
Among many DC/DC converters, flyback converters have and secondary capacitances has never been mentioned or
been widely used in many applications, such as switching investigated in optimal design procedure for AHB flyback
mode power supplies, adaptors for tablets and smartphones, converters. At Mega Hz operation, they are of great
PV systems, etc. However, traditional flyback converter importance to design a high performance converter. This
operating at hard switching mode cannot reach high paper gives detailed analyses of the current dip effect due to
efficiency at high frequency. Both voltage and current stress the current shared by the primary and secondary
are very high due to the energy stored in transformer leakage capacitances, which affects both primary and secondary
inductance. The conventional passive clamping method RMS current and further power loss. This effect can be used
helps reduce the leakage energy by using the clamp resistor. to select primary and secondary switches. The flux
This reduces the switch voltage stress, but the efficiency is cancellation in the transformer is first mentioned in this
not improved. Active clamp flyback converters have been paper. The AHB flyback converter benefits low winding loss
proposed in [6]-[8] to fully utilize the leakage energy to from interleaving winding layout. Additionally, the impact
achieve soft-switching. It has been proved to achieve high of the resonant capacitor on primary and secondary RMS
current and the optimal magnetizing inductance design with
Manuscript received April 10, 2019; revised August 13, 2019 and the consideration of power loss are investigated. An optimal
September 16, 2019; accepted October, 2019. (Corresponding design procedure is given and iterations are then conducted
author: Ziwei Ouyang)
The authors are with the Department of Electrical Engineering, to select the turn ratio with minimum power loss. The half-
Technical University of Denmark, Kgs. Lyngby 2800, Denmark (e- turn winding paralleled concept proposed in [26] is adopted
mail: mingxli@[Link]; zo@[Link];ma@[Link]). to minimize the transformer AC resistance.

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This paper is organized as follows: Section II gives the voltage, regardless of the transformer turns ratio and output
detailed operating principle and analyses of the current dip voltage. Waveforms of the proposed converter operating
effect along with mathematical equations and waveforms. A close to the CCM/DCM mode boundary is shown in Fig.2.
comparison of the traditional ACF and the AHB flyback Since the operating principles of these two configurations
converter is also illustrated. The optimal design procedure is are identical, only the Fig.1(a) is analyzed. Both steady-state
described in Section III. A 56W/inch3 1MHz 65W with peak and operating principles analyses of this topology are
efficiency 96.5% prototype is demonstrated in Section IV. discussed in this section.
Section V concludes this paper.
A. Steady-state analyses
Vcr To analyze this circuit, the following assumptions are
Transformer made
iLr Lr —The output voltage Vo is a constant value
ids1
Q1
n:1
Csj —The resonant inductance Lr is much smaller than the
Lm iLm Vo magnetizing inductance Lm.
Vds1 Coss SR
—Conduction power losses of all switches are neglected.
Vin Q2 VSR is —The resonant capacitor Cr can be taken as a constant
voltage source.
Vds2 Coss
—The conduction times for Q1 and Q2 are (1-D)Ts and
DTs, respectively, where D is the duty cycle for Q2 and Ts is
(a) the switching period. Dead time is neglect in the steady-state
Q1 analysis.
Coss Based on the assumptions mentioned above, the voltage
transfer ratio Vo/Vin and the voltage across the resonant
Vcr capacitor Vcr can be obtained when voltage second balance
iLr Transformer
is applied to magnetizing inductance Lm. When the bottom
Vin Lr
switch Q2 turns on, the voltage across the transformer
Coss n:1 primary winding is Vin-Vcr and Q1 is clamped by the input
Q2 Csj voltage Vin. In the next time interval, Q2 turns off while Q1
Lm iLm Vo
SR turns on. The voltage applied to the transformer primary
winding becomes –Vcr . Q2 is clamped by the input voltage
VSR is Vin. Apply voltage second balance on magnetizing
(b) inductance and the voltage across the resonant capacitor can
Fig.1 On the top/bottom of the schematics
be expressed by (1)
Vgs2
D Vin  VCr   VCr 1  D 
VCr  Vin D (1)
Vgs1 The converter is operating close to the CCM/DCM
boundary with the relatively small magnetizing current. It
has a negligible effect on (1). The voltage-second-balance
iLr/iLm
law can still be used. The same approximation can be found
in [14][24][25].
nVo is applied to magnetizing inductance during the
is period when Q1 is on. If Lr cannot be ignored, Vcr should be
expressed by
 Lr 
VCr  nVo  1  
Vds2
Lm 
Vin Based on the given assumption, Lr is much smaller than
the magnetizing inductance Lm. Thus VCr is very close to the
Vds1 Vin reflected output voltage nVo. The same approximation can
be found in [14][24][25]. The voltage transfer ratio can be
Vd found in (2)
Vin/n
D Vin  VCr   nVo 1  D 
t1 t2t3 t4 t5 Vo D
td  (2)
Vin n
Fig.2 Waveforms of the proposed topology
Then the voltage across secondary synchronous rectifier
II. ANALYSES OF THE AHB FLYBACK CONVERTER (SR) when Q2 turns on, VSR can be found to be
Two configurations of the AHB flyback converter are VSR  Vin / n (3)
illustrated in Fig.1 (a) and Fig.1 (b), respectively. Q1 and Q2 TABLE I
form a half-bridge configuration. The switch node is COMPARISON BETWEEN TRADITIONAL ACF AND AHB FLYBACK
connected to the transformer and the resonant capacitor. The Vds1/Vds2 VSR Vo/Vin
switch Q1 toggles complementarily concerning Q2. Thus the ACF Vin+nVo Vin/n+Vo D/n(1-D)
AHB flyback Vin Vin/n D/n
voltage stress on Q1 and Q2 is always clamped by the input

2
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2019.2950845, IEEE
Transactions on Industrial Electronics

The comparison between ACF and AHB flyback 2Coss C ps

converter is shown in TABLE I. The voltage stresses for iLr  t   I Lm _ max  I Lm _ max cos r t 
2Coss  C ps 2Coss  C ps
both primary and secondary switches are reduced, which
offers much margin to select primary and secondary (7)
components and transformer turns ratio. It is also where
worthwhile to point out that the voltage stress for the 2Coss C ps
primary main switch of ACF is higher than Vin+nVo due to r  1/ Lr (8)
2Coss  C ps
the voltage across the leakage inductance. On the other hand,
that for the AHB flyback converter is always clamped by the Due to the large peak magnetizing current ILm_max, Q1 is
input voltage Vin. This provides a safe selection for primary usually fully discharged within one resonance period. The
switches. More importantly, since there is no 1-D in the maximum current dip when the resonance is longer than half
denominator of the voltage transfer ratio for the AHB period can be obtained by
flyback converter, it is more preferable to be used in voltage 2C ps
I dip _ max  I Lm _ max (9)
step down cases. In another word, the traditional ACF 2Coss  C ps
converter can be regarded as a buck-boost converter, while
the AHB flyback converter functions as a buck converter. Equation (9) illustrates that the resonant current dip is due
Its capability to step the voltage down is higher than the to the current shared by the primary and secondary
traditional ACF. With all mentioned merits, it is more capacitances. The maximum current dip is determined by the
preferable for voltage step down applications. ratio Cps /Coss.
If the resonance is shorter than the half period, the current
B. Operating principles analyses dip is lower. Actually, the resonance stops when Coss of Q1
Stage 1 (t1<t<t2): Q2 ZVS turns on at t1 and then the drain- is fully discharged or Csj of the secondary rectifier is fully
to-source voltage of Q1 Vds1 is clamped by input voltage Vin. discharged. The expressions for Vds1 and VSR are given as
The secondary rectifier is blocked. The energy is stored in follows:
the transformer. The magnetizing current im increases I Lm _ max t I Lm _ max C ps sin   r t 
linearly together with the resonant current iLr and can be Vds1  t   Vin   . (10)
2Coss  C ps 2Coss  C ps  r 2Coss
expressed by
Vin  VCr I Lm _ max t I Lm _ max C ps sin   r t 
iLr  t   iLm  t   iLr  t1   t (4) nVSR t   V in
  . (11)
Lr  Lm 2Coss  C ps 2Coss  C ps  r C ps
This time interval ends when Q2 turns off at t2. 150
Stage 2 (t2<t<t3): A current dip happens to the resonant Vds1(V)
current iLr during the transient period after Q2 turns off at
nVSR(V)
time t2, which can be observed from Fig.2. It affects both 100
primary and secondary RMS current. Detailed analysis of
this effect will be given in the following description.
iLr Lr Cps 50

VCr iLm
Lm nVo 0
Coss Tr/2 Tr
(a)
Vin
Coss 150
Fig.3 Equivalent resonance circuit
Vds1(V)
Resonance occurs among Lr, output capacitances Coss of 100 nVSR(V)
primary switches and secondary rectifier output capacitance
Csj. The equivalent circuit is shown in Fig.3. Cps is Csj
referred to the primary side. Assume the magnetizing current
im maintains the peak value ILm_max during this transient 50
period, which can be calculated by
nV 1  D   Ts  td 
I Lm _ max  I Lm _ avg  o (5) 0
2 Lm Tr/2 Tr
Io (b)
I Lm _ avg  I Lr _ avg  I s _ avg  (6) Fig.4 Vds1 and VSR waveforms during ZVS transition period when (a)
n Coss=8pF and Csj=200pF; (b)Coss=17pF and Csj=400pF
where td is the dead time as shown in Fig.2. Only the dead iLr
time between t4 to t5 is considered because it takes longer
time than that from t2 to t3 for the small reverse magnetizing Lr
current to charge and discharge the parasitic capacitances; Io Vcr iLm nVo
Lm
is the output current. The average resonant current ILr_avg is
zero when the law of charge balance is applied to the
resonant capacitor. Fig.5 Equivalent circuit of Lr and Cr resonant process
Then the resonant current iLr can be solved by [14]
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Large Coss and Cps give longer resonance, which is longer Stage 4 (t4<t<t5): The current dip also occurs during this
than half resonance period. In this case, VSR drops to zero ZVS transition period after Q1 turns off. The equivalent
first. By contrast, small Coss and Cps give short resonance, resonant circuit is also the same with the previous ZVS
which is shorter than half resonance period and Vds1 will transition period as shown in Fig.3, while the initial
drops to zero first. This phenomenon is shown in Fig.4. If conditions are different. The similar expression for resonant
the resonance is much smaller than the half resonance period current iLr is shown as follows:
Tr, sin(ωrt) can be replaced by ωrt. Vds1 decreases to zero 2 Coss C ps
i Lr  t   i Lr  t 4   i Lr  t 4  cos  r t  (22)
linearly. Thus it will not join in the resonance and the 2Coss  C ps 2 Coss  C ps
resonance current expressions can be solved by
Like in the previous ZVS transition period, the current dip
Vin  VCr
Lm  VCr occurs to the resonant current iLr. This is due to the current
Lm  Lr divider effect due to the output capacitance of primary and
iLr  t   I Lm _ max  sin  r1t  (12)
Z r1 secondary switches. The resonant current iLr ringing
amplitude is affected by the ratio Cps/Coss. High Cps/Coss may
Z r1  Lr / C ps , r  1 / Lr C ps (13) lead iLr to be positive, which affects the Vds2 decreasing rate.
If Cps is too large, it requires longer dead time for the
The maximum current dip becomes
resonant current iLr to discharge. This will affect the ZVS
Lr
Vin  VCr transition period at high frequency. The expression for Vds2
Lm 1 is
I dip _ max  (14)
1  Lr / Lm Z r1 I Lm _ min t I Lm _ min C ps 1
Vds 2  t   Vin   sin r t  (23)
Equation (14) shows when the resonance is less than half 2Coss  C ps 2Coss  C ps r 2Coss
resonance period, the ratio of Lr/Cps will affect the maximum
A simulation is conducted to illustrate this phenomenon.
current dip. Since the magnetizing inductance Lm is much
larger than Lr, Idip_max depends on Zr1. As shown in Fig.6, the blue curve with low Cps is decreasing
Stage 3 ( t3<t<t4): After the current dip happens to iLr, Q1 faster and turns off earlier than the red curve with high Cps.
In high frequency converter design, dead time control is of
and secondary rectifier start to conduct current. Resonance
occurs between Lr and Cr. The difference between iLr and iLm great importance. It is desirable to have a very short ZVS
is transferred to the secondary side. The magnetizing transition period to minimize the circulation power loss.
inductance is clamped by nVo. The resonant process of Lr 120
and Cr is the same with traditional active clamp flyback Cps/Coss=2.86
100
converter, but the initial conditions are different. The Cps/Coss=1
Vds(V)

equivalent resonant circuit is shown in Fig.5 and the 80

expressions for magnetizing current iLm and resonant current 60
iLr during this time interval are shown as follows 40
nVo
iLm  t   I Lm _ max  t (15) 20
Lm
 nV  sin
0 20 40 60 80 100 120
 VCr _ ini t(ns)
iLr  t   I Lr _ ini cos  t   t 
o
 (16) Fig.6 Drain-to-source voltage for Q2 during ZVS transition time
Z
( I Lm _ max  I Lm _ min ) DTs Additionally, due to the small ILm_min, it takes several
VCr _ ini  nVo  (17) resonant periods to fully discharge Q2. This can also be
2Cr observed in Fig.6. On the other hand, the magnetizing
nVo 1  D  (Ts  td ) current ILm_max is much larger than ILm_min. During the ZVS
I Lm _ min  I Lm _ avg  (18) transition after Q2 turns off, Q1 is usually fully discharged
2 Lm
within one resonant period. The decreasing rate of Vds1 is
almost linear. Therefore, only the dead time from t4 to t5 is
Lr considered.
  1 / Lr Cr , Z  (19)
This period ends when Q2 is fully discharged and realizes
Cr
ZVS turn on. Q1 will be clamped by the input voltage.
where VCr_ini is the initial voltage across the resonant
capacitor before the resonance starts and can be estimated TABLE II
based on the charge balance; ILm_min is the minimum SPECIFICATION
magnetizing current; ILr_ini is the resonant current after the Quantity Range
current dip. It can be expressed by Vin(V) 100~250
Vo(V) 19.3
2Coss  C ps Po(W) 65
I Lr _ ini  I L _ max (20) fs 1MHz
2Coss  C ps
m

or III. OPTIMAL DESIGN PROCEDURE

Vin  VCr
Lm  VCr The specification is shown in TABLE II. Since the
Lm  Lr voltage stress for primary devices is reduced to input voltage
I Lr _ ini  I Lm _ max  (21) Vin for the proposed topology, both switches and turns ratio
Z r1
selection have a larger margin than traditional ACF. In this
depending on the resonance longer or shorter than the half design, the converter is designed to operate at discontinues
resonance period. conduction mode (DCM). The negative iLm helps ZVS

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operation. The resonant inductance Lr is integrated into the C. Primary and secondary RMS current
transformer by using its leakage inductance. The optimal The RMS current should be calculated first to estimate the
design procedure will be given in this section. power loss. The definition equation of RMS is
1 a
b i(t)
2
I rms  dt (26)
iLr iLr iLm Ts
iLm
I III
Combine (16), (17) and (26), the RMS current on Q1
II IV Ids1_rms can be described. Maple is used to solving the bulky
equation. Similarly, combine (4) and (26), the RMS current
on Q2 Ids2_rms is derived. The resonant current RMS value
is ILr_rms can be calculated by
is
I Lr _ rms  I ds1_ rms 2  I ds 2_ rms 2 (27)
(a) (b) The secondary current is is the difference of the
Fig.7 Comparison of ideal transformer winding current in (a)
magnetizing current to resonant current from t3 to t4, which
traditional ACF and (b) AHB flyback
can be expressed by
A. Considerations of transformer power loss is (t)  iLm  t   iLr  t  (t3  t  t4 ) (28)
Transformer power loss consists of core loss and winding Combine (5),(6),(15) to (21) and (28), the secondary
loss. Core loss increases significantly at high frequency. RMS current Is_rms is derived. The impact of magnetizing
The core material ML91S from Hitachi shows good inductance on primary and secondary RMS current is
performance at 1MHz [34] and is selected for the core summarized in Fig.8. It can be concluded that the
material. magnetizing inductance should be maximized as possible to
Flux cancellation for the traditional ACF is pointed out in reduce power loss. Meanwhile, it should be smaller enough
[15], as shown in Fig.7 (a). The negative primary current to discharge all parasitic capacitances during dead time. The
helps the flux cancellation in the transformer and winding optimal magnetizing inductance and corresponding dead
loss will be reduced compared to the traditional flyback time can then be determined from Fig.9 referring to (25).
converter. Actually, this is because the resonant capacitor
has to satisfy the law of current-second-balance during the
resonant period. The shaded area I should be exactly the 14
(td_opt,Lm_opt)
same with area II as shown in Fig.7(a). On the other hand, 12
since the resonant capacitor of the AHB flyback converter is 10
connected in series with the transformer, the current-second-
Lm(uH)

8
balance law is applied during the whole switching period.
The shaded area III should be exactly the same with area IV 6
as shown in Fig.7 (b). As a result, it also achieves flux 4
cancellation and the current is also evenly distributed in the
2
winding like traditional ACF.
0
B. Magnetizing inductance design 0 50 100 150 200 250 300 350
td(ns)
In order to achieve ZVS turn-on for Q2, the magnetizing Fig.9 Magnetizing inductance versus dead time
inductance should be designed to provide enough negative 1.7 7
current. The ZVS realization can be described by the charge ILr_RMS
ILr_RMS(A)

1.6 Is_RMS 6.5

balance Is_RMS(A)
1.5 6
Vin
I Lm _ min td  2CossVin  C ps  CwVin (24) 1.4 5.5
n
where Cw is the transformer parasitic capacitance referred to 1.3 5
the primary side. Combine (6), (18) and (24), the 1.2 4.5
100 200 300 400 500 600 700 800 900 1000
magnetizing inductance can be derived in (25). The optimal
Cr (nF)
magnetizing inductance can be designed from the analysis Fig.10 Resonant capacitor impact on primary and secondary RMS
of RMS current. current
n Vo 1  D   Ts  td  td
2

Lm  (25) D. Resonant capacitor design

 4nC oss 
 2C ps  2nCw Vin  2I o td The turn-off current on auxiliary switch Q1 and secondary
5 12 rectifier is small if the resonant current iLr is close to the
magnetizing current iLm at the end of resonance. In this case,
Isec_rms(A)

4 ILr_rms 10 a small Cr is desirable to obtain the low turn-off current

ILr_rms(A)

Is_rms through the high side Q1 and secondary rectifier. However,

3 8
both primary and secondary RMS current increase with the
2 6 smaller Cr, as shown in Fig.10. On the other hand, the larger
Cr means smaller RMS current while larger turn-off current
1 4 on auxiliary switch Q1 and secondary rectifier. The AHB
2 3 4 5 6 7 8 9 10 11 12
Lm(uH) flyback converter has significantly reduced the voltage
Fig.8 Lm impact on ILr_rms and Is_rms stress on active components. Thus the turn-off loss is greatly
reduced. The large Cr is desirable to minimize conduction
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Transactions on Industrial Electronics

loss after iteration. An iteration is needed for the optimal design.

TABLE III
1.3 7
ILr rms CIRCUIT PARAMETERS
Is_rms
Circuit parameters Value

Is_rms(A)
ILr rms(A)1.2 6
Primary devices GS66502B
Secondary rectifier EPC2033
Magnetizing inductance Lm 11uH
Resonant inductance Lr 195nH
1.1 5
Resonant capacitance Cr 430nF
Magnetic core EI22/6/16-ML91S
Turns ratio 6:2
1 4
0 5 10 15 20
Cps/Coss
Start
Fig.11 Primary and secondary RMS current under different Cps/Coss
when Vin=127V, n:1=3:1
2 n:1?

1.9
Primary and secondary
Ptotal(W)

1.8
device selections

1.7 Min（Cps/Coss,Ptotal） Lr,Cr and Lm design

1.6 winding layout and

0 5 10 15 20
magnetic core selection
Cps/Coss
Fig.12 Cps/Coss impact on converter total power loss
Calculate Ploss
E. Current dip effect
The impact of the current dip causing by the current
divider effect of primary and secondary output capacitance Loss comparison
is investigated and summarized in Fig.11. 2Coss+Cps is kept
constant to ensure the same negative magnetizing current.
Larger Cps/Coss contributes to higher Is_rms. On the other hand, nopt:1 with Ploss_min
ILr_rms is decreasing to a certain value and then increasing. Fig.14 Optimal design flow chart
Therefore, the secondary SR should be selected taking into
consideration the whole converter power loss. The Based on the design procedure as mentioned above, a flow
relationship of converter total power loss Ptotal and Cps/Coss chart is made to obtain the optimal design, as shown in
is shown in Fig.12. Cps/Coss between 2 and 4 achieves Fig.14. Iterations for the optimal turns ratio selection are
minimal loss. This can be used to select primary and performed and the corresponding power loss when
secondary switches. Given that switches of specific Vin=100V is shown in Fig.13. 6:2 yields the minimum power
characteristics change slightly in different devices of the loss and is determined for the transformer design. Finally,
same part number, the primary and secondary switches are the circuit parameters are listed in TABLE III. GaN devices
selected referring to information in the datasheet. 650V GS66502B from GaN system are selected for primary
switches due to the lower output capacitance compared to
5
350V EPC2050. GaN devices with lower voltage ratings, for
4
example, 300V, can be selected when they are available in
the market. EPC2033 is used for secondary SR. The ratio of
Cps/Coss is 2.87.
Ploss(W)

3
To operate at MHz frequency, planar transformers
2 illustrate better performance than conventional transformers
[26]-[32]. Secondary windings are connected in parallel to
1 further reduce winding loss. A half-turn paralleled winding
practice is first proposed in [26]. The paralleled winding
2:2 4:2 6:2 8:2 10:2 structure along with the magnetomotive force (MMF)
n:1 distribution is shown in Fig.15. The number of layers mp for
Fig.13 Total power loss under different turns ratio
primary windings and ms for secondary windings can be
F. Turns ratio selection derived from the MMF distribution, which is 0.5 and 1,
The turns ratio selection is of great importance to design respectively. The current distribution conducted by 2-D FEA
a high efficiency converter. It has several impacts on the simulation at 1 MHz shown in Fig.16. Air gaps are created
converter design. For ACF converters, both primary and on all three legs of the magnetic core E22/6/16. The current
secondary switches selections are relating to the turns ratio, distribution for secondary windings S1_1 located on the top
as shown in TABLE I. However, for the AHB flyback and S2_2 located on the bottom are identical, while they are
converter, the voltage stress for the primary switches is Vin, a little bit lower than the current distribution for S1_2 and
which has no relation with the turns ratio. Moreover, the S2_1 in the middle having the same current distribution. The
turns ratio selection also affects both primary and secondary secondary current can be taken as uniformly distributed in
RMS current [15] and transformer core loss. In other words, this paralleled winding structure. Thus this winding structure
the converter total power loss is affected by the turns ratio. contributes to a low AC winding loss.

6
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2019.2950845, IEEE
Transactions on Industrial Electronics

-1.5I MMF 1.5I several aspects. High switching frequency contributes to

S1_1 ms1-1=1
Parallel P1
Insulator
P2 P3 mp1-3=0.5
high AC resistance, high switching loss (turn-off loss in this
Insulator
S1_2 ms1-1=1
case) and high core loss, but it improves the power density.
Insulator
S2_1 ms2-1=1
The switching frequency in this paper is 1MHz, but
Parallel P6
Insulator
P5 P4 mp4-6=0.5
comparable efficiency is still achieved. Those operating at
Insulator
S2_2 ms2-2=1 1MHz are illustrated in [37] and [33] and the peak efficiency
for these converters are 90.1% and 93%, respectively. Hence,
Fig.15 Half-turn paralleled winding structure and MMF distribution the proposed AHB flyback converter is quite competitive.
The uncertainty analysis is done to justify the measured
peak efficiency. Type A, Type B and combined standard
uncertainty are summarized in TABLE V. It should be noted
here that the confidence level is not given in datasheet of the
measurement. 95% confidence level is assumed and the
coverage factor is selected to be 2.
The built prototype verifies the effectiveness of the
optimal design procedure. It benefits from the better high
frequency performance core material and interleaved
Fig.16 Current density distribution conducted by 2-D FEA winding layout. Taking the impact of the current dip effect
simulation at 1 MHz
into consideration, primary and secondary switches are
selected to minimize the power loss. Together with the
24mm optimal design of magnetizing inductance, resonant
capacitor and turn ratio selection, a high performance
converter is built.
90mm
Vds_Q2
Fig.17 1MHz 65W prototype with 56W/inch3 power density 50V/div

IV. EXPERIMENT VERIFICATION iLr

Current dip 45ns
A 1MHz, 65W, 19.3V prototype is built to verify the 2A/div
feasibility of the converter, as shown in Fig.17. GaN devices
are used for both primary and secondary switches. Fig.18 200ns/div
shows the measured drain-to-source voltage waveform of Q2
(a)
and the resonant current waveform when input DC voltage
is 127V. ZVS for Q2 is achieved despite the deceasing rate
is affected by the resonance that happens to iLr. As discussed
Vds_Q2
in Section II, iLr ringing amplitude is affected by Cps/Coss.
50V/div
High Cps/Coss may lead iLr to be positive, which affects the Current dip
105ns
Vds1 decreasing rate. The current dip effect during ZVS
iLr
transition time can be easily observed from Fig.18 (b) with 2A/div
an external 330pF film capacitor connected in parallel with
the secondary rectifier. The ZVS transition time becomes 200ns/div
obviously longer than the converter without external Csj.
(b)
This proves the effectiveness of previous analysis in Section Fig.18 Experimental waveforms tested at 127Vds : (a) without
II. external Csj (b) with 330pF external Csj
Efficiency curves under whole input voltage range at full
load condition are shown in Fig.19. The output current Io 97.00%
was measured by the multi-meter Keysight 34465A. The 96.00%
95.00%
output voltage Vo, input voltage Vin and input current Iin are
94.00%
measured by three multimeters Agilent 34410A, 93.00%
respectively. The 96.5% peak efficiency is achieved when 92.00%
the input voltage is 127V for the converter without external 91.00%
Csj. The total system efficiency is above 93% under the 90.00%
Built prototype
89.00%
whole input voltage range. 88.00% Ref.[23] 2016
The Efficiency curves comparison with the converter 87.00%
built in [23] is given in Fig.19. The converter presented in 95V 127V 140V 185V 263V
this paper is almost higher than the others under the whole Fig.19 Efficiency curves measured at full load conditions
input voltage range. Loss break down at 127V is shown in TABLE IV
[Link] loss and conduction loss dominates. The EFFICIENCY COMPARISON
detailed comparison shown in TABLE IV proves the Frequency Efficiency
effectiveness of the optimal design procedure given in Ref.[35] 200kHz 96.40%
Chapter III. The peak efficiency of converters built in [35] Ref.[36] 200kHz 96.25%
Ref.[37] 1MHz 90.10%
and [36] is 96.4% and 96.25%, respectively. However, these Ref.[33] 1MHz 93%
converters are operating at a low frequency around 200 kHz. This paper 1MHz 96.50%
Switching frequency affects the converter total power loss in
7
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2019.2950845, IEEE
Transactions on Industrial Electronics

circuit to achieve soft-switching in flyback converters", IEEE

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2019.2950845, IEEE
Transactions on Industrial Electronics

Electronics, vol. 34, no. 5, 2019, pp. 4465-4479. Michael A.E. Andersen (M’88) received the
[29] M. Li, Z. Ouyang and M. A. E. Andersen, “High frequency LLC [Link].E.E. and Ph.D. degrees in power
resonant converter with magnetic shunt integrated planar electronics from the Technical University of
transformer,” IEEE Trans. Power Electron, 2018. Denmark, Kgs. Lyngby, Denmark, in 1987
[30] M. A. Saket, N. Shafiei and M. Ordonez, “LLC Converters with and 1990, respectively. He is currently a
planar transformers: issues and mitigation," IEEE Trans. Power Professor of power electronics at the
Electron., vol. 32, no. 6, pp. 4524-4542, Jun. 2017. Technical University of Denmark, where
[31] X. Liu, R. Burgos, B. Sun, and D. Boroyevich, “Wide-input- since 2009, he has been the Deputy Head of
voltagerange dual-output GaN-based isolated DC-DC converter for the Department of Electrical Engineering. He
aerospace applications,” in Proc. IEEE Appl. Power Electron. Conf. is the author or coauthor of more than 300
Expo., Tampa, FL, USA, 2017, pp. 279–286. publications. His research interests include
[32] B. Sun, R. Burgos and D. Boroyevich, "Ultra-low Input-Output switch-mode power supplies, piezoelectric
Capacitance PCB-Embedded Dual-Output Gate-Drive Power Supply transformers, power factor correction, and switch-mode audio power
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Electronics.
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Density Active-Clamped Flyback Converter.” International Power
Electronics Conference (IPEC) 2018, IEEE, pp.2092-2096
[34] C. Fei, F. C. Lee, and Q. Li, “High-efficiency high-power-density
LLC converter with an integrated planar matrix transformer for high
output current applications,” IEEE Trans. Ind. Electron., vol. 64, no.
11, pp. 9072–9082, Nov. 2017.
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Chang, “Flyback converter with hybrid clamp,” 2018 IEEE Applied
Power Electronics Conference and Exposition (APEC), 2018.
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Methods of Active Clamp Flyback for Adaptor Application,” 2018
IEEE International Power Electronics and Application Conference
and Exposition (PEAC), 2018.
[37] F.-C. Syu, S.-C. Yeh, Y.-C. Chang, J.-Y. Lin, Y.-C. Hsieh, H.-J.
Chiu, M. Hojo, and K. Yamanaka, “Design and implementation of 1
MHz active-clamped resonant flyback converter,” IECON 2017 -
43rd Annual Conference of the IEEE Industrial Electronics Society,
2017.
Mingxiao Li received the B.S degree in
electrical engineering from Chongqing
University, Chongqing, China, in 2016
and M.S. degree in electrical
engineering in 2018 from Technical
University of Denmark, Kongens
Lyngby, Denmark, where he is currently
working toward the Ph.D degree in
electrical engineering.
His research interests include
magnetics design, modeling and
integration in power supplies, resonant
converters and high frequency power conversion.

Ziwei Ouyang (S’07, M’11, SM’17)

received the Ph.D. degree from the
Technical University of Denmark
(DTU), Kgs. Lyngby, Denmark, in
2011. From 2011 to 2013, he was a
Postdoc Researcher with DTU. From
2013 to 2016, he was appointed as an
Assistant Professor at DTU. Since
April 2016, he has been an Associate
Professor with DTU. His research
areas focus on high-frequency planar
magnetics modeling and integration,
high-density high-efficiency power
converters, PV battery energy storage system, and wireless
charging etc. He is currently responsible for the Power Electronics
course for both undergraduate and graduate students at DTU, and
he also supervised more than 40 students’ Postdoc, Ph.D., and
Masters projects. He has more than 60 high impact IEEE journal and
conference publications, and has coauthored a book chapter on
Magnetics for the Handbook of Power Electronics and currently is
the holder of 8 international patents.
Dr. Ouyang was the recipient of the Young Engineer Award at PCIM-
Asia 2014, and the Best Ph.D. Dissertation of the Year Award 2012
in Technical University of Denmark, and several Best Paper Awards
in IEEE sponsored international conferences. He has served as the
session Chair in some IEEE sponsored conferences and a Reviewer
for the IEEE TRANSACTIONS ON POWER ELECTRONICS and
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS.

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