VISVESVARAYA TECHNOLOGICAL UNIVERSITY
Jnana Sangma Belagavi-590018, Karnataka
A REPORT
On
On Board Communication Interface(SPI)
Submitted to [Link] M L
(Embedded systems)
Bachelor of engineering in Electronics & Communication Engineering
Submitted by
NAME: AZRA FATHIMA
USN: 1DB20EC009
DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
DON BOSCO INSTITUTE OF TECHNOLOGY
Kumbalagodu, Mysore Road, Bangalore 560074 [2022-2023]
INTRODUCTION
Serial Peripheral Interface (SPI) BusSerial peripheral interface (SPI) is one of the
most widely used interfaces between microcontroller and peripheral ICs such as
sensors, ADCs, DACs, shift registers, SRAM, and others. This article provides a
brief description of the SPI interface followed by an introduction to Analog
Devices’ SPI enabled switches and muxes, and how they help reduce the number
of digital GPIOs in system board design.
SPI is a synchronous, full duplex main-subnode-based interface. The data from the
main or the subnode is synchronized on the rising or falling clock edge. Both main
and subnode can transmit data at the same time. The SPI interface can be either 3-
wire or 4-wire. This article focuses on the popular 4-wire SPI interface.
Serial Peripheral Interface (SPI)Bus.
The Serial Peripheral Interface Bus (SPI) is a synchronous bi-directional
full duplex four-wire serial interface bus.
The concept of SPI was introduced by Motorola.
SPI is a single master multi-slave system.
There can be more than one masters, but only one master device can be
active.
SPI requires four signal lines for communication. They are:
1. Master out slave in (MOSI)- Signal line carrying the data from master
to Slave [Link] is also known as Slave Input/Slave Data in(SI/SDI).
2. Master in Slave Out(MISO)-Signal line carrying the data from slave to
Master [Link] is also Known as Slave output(SO/SDO).
3. Serial Clock(SCLK)-Signal line carrying the clock signals.
4. Slave Select(SS)-Signal line for slave device select device [Link] is
an Active low signal.
The master device is responsible for generating the clock signal.
It selects the required slave device by asserting the corresponding slave
device's slave select signal 'LOW’.
The data out line (MISO) of all the slave devices when not selected
floats at high impedance state.
The serial data transmission through SPI bus is fully configurable.
SPI devices contain a certain set of registers for holding these
configurations.
Figure : SPI Bus Interfacing.
SPI works on the principle of 'Shift Register’.
The master and slave devices contain a special shift register for the
data to transmit or receive.
The size of the shift register is device dependent. Normally it is a
multiple of 8.
During transmission from the master to slave, the data in the master's
shift register is shifted out to the MOSI pin and it enters the shift register
of the slave device through the MOSI pin of the slave device.
At the same time the shifted out data bit from the slave device's shift
register enters the shift register of the master device through MISO pin.
In summary, the shift registers of 'master' and 'slave' devices form
a circular buffer.
When compared to I2C, SPI bus is most suitable for applications
requiring transfer of data in 'streams'.
The only limitation is SPI doesn't support an
acknowledgement mechanism.
CONCLUSION
The Serial Peripheral Interface has been around for decades, and there is no reason
to expect it to go away anytime soon. While I2C and UART might enjoy more
popularity, SPI is a versatile and straightforward serial-communications interface
that is excellent for certain applications.
What is the importance of SPI protocol?
An SPI operates in full duplex mode.
This means that data can be transferred in both directions at the same time. The
SPI is most often employed in systems for communication between the central
processing unit(CPU) and peripheral devices. It is also possible to connect two
microprocessors by means of SPI.
