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22 views8 pages

Ijisa V4 N10 4

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Fernando Lessa
Copyright
© © All Rights Reserved
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I.J.

Intelligent Systems and Applications, 2012, 10, 35-42


Published Online September 2012 in MECS (http://www.mecs-press.org/)
DOI: 10.5815/ijisa.2012.10.04

Design and Implementation of Fuzzy Controller


on FPGA
Mani Shankar Anand
Department of Electrical Engineering, Indian Institute of Technology, Roorkee, India
[email protected]

Barjeev Tyagi
Department of Electrical Engineering, Indian Institute of Technology, Roorkee, India
[email protected]

Abstract— Fuzzy Logic Controller (FLC) systems have implementation of a FLC in VHDL was driven by the
emerged as one of the most promising areas for need for an inexpensive hardware implementation of a
Industrial Applications. The high ly growth of fu zzy generic fu zzy controller for use in industrial and
logic applicat ions led to the need of finding efficient commercial applications [13]. We have taken a simp le
way to hardware implementation. Field Programmab le FLC for an armature control DC motor speed control.
Gate Array (FPGA) is the most important tool for Error and change in error in speed has been used as two
hardware implementation due to low consumption of inputs to FLC. For both the inputs 5 triangular
energy, high speed of operation and large capacity of membership function has been selected and coded in
data storage. In this paper, instead of an introduction to VHDL. An algorith m has been developed in VHDL to
fuzzy logic control methodology, we have demonstrated fuzzifie the crisp digital values of speed error and rate
the implementation of a FLC through the use of the of change of error. Sugeno type FLC structure has been
Very high speed integrated circuits Hardware used to obtain the controlled output. The controller
Description Language (VHDL) code. FLC is designed algorith m developed synthesized, simulated and
for an armature control DC motor speed control. VHDL implemented on FPGA Spartan 3E xc3s500e -4fg320
has been used to develop FLC on FPGA . A Sugeno type board. The FLC has been design using system generator
FLC structure has been used to obtain the controller approach. The results of the FLC imp lemented on
output. The controller algorithm developed synthesized, FPGA have been compared with the results obtained
simu lated and imp lemented on FPGA Spartan 3E using PID and FLC on MATLAB Simulink.
xc3s500e-4fg320 board.

II. System Description


Index Terms—FLC, VHDL, Hard ware Implementation,
DC servomotors used in many applicat ions, such as
FPGA
steel rolling mills, electric trains, and robotic
man ipulators, require speed controllers to perform tasks
[4]. There are numerous control algorith ms; however,
I. Introduction
the PID control is the most popular because of its
The past few years have witnessed a rapid growth in simp licity. Major problems in applying a conventional
the number and variety of application of fuzzy logic. control algorithm in a speed controller are the effects of
The application ranges from consumer products such as nonlinearity in a DC motor. The nonlinear
cameras, washing machines, cars and in industry for characteristics of a DC motor such as saturation and
med ical instrumentation, underground trains and robots. friction could degrade the performance of conventional
Unlike the conventional controller FLC design is not controller. Every control project starts with plant
based on the mathemat ical model of the plant or system. modelling, so as much info rmation as possible is given
A FLC is an auto matic controller that controls an object about the process itself. The mechanical-electrical
in accordance with desire behaviour. For a co mplex model of the servomotor is presented in Fig.1.
system whose mathemat ical model is very difficult to
define or the transfer function of a plant is undefined,
fuzzy logic controllers are very useful in that case [1,3].
The control action of FLC is defined in terms of simp le
human friendly ―if – then rules‖. These set of rules are
describe the system behaviour. These set of rules are
called the knowledge base of fuzzy controller. We can
easily change the rules accordance with our desire
output. So the development t ime for a new controller
can be significantly reduced as compared to
conventional one [7]. The motivation behind the Fig.1. Model of DC motor

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
36 Design and Implementation of Fuzzy Controller on FPGA

According to the electrical-mechanical diagram III. Implementati on of FLC in VHDL


presented in Figure1, the linear model can be derived by
The widely used method for Fuzzy Logic is Mamdani
the following dynamics governing equations:
style because of its simplicity and its co mpatibility with
  Kt i human made decision. A lthough Mamdani Style is
(1) widely used, it is not suitable for this implementation.
. This is because, the Mamdani method requires finding
Vemf  Kb  the centroid of a two -dimensional shape by integrating
(2)
across a continuously varying function. This method is
.. .
not computationally efficient. It is also not suitable
J    f   Kt i
(3) because its output use triangle or trapezoidal
membership function to describe the output and its
di
E  Vemf   L  Ri defuzzificat ion calculation is complicated to be done in
dt (4) VHDL despite the results are not necessary effective or
better[7]. Sugeno style is much more suitable to be used
Equations (1) to (4) constitute the two main in this situation. This is because, the output of this
differential equations. Their transformation leads to method, uses a single spike, singletons to describe the
state space form: outputs where there is a unity at single part icular point
 ..  and zero elsewhere. This causes all the output of each
.
    f / J Kt / J     0  fuzzy rule to be constant [8].
 .     K / L  R / L   i   1/ L  E
i   b     1) Fuzzification
   
(5) The first component in the FLC is the fuzzifier that
. converts crisp inputs into a set of membership values in

y  1 0    . the interval [0,1] in the corresponding fuzzy sets. In this
 i  paper, triangular membership functions (triangular
 
membership function being a special case of the
Fro m Eq. (5), it is clear that the DC motor is a SISO trapezoidal function) are used for two inputs Erro r and
plant; however, the output choice of the model changes change in error in speed [8]. Each of inputs is
on the control scheme, we adopt, i.e., either velocity or represented by 5 membership functions, which are NB
position control. (Negative Big), NM (Negative Medium), ZE (Zero),
PM (Positive Mediu m), PB (Positive Big) as shown in
The closed-loop transfer function of the DC motor
Fig.2 and Fig.3.
can be calculated using Eq. (5) as
w( s) Kt
Gv ( s)   (6)
e( s) JLs  ( JR  fL)s  fR  Kb Kt
2

where E is the armature voltage of a dc motor, state


variable x = [w i] T, where i and w are the armature
current and shaft rotational speed respectively, All
motor parameter are obtained by standard system
identification as shown in Table 1[12]
T able I DC Motor parameters
Parame te r Description Value
Armature
R 4.67 Ω Fig.2. Input Membership Functions for Error
resistant
L Armature inductance 170e-3 H
J Moment of inertia 42.6e-6 Kg-m 2
Viscous-friction 47.3e-6 N-
f
coefficient m/rad/sec
Kt T orque constant 14.7e-3 N-m/A
Kb Back-EMF constant 14.7e-3 V-sec/rad

Putting the value of all parameter we can get the


transfer function
14700
Gv ( s)  (7)
7.242s  206.983s  436.981
2

Fig.3. Input Membership functions for change in error

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
Design and Implementation of Fu zzy Controller on FPGA 37

In fu zzificat ion, the degree of membership function is type mfs_functions is array((natural range <>) of mfs;
determined. This is done by locating the location of the constant linguistic_name: mfs_functions:=
input in the membership function and determines the ((linguistic => term, point1=> x"04", slope1 => x"7F",
degree of the membership function. The degree of the point2 => x"09", slope2 => x"55"),
membership function is fro m 0 to 1 where in this paper, (linguistic => none, point1=> x"FF" , slope1=>
it is represented by X00 and XFF (―X‖ sign indicates x"FF", point2 => x"FF", slope2 => x"FF"));
hexadecimal number representation).
After declarat ion of membership functions we have
In VHDL, Each trapezo idal membership function is
to calculate the degree of membership function. Since a
defined by two points and two slopes values. The entire
specific input value only intersect at most two
membership function can be divided into three
membership functions to create the degree of
segments: I, II and III as shown in Fig4. The Y axis
membership function for the corresponding input, so
shows the degree of membership function (µ) as a value
most of them will be zero.
between 0 and 1. The X axis shows the universe of
discourse and is div ided into three segments. The The follo wing algorith m illustrates the procedure of
degree of membership depends on the location of the this process:
input value with reference to these segments. Fig4
shows how trapezoidal input membership functions are
Fuzzification ();
formed in the fuzzification process [8].
Set n = number of membership function
µ = array of degree of membership function
m = array of membership function
start loop for i = 1 to n
if input value < m[i].point1 then µ[i]=0;
else if input value < m[i].point2 then µ[i]=(input value-
m[i].point1) × m[i].slope1;
else µ[i]= 255- (input value – m[i].point2)
×m[i].slope2;
end if;
end loop;

2) Rule Inference
The degree of membership is determined in the
fuzzification stage. The next step is to create rules to
Fig.4. T rapezoidal T ype Membership Function decide what action should be taken in response to the
given set of degree of membership function. The ―AND‖
The calculation of the degree of membership (µ) can and ―OR‖ fu zzy operators are best used for rules with
be categorized into three different segments: (a) in mu ltip le antecedents. The fuzzy operator, ―OR‖ is used
segments I: µ = 0, (b) in segments II: slope is upward to evaluate the disjunction of the rules antecedents and
fro m left to right, therefore: µ = (Input value – point 1) ―AND‖ is used to evaluate the conjunction of the rules
* slope1, where µ is limited to a maximu m value of 1, antecedents. ―AND‖ fu zzy operator is since it is
(c) in segments III: slope is downward fro m left to right, required to evaluate the conjunction of the rules
therefore: µ = 1 - (Input value – point 2) * slope2, antecedents. Since ―AND‖ is the minimu m operation
where µ is limited to a minimu m value of 0. The value between mult iple antecedents, the minimu m function is
of slope1 and slope2 can be calculated as follows: used. The ―OR‖ fuzzy operator also can be used when
more than one ru les involved with the same output. The
rule base of system is defined in Table 2[12].
Slope 1 = 1 / (b - a) = XFF / (b - a) = 255 / (b -a) (8)
T able 2 Fuzzy final rules
Slope 2 = 1 / (d - c) = XFF / (d - c) = 255 / (d -c) (9)
E CE NB NM ZE PM PB
PB NM NS NB PB PB
Declaration of membership functions in VHDL as PM NM NM NB PB PB
follows:
ZE NB NB ZE PB PB
NM NB NB NB PM PM
type input is (term, none); NB NB NB NB PS PM
type mfs is record linguistic: input;
point1: std_logic_vector (7 downto 0); Below is the example of imp lementation of rules and
slope1: std_logic_vector (7 downto 0);
the minimum and maximu m;
point2: std_logic_vector (7 downto 0);
slope2: std_logic_vector (7 downto 0); For ―OR‖ => C = maximu m (A, B)
end record; For ―AND‖ => C = minimum (A, B)

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
38 Design and Implementation of Fu zzy Controller on FPGA

For rules with same output => value that can used to control the motors. This process
is done through defuzzificat ion. The defuzzification
C = maximu m (minimum (A1, B1), minimum (A2, B2))
technique used in Sugeno method is weighted average.
The minimu m and maximu m function used to obtain This is done by multiply ing fuzzy output obtained from
the result fro m the each rule evaluation between the rules evaluation with its corresponding singleton
multiple antecedents is shown below. value, then sum of this value is d ivided by the su m of
all fuzzy output obtained from the rules evaluation. The
Minimum Function
result fro m this calculat ion is the final single output
function minimum (a, b : std_logic_vector) return
which can be used to control the motor movements .
std_logic_vector is Since there is no division symbol supported by Xilin x
variable min : std_logic_vector (7 downto 0) := (others
ISE Co mpiler, a div ider circu it has to be designed to
=> ‘0’);
perform defuzzification.
begin
if (a < b) then min := a; The following pseudo-code illustrates the procedure
elsif min := b; of this fuzzification process [8]:
end if;
return min;
Defuzzification();
end minimum;
Set n = number of output membership function
s = array o f singleton of output membership
Maximum function
function
function maximum (a, b : std_logic_vector) return
p = array of result of all rule evaluation
std_logic_vector isvariable max : std_logic_vector (7
sum = 0;
downto 0) := (others => ‘0’);
For i = 1 to n do begin product = (s(i)×p(i)) + product;
begin
sum = p(i) + sum;
if (a > b) then max := a;
end for loop;
elsif max := b;
output = product / sum;
end if;
return max;
end maximum;
IV. Simulation and Results
3) Rule Evaluati on Simulation in MATLAB
Rule1: position(1)<=ma ximu m(minimu m (u1(0), u2(1)), Simu lations have been done for DC motor using FLC
minimu m (u 1(1), u2(0))); in MATLA B/SIM ULINK. The simu lin k diagram of
A total number of ru les that should be produced to FLC is shown in Fig.5. The co mparisons of FLC has
describe the complete fu zzy control strategy can be been done with PID controller expressed by
calculated by multip lying the input membership
Ki
function with the output membership function. c( s )  K p   Kd s
Although there are number of possible rules, most of s
them can be discarded as long as the design is able to
Where Kp, Kd, Ki are 1, 0.6, 0.5 respectively. The
determine how the fuzzy control system should be
PID controller is tuned using Zeigler-Nichols method.
operated.
The step response using FLC and PID are shown in
4) Defuzzification Fig.6. The FLC brings fastest settling and less
After the output for the each rule has been identified, overshoot in compared to PID. Hence the performance
the next step is to combine all the output into a single of FLC is better than PID

Fig.5. Simulink Diagram of FLC and PID

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
Design and Implementation of Fu zzy Controller on FPGA 39

Simulation in Xilinx ISE


Simu lations have been done in Xilin x ISE.Fig.7 and
Fig.8 shows that Test Bench Waveform and RTL view
of FLC using VHDL respectively. In this figure the
outputs have calculated according to input i.e. Error and
Fig.6. Step response of system with feedback FLC Change in Error

Fig.7. T est Bench Waveform using Xilinx ISE

Fig.9 shows the Simu link Diagram of FLC and PID


using Xilin x system generator. We have taken a same
2nd order system fo r Dc motor to show the step response
performance of FLC. Black bo x represents the FLC
using VHDL code. The two input of FLC i.e. Error and
Change in Error are going through the Gateway In to
the system generator Black Bo x, the two outputs are
coming through the Black Bo x. The control output of
FLC is finally obtained by dividing one output by
Fig.8. RT L view of FLC using VHDL
another.

Fig.9. Simulink Diagram of FLC and PID using Xilinx system generator

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
40 Design and Implementation of Fu zzy Controller on FPGA

Fig.10 shows the Comparisons among the FLC, FLC overshoot in compared to PID and FLC. Hence the
using VHDL and PID controller. FLC using VHDL the performance of FLC using VHDL is better than PID
lowest settling time, steady state error and less and FLC

Fig.10. Comparisons among PID, FLC and FLC-VHDL

Fig.11 shows that Simu lin k d iagram after hardware


co-simu lation. Whole Xilin x block set is represented by
JTAG co-sim block.

Fig.11. Simulink diagram after hardware co-simulation

Fig.12 verifies that the response of FLC after


hardware co-simu lation is almost same as co mpare to
FLC before hardware co-simulation.

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
Design and Implementation of Fu zzy Controller on FPGA 41

Fig.12. Comparisons between PID controller and FLC-VHDL after hardware co-simulation

V. Conclusion [4] Y. F. Li and C. C. Lau, ―Develop ment of Fu zzy


Algorith m for Servo System‖, IEEE Int.
For designing FLC, a high- level modelling approach
conference on Robotics and Automation, April 24-
in VHDL have to be used. The advantages of this are
29, 1998.
reducing the design time, evaluation of the design
functionality in a short time and quickly exp loring of [5] Andrew Kusiak,‖Fuzzy Logic‖, The Un iversity of
different design choices. Once the basic design of the Iowa, Iowa City 2004.
fuzzy logic control system has been defined, the
[6] Daijin Kim, ―An Imp lementation of Fu zzy Log ic
implementation of the fuzzy logic controller is very
Controller on the Reconfigurable FPGA System‖,
straight forward by coding each co mponent of the fu zzy
IEEE Transaction on Industrial Electronics, Vol.
inference system in VHDL according to the design
47, No. 3, pp. 703-715, June 2000.
specifications. By simp ly changing some parameters in
the codes and design constraint on the specific synthesis [7] Sameep and Kuldip S. Rattan, ―Implementation of
tool, one can experiment with different design circuitry a Fuzzy Controller on an FPGA using VHDL‖,
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of FLC using VHDL is better than the response of PID
[8] Philip T. Voung, Asad M. Madni and Jim B.
and FLC using MATLA B. The peak overshoot and
Vuong, ―VHDL Imp lementation for a Fuzzy Log ic
settling time both are better than others.
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Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42
42 Design and Implementation of Fu zzy Controller on FPGA

[13] Davi Nunes Oliveria, Gustavo Alves de Lima Barjeev Tyagi received the PhD in
Henn and Otacilio da Mota Almeida,‖Design and Electrical Eng ineering, IIT-Kanpur,
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System on an FPGA using VHDL‖ Annual Engineering (Control System) fro m
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Tyagi,"Design and Implementation of Fuzzy Controller on
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―Development of an FPGA - Based Servo Applications(IJISA), vol.4, no.10, pp.35-42, 2012. DOI:
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Mani Shankar Anand received the


M.Tech Electrical Engineering
(System & Control) fro m IIT -Roorkee
in the year 2012. Prior to these he
completed his B.Tech Electronics &
Co mmunicat ion Eng ineering fro m
F.I.E.M. Kolkata in 2010. His research interests include
Nonlinear control.

Copyright © 2012 MECS I.J. Intelligent Systems and Applications, 2012, 10, 35-42

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