Department of ECE

23EC1202
DIGITAL DESIGN & COMPUTER ARCHITECTURE
Session - 05

MULTIPLEXERS AND DE-MULTIPLEXERS

 AIM OF THE SESSION

To familiarize students with the basic concept of multiplexers and demultiplers

INSTRUCTIONAL OBJECTIVES

This Session is designed to:

1. Demonstrate multiplexers, truth tables and its application.
2. Describe the demultiplexers, truth tables and its application.
3. Analyze how demultiplexers are used for data distribution.

LEARNING OUTCOMES

At the end of this session, you should be able to:

1. Interpret and create truth tables for different multiplexer, demultiplexer configurations, demonstrating an
understanding of how input lines are selected based on control inputs.
2. Apply the concepts of multiplexer and demultiplexer for data selection and distribution.
 INTRODUCTION TO MULTIPLEXER

• A multiplexer is a combinational circuit that has M selection lines, N input lines and a
single output line.
• It is also called a data selector and control inputs are termed select inputs.

NX1
N Input Lines 1 Output Line
MUX

N X 1 MUX
N <= 2M

M Selection Lines
2X1 MULTIPLEXER

4
 2X1 MULTIPLEXER

a) Block Diagram b) Truth Table c) Logic Diagram

𝐼!

Y
S Y
𝐼! 2x1
𝐼" MUX 0 𝐼! Y
𝐼"

S
1 𝐼" S

Boolean Expression,
Y = 𝐼! 𝑆" + 𝐼" 𝑆
4X1 MULTIPLEXER

6
 4X1 MULTIPLEXER
a) Block Diagram b) Truth Table c) Logic Diagram

𝐼! 𝐼!
𝑺𝟏 𝑺𝟎 Y
𝐼" 4x1
Y 𝐼"
MUX 0 0 𝐼$
𝐼# Y
𝐼$
𝐼$ 0 1 𝐼%
𝐼#
1 0 𝐼&
𝑆" 𝑆!
1 1 𝐼' 𝑆" 𝑆!

Boolean Expression: Y = 𝑆#%𝑆$𝐼$ +𝑆#%𝑆$𝐼%+𝑆%𝑆$𝐼&+𝑆%𝑆$𝐼'

 IMPLEMENTATION OF BOOLEAN FUNCTION USING
MULTIPLEXERS
• Ex.1) Implement the function 𝐹 𝐴, 𝐵, 𝐶 = ∑ 𝑚 0,1,4,6,7 using suitable MUX

8
 Implementation of Boolean Function using Multiplexers

Ex.1) Implement the function 𝐹 𝐴, 𝐵, 𝐶 = ∑ 𝑚 0,1,4,6,7 using suitable MUX

Solution: A B C F (A,B,C) 𝑉%% 0

0 0 0 1 𝑉%% 1
GND 2
0 0 1 1
GND 3 8X1 𝐹
0 1 0 0 𝑉%% 4
0 1 1 0 GND 5
𝑉%% 6
1 0 0 1 𝑉%% 7
1 0 1 0
1 1 0 1 𝑉%% = Logic 1 𝐴 𝐵 𝐶
1 1 1 1 GND = Logic 0
 Implementation of Boolean Function using Multiplexers
Ex.2) Implement the function 𝐹 𝐴, 𝐵, 𝐶 = ∑ 𝑚 1,4,6,7 using 4X1 MUX considering C as
Input line and A, B as selection lines.
Solution:
a) Implementation Table b) Logic Diagram
 Implementation of Boolean Function using Multiplexers
Ex.2) Implement the function 𝐹 𝐴, 𝐵, 𝐶 = ∑ 𝑚 1,4,6,7 using 4X1 MUX considering C as
Input line and A, B as selection lines.
Solution:
a) Implementation Table b) Logic Diagram
 Implementation of Boolean Function using Multiplexers

Ex.3) Develop an Arithmetic Logic Unit (ALU) by using a 4-to-1 Multiplexer.

Solution:
 Implementation of Boolean Function using Multiplexers

Ex.3) Develop an Arithmetic Logic Unit (ALU) by using a 4-to-1 Multiplexer.

Solution:
 Implementation of Boolean Function using Multiplexers
Ex.3) Design a 8x1 multiplexer using two 4*1 multiplexer and one 2x1 multiplexer.

Solution:
 Implementation of Boolean Function using Multiplexers
Ex.3) Design a 8x1 multiplexer using two 4*1 multiplexer and one 2x1 multiplexer.

Solution:
APPLICATIONS OF A MULTIPLEXER

0
1
2
3

3
2
0
1
 APPLICATIONS OF A MULTIPLEXER

MEMORY ADDRESS
MEMORY UNIT

Block 1
Block 2
Block 3
Block 4
MUX CPU
Block 5
Block 6
Block 7
Block 8
 INTRODUCTION TO De-MULTIPLEXER

• A De-multiplexer is a combinational circuit

that has only 1 input line and 2M output lines Data
De-MUX N Output
and M selection lines. Input
Lines

• Demultiplexer means one into many. By

applying control signals, we can steer the
input signal to one of the output lines. M Selection Lines
 1X2 DEMULTIPLEXER

a) Block Diagram b) Truth Table c) Logic Diagram

Boolean Expression
 1X2 DEMULTIPLEXER

a) Block Diagram b) Truth Table c) Logic Diagram

D
Input S 𝒀𝟎 𝒀𝟏 𝑌!
1x2 𝑌!
D DEMUX 𝑌" D 0 D 0
D 1 0 D
𝑌"
S
S
Boolean Expression,
𝑌$ = D𝑆#
𝑌% = D𝑆
 1X4 DEMULTIPLEXER
a) Block Diagram b) Truth Table c) Logic Diagram

Boolean Expressions,
 1X4 DEMULTIPLEXER
a) Block Diagram b) Truth Table c) Logic Diagram

Input 𝑺𝟎 𝑺𝟏 𝒀𝟎 𝒀𝟏 𝒀𝟐 𝒀𝟑 D 𝑌!
𝑌!
1x4 𝑌" D 0 0 D 0 0 0
D 𝑌"
DEMUX 𝑌#
𝑌$ D 0 1 0 D 0 0 𝑌#
D 1 0 0 0 D 0
𝑌$
𝑆! 𝑆"
D 1 1 0 0 0 D
𝑆! 𝑆"

Boolean Expressions,
𝑌$ = D𝑆$𝑆#% 𝑌% = D𝑆$𝑆% 𝑌& = D𝑆$𝑆#% 𝑌' = D𝑆$𝑆%
APPLICATIONS OF A DEMULTIPLEXER
 SELF-ASSESSMENT QUESTIONS

1. What is a multiplexer?

A. It is a type of decoder which decodes several inputs and gives one output
B. A multiplexer is a device which converts many signals into one
C. It takes one input and results into many output
D. It is a type of encoder which decodes several inputs and gives one output

2. A 4-to-1 MUX has ________ input lines and ________ select lines.

A. 2, 1
B. 4, 2
C. 8, 2
D. 1, 4
 SELF-ASSESSMENT QUESTIONS

3. What is the output configuration of a Demultiplexer (DEMUX)?

A. One input, multiple outputs

B. Multiple inputs, one output
C. Multiple inputs, multiple outputs
D. One input, one output

4. In a 4-to-1 MUX, if the select lines are 01, which input line will be selected?

A. Input 0
B. Input 1
C. Input 2
D. Input 3
 TERMINAL QUESTIONS

Short answer questions:

1. What is the main purpose of a de-multiplexer, and how does it differ from a multiplexer?
2. Provide two practical scenarios or applications where multiplexers are commonly used.
3. In a 2-to-1 multiplexer, how many input lines are there, and how many control lines are
required to select one of the inputs?

Long answer questions:

1. Describe how multiple multiplexers can be cascaded to create a larger multiplexer with
increased input capacity with example.
2. Highlight a key difference between the operation of a multiplexer and a de-multiplexer.
 TERMINAL QUESTIONS
Long answer questions:
3. Provide a thorough description of the architecture of a 4:1 multiplexer, including its input
lines, control lines, and output.
4. Implement the function 𝐹 𝐴, 𝐵, 𝐶 = ∑ 𝑚 0,2,5,6,7 using suitable multiplexer.
5. Design the function 𝐹 𝐴, 𝐵, 𝐶 = ∑ 𝑚 1,4,5,7 using 4X1 MUX considering “A” as Input line
and B, C as selection lines.
6. Design an Arithmetic Logic Unit (ALU) by using a 4-to-1 Multiplexer.
7. Provide a thorough description of the architecture of a 1:4 de-multiplexer, including its input
lines, control lines, and output.
 REFERENCES FOR FURTHER LEARNING

Reference Books:
1. Computer System Architecture by M. Moris Mano
2. Fundamentals of Digital Logic with Verilog HDL by Stephen Brown and ZvonkoVranesic

Sites and Web links:

1. [Link]
2. [Link]
 THANK YOU

Team – Digital Design & Computer Architecture