EEE LAB FINAL
Exp 1: Familiariza on with Simple Electrical Circuits
Objec ves:
i) To be acquainted with the fundamentals of electrical circuits.
ii) Learning how to construct circuits and draw circuit diagram.
iii) To get familiarized with commonly used measuring equipment.
Required Apparatus:
i) Breadboard
ii) Ammeter
iii) Mul meter
iv) Connec ng Wires
v) Resistors
*What would be the problem if DC source were not disconnected before measuring the
equivalent resistance by mul meter?
Ans: If the DC source is not disconnected before measuring resistance, it can lead to incorrect
readings due to interference with the mul meter's internal voltage, possible damage to the
mul meter if the voltage is too high, and circuit interference, causing inaccurate measurements.
To ensure correct results and protect the meter, always turn off and disconnect the DC source
before measuring resistance.
Exp 2: Study of Ohm’s Law
Ohm’s Law: At constant temperature, the current flowing through any par cular conductor is
directly propor onal to the voltage across it.
I∝V
Or, I = V/R
The I vs V graph is a straight line passing through the origin.
Conductance(C): The ability of a material to allow electric current to flow, given by G=1/R . It is
measured in siemens(S).
Resistance(R): The opposi on a material offers to the flow of electric current, given by R=V/I. It
is measured in ohms (Ω).
Exp 3: Verifica on of KVL
Kirchoff’s Voltage Law: Around any closed circuit the algebraic sum of voltage rises equals to the
algebraic sum of voltage drops.
*Can KVL be applied to open circuits?
Ans: Yes, Kirchhoff's Voltage Law (KVL) can be applied to open circuits. The sum of voltages s ll
follows KVL. The voltage across the open sec on is considered as an unknown. No current
means no voltage drop across resistors in series (Ohm’s law: V=IR with I=0 results in V=0).
Exp 4: Verifica on of KCL
Kirchoff’s Current Law: The algebraic sum of currents entering any node equals the sum of
currents leaving the node.
*What do you understand by super node?
Ans: A super node is formed in nodal analysis when a voltage source is connected between two
non-reference nodes. It combines the two nodes into a single en ty, applying both KCL and the
voltage source constraint to solve the circuit equa ons efficiently.
Exp 5: Verifica on of Thevenin’s Theorem
Thevenin’s Theorem: Thevenin's Theorem states that any linear electrical circuit with resistances
and sources can be simplified to an equivalent circuit consis ng of a single voltage source
(Thevenin voltage, Vth) in series with a single resistance (Thevenin resistance, R th), as seen from
two terminals.
The value of Vth is the open circuit voltage across the terminals and Rth is the resistance
measured between the terminals with all the sources eliminated. The voltage sources are
eliminated by shor ng their terminals and the current sources are eliminated by opening their
terminals.
*Why do we require Thevenin’s Theorem?
Ans: Thevenin's Theorem is required to simplify complex circuits into a single voltage source and
series resistance, making circuit analysis easier. It helps in analyzing load varia ons, reducing
calcula on effort, and is especially useful in circuit design and troubleshoo ng.
*Why are dependent sources not turned off in Thevenin’s Theorem?
Ans: In Thevenin’s Theorem, dependent sources are not turned off because they rely on circuit
variables (current or voltage) and cannot exist independently. Turning them off would alter
circuit behavior, leading to incorrect Thevenin equivalent values. Instead, they must be kept
ac ve and analyzed using circuit techniques like nodal or mesh analysis.
Exp 6: Verifica on of Superposi on Theorem
Superposi on Theorem: The Superposi on Theorem states that in any linear, bilateral network
consis ng of more than one source of emf, the current through or voltage across any element is
equal to the algebraic sum of the currents or voltages produced independently by each source.
While the current due to a par cular source of emf is being found, the other emf sources are
rendered inac ve and if any branch element is in series with those sources, those sources
remain intact.
According to the superposi on theorem,
I = I1 + I2 + I3 +………..
