BCS402 and SIMP Questions-2024
Prepared by: By the TIE review team
Module-1-5 SIMP questions
1. Differentiate between i) RISC & CISC architecture ii) Microcontroller & Microprocessor
2. Explain ARM registers used under various modes & ARM philosophy.
3. What is pipelining? Illustrate it with an example.
4. Explain the architecture of a typical embedded system based on ARM.
5. Discuss the following with diagram- i)Von Newman architecture with
6. cache ii) Harvard architecture with TCM
7. Explain ARM core data flow model in detail with a neat diagram.
8. Draw the basic layout of the generic program status register and briefly the various fields.
(module 3 and module 2 is mixed here)
9-11 mod 3 9. Write a note on: i) Register allocation ii)Allocation variables to register numbers
12-17 mod 2 10. List out the problems faced by Compiler. Explain the Effect of local variable types by
considering Checksum function.
11. Explain different data types in C and Explain different C looping structures in detail with
examples
12. Show the post condition when MOV’s Instruction shifts register r1 left by one bit and result
is stored in [Link] r0=0X00000000, r1= 0X80000004 and CPSR=nzcvqiFt.
13. Explain the Barrel shifter operation in ARM processor with a neat diagram.
14. Briefly explain the different load store instruction categories used in ARM.
15. Explain the following in ARM: i) different data processing instruction ii)the co-processor
instruction iii)instruction scheduling
16. Explain briefly the software interrupt instruction with syntax and example.
17. Write an ALP using ARM instructions to find a factorial of a number.
18. With a neat diagram explain ARM processor exceptions and modes.
19. What is exception handling? Explain the mechanism which is adopted to handle the
exceptions which occur simultaneously. Also indicate the reasons for these exceptions.
20. Briefly explain what happens when an IRQ and FIQ exception is raised with an ARM
processor.
21. Explain assigning interrupts and interrupt latency.
22. Explain firmware execution flow and explain Red Hat RedBoot.
23. Explain the code structure and directory layout of sandstone
24. Explain (i)Architecture of cache memory (ii)Memory hierarchy (iii)Lache line replacement
policies (iv)Allocation policy in cache
25. Explain how main memory maps to a cache memory.
26. Explain the basic operation of a cache controller
27. Write a note on Write Buffers. And give an expression to measure Cache Efficiency.
28. Explain Write Policy—Writeback or Writethrough policy.
