Understanding, Measuring, and Reducing Output Noise

in DC/DC Switching Regulators

Practical Tips for Output Noise Reduction

Jason Arrigo, Applications Engineer, Power Modules

Alejandro Iraheta, Applications Engineer, Power Modules

1
What are Power Modules?

DC/DC Converter that integrates:

Controller, FETs and Inductor into
single package 9 external 3 external
• Simplifying customer’s BOM components components
• Reduce board space
LM53601
• Simplify power design LMZM23601
Power Modules Simplify Design
Small Solution Size Easy to Use

LMZ31710 Safe
Operating Area
12Vin, 1.2Vout,
300kHz

 Smaller solution size vs discrete  Simple Design  Meet EN55022

 Minimal external components  Best in Class Thermals Class B Emissions
 Inductors over active components  Reliability Data  Design Tools

Range of Package Options Broad Portfolio

 Package option matched to IC and application

 Range of surface mount, leaded and through-hole  Input Voltages from 2.2V up to 60V
options  Output Currents up to 70A
 Pin-Pin Compatible Options  Stackable options for reduced noise and high Iout
 TI’s Power Module Portfolio Embedded Leaded Overmold QFN Openframe
TPSM831D31
Output Current >3A

15V, 120+40A, PMBus

50 A
TPSM846C23/4
4.5-15V, 35A, PMBus
LMZ31520/30
4.5-15V, 20A/30A TPSM41925/15
10 A 4-19V, 25/15A, Ishare
TPSM84A21/2 LMZ31710/7 LMZ12008/10 LMZ13608/10
8-14V, 10A 6-20V, 8A/10A 6-36V, 8A/10A
2.95-17V, 10A/7A
LMZ22008/10 LMZ23608/10
TPSM84824/624/424 6-20V, 8A/10A 6-36V, 8A/10A
17V, 8A/ 6A/ 4A
6A TPSM82480 LMZM33604/6
2.4-5.5V, 6A 36V, 4A/6A
LMZ31503/6
4.5-15V, 3A/6A LMZ31704
LMZ30604/6 2.95-17V, 4A LMZ23603/5
6V, 4A/6A LMZ22003/5 6-36V, 3A/5A
4.5-20V, 3A/5A
TPS82085 TPS82130 LMZ14203/H
6V, 3A 3-17V, 3A 6-42V, 3A
Output Current ≤ 3A

LMZ12003
TPS82084 4.5-20V, 3A LMZM33602/3
6V, 2A TPS82140 LMZ35003
3-17V, 2A 4-36V, 2/3A 7-50V, 2.5A
LMZ20501/02
5.5V, 1A / 2A LMZ30602
6V, 2A TPS82150 TPSM84209 LMZ34202 LMZ36002
3-17V, 1A 4.5-28V, 2.5A
LMZ10501 4.5-42V, 2A 4.5-60V, 2A
5.5V, 1A TPS8268090/105/150
5.5V, 1.6A
LMZ21701/00 LMZ12001/2 LMZ14201/2/H
TPS82697/98 3-17V, 650mA / 1A 4.5-20V, 1A/2A 6-42V, 1/2A
4.8V, 800mA
LMZ10500 LMZ34002
TPS81256 5.5V, 0.65A TPSM84203 40V, 2A (Neg)
Boost, 400mA* 28V, 1.5A. T0220
TPS8267X LMZM23600/1
4.8V, 600mA* 4-36V, 0.5A/1A Coming Soon
TPS82695 TPS82740
4.35V, 500mA 5.5V, 0.2A

Vin max ≤ 6V 14V ≤ Vin max ≤ 20V 28V ≤ Vin max ≤ 60V
 Detailed Agenda
• Understanding noise origin and measurement
– Noise origin, relevant parasitic elements, high frequency and low frequency components
– Measurement techniques and examples
– Noise reduction techniques
• Output noise filtering comparison
– 2nd Stage LC filters
• Passives parasitic elements and filter performance
• Design example
• Tradeoffs
– LDOs
• Filtering performance
• Design example
• Tradeoffs

5
Understanding noise origin

6
The ideal buck regulator

+
-

7
More real buck regulator

V V V
T T T

VIN SW L
VOUT

LOAD
High
+

di/dt Some node who

loop
-

COUT
CIN does not like SW

GND
“Free” components in red

8
LF ripple origin • Result of the inductor ripple current
and output capacitor impedance
“LF” Ripple at Buck switching frequency
Lo iLo Io
SW VOUT

Iac ESR
iLo
Io
Co

ESL

Total LF Ripple = + +

9
HF noise origin • Who is generating the noise?
– High di/dt current loop and any inductance in its path
– Noise appears on the SW node as ringing at each edge

V V V
T T T

VIN SW L
VOUT

LOAD
High

+
di/dt
loop

-
COUT
CIN

GND
“Free” components in red

• How is the ringing coupled to the output?

– Parasitic capacitance
• Across the inductor (could be a few 10’s of pF)
• Between overlapping copper areas on the PCB

10
Measuring noise

11
Measuring noise
• Before we explore ways/tools for reducing the output noise, let’s make sure we
are measuring it properly.
• Improper measurement techniques can results in exaggerated output noise.
• Exaggerated output noise measurements can result in overly conservative
“methods” for fixing it.
• It is important to know the “real” amount of noise before we start reducing it.

12
BAD Measurement (example)

13
Improved measurement (example)

14
Comparison
~2x difference in measured noise!
~200mV pk-pk
The circuit is exactly the same.
The difference is the measurement technique.

~100mV pk-pk

15
Using a 1X probe

1x Cleaner reading
probe Can zoom to 1mV/div for sub 1mV
measurements

10x Fuzzy due to the scope vertical

probe sensitivity limitations of a 10x probe.
Cannot zoom below 10mV/div

16
LF ripple reduction

17
LF ripple reduction
How do we reduce this ripple?

18
LF ripple mitigation
- Inductor
- Output capacitor
- Switching frequency

Ceramic
Tantalum
OSCON

Aluminum
electrolytic

19
 Filter Calculator with
LF ripple mitigation Equations

– Second stage filter Microsoft Excel

97-2003 Worksheet

0.7mV/5V(0.014%)

20
HF noise reduction

21
HF noise reduction – component placement
• First step is to optimize (minimize) the area of the high di/dt loop.
• For Buck, the high di/dt loop is formed by the input capacitor and the power
MOSFETs (switches).
– Input capacitor as close as possible to IC = Smaller loop area
– Smaller loop area = Lower ringing on SW node
– Lower ringing on SW node = Lower output noise
• So first step = optimize input capacitor placement for Buck

22
HF noise reduction – component placement
• For a Buck converter…

The INPUT cap position affects the OUTPUT noise!

23
High di/dt capacitor placement - example
• Buck Regulator comparison with CIN location
• 12V input, 3.3V output, 2A Buck

80

75

70

65

SW 18.1V
60
Cispr 22 Class A 3M
55

max 50

Level in dBµV/m
Cispr 22 Class B3M
45

40
44dBµV/m
35

30

25

VOUT 20

75mVpp
15

10

0
30M 50 60 80 100M 200 300 400 500 800 1G
Frequency in Hz

24
High di/dt capacitor placement - example
• Buck Regulator comparison with CIN location (2 times smaller loop area)
• 12V input, 3.3V output, 2A Buck

80

75

70

65

SW 14.5V
60
Cispr 22 Class A 3M
55

max 50

41dBµV/m

Level in dBµV/m
Cispr 22 Class B3M
45

40

VOUT 35

47mVpp
30

25

20

15

10

0
30M 50 60 80 100M
VOUT200 300 400 500 800 1G

VIN Frequency in Hz

25
HF noise reduction – Power modules save layout troubles
• Reducing the high di/dt loop area – integrated input capacitance.
• Reducing the high dv/dt node area – integrated L and smaller switch node.
Discrete solution without optimized layout DC-DC Power Module

Cin Shielded L Small SW Node

Small di/dt loop

26
IC package construction can help
• Bond wire vs Copper pillar interconnects
Standard wire bond QFN package ‘Hotrod’ flip chip on lead frame QFN
Wire Bond Silicon Die
Silicon Die Copper bump
Lead frame Solder
Board Lead frame
Board

Wire bond LMR33630

“Hotrod”

27
HF filtering
• After careful input capacitor placement and layout there will be some left over
high frequency noise – we cannot completely eliminate parasitic L and C.

How can we reduce it?

HF Cap

High Frequency Capacitors

28
HF filtering – parasitic component and pitfalls
• Which one is better?

1µF 0.1µF 0.01µF 0.1µF 0.1µF 0.1µF

10µF 10µF 10µF

29
HF filtering – parasitic component and pitfalls
SIMetrix schematic example:

10µF
10µF + 0.1µF + 0.1µF + 0.1µF
10µF + 1.0µF + 0.1µF + 0.01µF

parallel_capacitor_impedance.sxsch

30
HF filtering with wrong capacitor (example)

76.2mV

85.7mV

64.4mV

31
Filtering Techniques

32
Filtering techniques comparison
• 2nd stage filter (L-C)
+
-

• LDO post regulator

+
-

33
2nd stage LC filter

34
2nd stage filter parasitic elements

Ind_L
Cap_C

Ind_L
Ind_C Cap_ESL
(Ind SRF) Ind_C

Cap_ESL
Cap_C
(Cap SRF)

35
Inductor tradeoffs: high frequency filtering and
SRF
• High frequency filtering
– The SRF of the inductor can affect the L-C filter performance at high frequency.
– May be better to choose smaller L and larger C if HF attenuation is desired.

36
Example with 2nd stage filter using the LMZM23601EVM

Conditions:
• Vin =12V
• Vout = 3.3V
• Iout = 500mA
• 1X Scope probe
• BW set to 250MHz

HF noise peak-to-peak = 12.6mV

37
2nd stage output filter schematic

38
Initial filter design (2.2uH + 44uF)

HF noise = 5.8mV
Calculated HF attenuation = 6.7dB

39
Another filter design (1uH + 94uF)

HF noise = 5.4mV
Calculated HF attenuation = 7.7dB

40
2nd stage filter tradeoffs (efficiency)
• Power dissipation penalty depends on the DCR of the inductor and the load current

41
2nd stage filter tradeoffs (load regulation)
• Depends on whether the 2nd stage filter is inside the feedback loop

42
2nd stage filter tradeoffs (LF attenuation at light load)

• Usually the LC filter is chosen to attenuate ripple at the switching frequency.

• Many switchers employ power savings mode at light load.
• If the switching frequency reduces below the LC filter cutoff, the LF ripple will pass through at light load.
• If attenuation is needed at light load, the LC filter must be oversized to capture the light load frequency.

43
2nd stage LC filter key takeaways
1. 2nd stage filter can help reduce both LF ripple and HF switching noise
2. If the switcher has power savings mode with lower switching frequency at light load, the
LC filter may need to be adjusted for the appropriate frequency
3. HF switching noise reduction highly depends on the filter parasitics
– May need to simulate and optimize filter design at HF ringing frequency
4. If LC filter is inside the FB loop
– Regulation penalty is avoided
– May need damping to avoid regulator stability issues
– Damping will affect the filter attenuation at HF so HF switching reduction may be affected

44
LDO as a filter

45
LDO as a filter
• Many low-noise applications utilize the PSRR (power supply rejection ratio) of
the LDO to “clean the supply”.
+
-

Source: You Think LDOs are Simple?

https://training.ti.com/sites/default/files/docs/you_think_ldo
s_are_easy-detroit_tech_day.pdf

46
 LDO as a filter – example with LMZM23601 + TPS7A4701
• LMZM23601 is a 36V 1A power module • TPS7A4701 is a 36V 1A ultra low noise LDO
LMZM23601 + TPS7A4701 output noise

SWITCHER OUTPUT

LDO OUTPUT
• Measurement shows attenuation
of HF noise from 15.6mV to
6.4mV for a total of 7.6dB
attenuation

48
LDO as a filter tradeoffs (efficiency)
• Additional power dissipation – need to give the LDO some Voltage headroom to regulate VOUT.
• The additional dissipated power is Voltage headroom x Load current

49
LDO as a filter tradeoffs (BOM)
• At a minimum, the LDO requires 3 components (Cin, LDO, Cout)
• Additional components could be FB resistors, reference filter cap

50
Filtering performance at light load
• Many switchers have power savings mode at light load with reduced switching frequency (e.g. PFM mode).
• The LC filter may not be adequate for filtering the PFM frequency.

No Load No Load
FPWM Mode PFM Mode

SWITCHER + LC Filter
SWITCHER + LC Filter

SWITCHER + LDO SWITCHER + LDO

51
LDO as a filter key takeaways
1. Can help reduce both LF ripple and HF switching noise
2. If the switcher has power savings mode with lower switching frequency at light load, the
LDO will still work well
3. HF switching noise reduction depends on the LDO PSRR at high frequency which
depends on the LDO output capacitor
4. Load regulation issues are mitigated with LDO
5. Tradeoff is additional power loss, BOM count, and board space.

52
DAC adjustable low noise power supply
• Some test and measurement applications may require DAC adjustable and low noise
power rail
• If LDO is used to “clean up” the power rail and the switcher output voltage is DAC
adjustable, the voltage difference between the LDO input and output can be larger
• To avoid excessive power loss the switcher can be configured as a tracking pre-regulator.

Link: Designing a pre-tracking regulator, part 1: for a positive-output LDO

53
So, LDO or a 2nd stage filter?!

54
So, LDO or a 2nd stage filter?!
• LC filters can be tricky at high frequency
– The designer needs to consider the parasitic elements of the capacitor and inductor
– Filter damping needs to be considered along with stability
– It may require lower BOM count than LDO but it depends how many capacitors are
used
• If power savings mode is employed, the LDO will definitely provide better
filtering
• In terms of design, the LDO is straight-forward
• LDO can always be followed by “high frequency” capacitors to clean up the
remaining switching noise.

55
 Summary
• Understanding the noise origin is important for noise mitigation
• The parasitic elements are usually the trouble makers
• Measuring noise properly can save us effort in trying to design filtering
solutions
• There are many noise reduction techniques (e.g. layout, stackup,
component placement, filtering, etc.)
• 2nd stage LC filters and LDOs can be used to “clean up” a noisy power
supply
• LDOs may be preferred based on the tradeoffs discussed

56
 References
• Design a Second-Stage Filter for Sensitive Applications
• Output Noise Filtering for DC/DC Power Modules
• Understanding, Measuring, and Reducing Output Noise in DC/DC Switching Regulators (Part 1)
• Understanding, Measuring, and Reducing Output Noise in DC/DC Switching Regulators (Part 2)
• You Think LDOs are Simple?

Any Questions?

57
Conducted EMI filter and radiated EMI performance
Default
configuration

Input Filter

Calculator

58
Inductor tradeoffs: high frequency filtering and
SRF – example in frequency domain
• High frequency filtering
– The SRF of the inductor can affect the L-C filter performance at high frequency.
– May be better to choose smaller L and larger C if HF attenuation is desired.

59
2nd stage filter tradeoffs
• Ideal filter
+
-

• Real filter
FILTERED
VIN SW L
VOUT VOUT

LOAD
High RDAMP

di/dt
CIN loop COUT

GND

60
PSRR curve details
• Region 1 depends on:
– Internal reference and internal filtering
• Region 2 depends on:
– Open-loop gain of the LDO error amp
• Region 3 depends on:
– Parasitic capacitance across the pass device and the
LDO output cap size

Source: You Think LDOs are Simple?

https://training.ti.com/sites/default/files/docs/you_think_ldos_are_easy-
detroit_tech_day
.pdf

61
LMZM23601 + TPS7A4701 output noise in frequency domain

62
Making a 1x probe (example)
• Short coax cable soldered
to the output
• 0.1µF coupling capacitor
• 50Ω termination

• Probe frequency response

ter
m
• High pass filter with cutoff frequency
at 31.8kHz. OK for most modern
switchers with loaded output.
• Probe OK for 250MHz scope BW

63