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Digital - T3

The document outlines an assignment on Digital Logic Design, divided into three parts with various questions related to combinational circuits, multiplexers, adders, and decoders. It includes design tasks, truth table derivations, and implementations of specific logic functions. The assignment emphasizes practical applications and theoretical understanding of digital circuits and their components.

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24 views3 pages

Digital - T3

The document outlines an assignment on Digital Logic Design, divided into three parts with various questions related to combinational circuits, multiplexers, adders, and decoders. It includes design tasks, truth table derivations, and implementations of specific logic functions. The assignment emphasizes practical applications and theoretical understanding of digital circuits and their components.

Uploaded by

amit1522000
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Assignment-III Digital Logic Design T06BTEC0201

*🔹 PART-I (2*8)

1. Define a combinational circuit. How does it differ from a sequential circuit?


2. Explain the function and application of a multiplexer. How does it differ from a decoder?
3. Design Half Adder using NAND Gates. What are the limitations of Half Adder ?
4. What is the role of a full adder in digital circuits? How is it constructed using half adders?
5. Design Four Bit Binary Multiplier.
6. What is a priority encoder? Where is it used in real-world digital systems?
7. Explain the hazards and glitches in combinational circuits. How can they be minimized?
8. Describe the design steps involved in implementing a combinational circuit from a truth
table.

🔹 PART-II (3*8)

9. Given the truth table of a 3-input majority circuit, derive the minimized Boolean
expression using a K-map.
10. Design a 4-to-1 multiplexer using basic logic gates. Show the logic diagram.
11. Implement a full adder using only NAND gates. Provide the logic expressions and circuit.
12. Design a circuit for the Boolean function:
F(A,B,C)=∑m(1,3,5,7) using a Decoder.

12. Design a 3-to-8 decoder and write down the output expressions for all 8 outputs.
13. Construct a 4-bit binary comparator circuit.
14. Implement the function F(ABCD) = ∑m(2,3,4,5,8,9,12) using a) 16:1 mux b) Using one
8: 1Mux, 8:1 Mux & 4:1 Mux
15. Implement Logical Expression using 4x1
Mux f(A,B,C,D)= ∑m(1,2,3,5,6,7)

AB as select line, AC as select line & BC as select line

🔹 PART-III (4*9)

16. Design a circuit that outputs 1 if a 4-bit binary number has an even number of 1s.
17. You're asked to build a 4-bit binary to Gray code converter. Show the truth table and
simplified logic design.
18. Design a combinational circuit that converts a 4-bit binary number (0000 to 1001) into its
equivalent BCD representation. For invalid inputs (1010 to 1111), output all zeros.
19. If a 4-to-1 multiplexer is used to implement the logic function F(A, B, C) = Σ(1, 2, 5, 7),
identify the select lines and the input configuration.
20. Explain how a combinational logic circuit can be used to control a 7-segment display to
show decimal digits (0-9). Design for any 3 digits.
21. Design the logic to drive a 7-segment display that shows hexadecimal digits (0 to F) from a 4-bit
binary input.
22. You are given a logic circuit that implements: F=A′B+AB′C+AC
A fault cause’s line C to be stuck at logic 0. Determine the new function under the fault.
23. Find the Function F in fig.1 & 2.

Fig. 1 Fig. 2

24. A MUX network is shown in fig find Z1 & Z2

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