Preliminary Datasheet LPS100

Charger Interface Physical Layer IC

General Description Features

LPS100 is a low-cost USB high-voltage dedicated  Fully supports Quick Charge 2.0 specification
charging port (HVDCP) interface IC for the Quick  Class A: 5V, 9V, and 12V output Voltage
Charge 2.0 specification. It incorporates all necessary  Class B: 5V, 9V, 12V, and 20V output
functions to add Quick Charge 2.0 capability to Power Voltage

Integrations’ switcher ICs such as TOP Switch or Tiny  USB battery charging specification revision 1.2
compatible
Switch and other solutions employing traditional
 Automatic USB DCP shorting D+ to D- line
feedback schemes. LPS100 supports the full output
 Default 5V mode operation
Voltage range of either Class A or Class B. Optionally
 Supports TOP Switch and Tiny Switch
Class B can be inhibited for protecting the battery
 Very low power consumption
charger from accidental damage. LPS100 automatically
detects whether a connected Powered Device (PD) is  Below 1mW at 5V output

Quick Charge 2.0 capable before enabling output  Fail safe operation
Voltage adjustment. If a PD not compliant to Quick  Adjacent pin-to-pin short-circuit fault
Charge 2.0 is detected the LPS100 disables output  Open circuit pin fault
Voltage adjustment to ensure safe operation with
legacy 5V only USB PDs.
Typical Application Circuit
Ordering Information Output Voltage
5V / 9V / 12V / 20V
VOUT

LPS100 □ □ □ R1 R8
4.53KΩ
D-
D+

V3 BP GND
F: Pb-Free R5 C1
220nF

Feedback
V2 LPS100
Package Type Network R4 D-
SO: SOP-8 D+
GND

V1 NC
R3
R2 R7
390KΩ

Applications
Marking Information
 Battery chargers for smart phones, tablets
 Net books, digital cameras Device Marking Package Shipping
 Blue tooth accessories LPS100SOF LPS SOP-8 4K/REEL
 USB power output ports LPS100
YWX
Marking indication:
Y:Production year W:Production week X:Series number

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 Preliminary Datasheet LPS100

Pin Configurations
GND 1 8 BP

V1 2 7 NC

V2 3 6 D+

V3 4 5 D-

Functional Pin Description

Pin No. Pin Name Description

1 GND Ground Pin.

Open Drain input of output Voltage adjustment switch. Active for 9V, 12V, and 20V
2 V1
output setting.
Open Drain input of output Voltage adjustment switch. Active for 12V, and 20V
3 V2
output setting.
Open Drain input of output Voltage adjustment switch. Active for 20V output
4 V3
setting.
5 D- USB D- data line input.
6 D+ USB D+ data line input.
7 NC No connection.
Connection point for an external bypass capacitor for the internally generated
8 BP
supply Voltage.

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 Preliminary Datasheet LPS100

Function Block Diagram

Absolute Maximum Ratings

 BYPASS Pin Voltage ------------------------------------------------------------------------------------------ -0.3V to +9V
 REFERENCE Pin Voltage ----------------------------------------------------------------------------------- -0.3V to +9V
 V1/V2/V3 Pin Voltage ------------------------------------------------------------------------------------------- -0.3V to +9V
 D+/D- Pin Voltage ----------------------------------------------------------------------------------------------- -0.3V to +5V
 BYPASS Pin Current -------------------------------------------------------------------------------------------------- 25mA
 V1/V2/V3 Pin Current --------------------------------------------------------------------------------------------------- 0.5mA
 D+/D- Pin Voltage ----------------------------------------------------------------------------------------------------- 1mA
 Operating Junction Temperature ---------------------------------------------------------------------- -40°C to +150°C
 Operating Ambient Temperature------------------------------------------------------------------------- -10°C to +105°C
 Storage Temperature---------------------------------------------------------------------------------------- -65°C to +150°C
 Lead Temperature--------------------------------------------------------------------------------------------------------- 260°C

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 Preliminary Datasheet LPS100

Electrical Characteristics for Each Channel

(SOURCE = 0V; TJ = -20 °C to +85 °C (Unless Otherwise Specified))

Parameter Symbol Conditions Min Typ Max Units

Supply, Reference and Protection Functions

BYPASS Pin Voltage VBP 4 5 6 V
Power-Up Reset Threshold Voltage VBP(RESET) 2.0 3.9 V
BYPASS Pin Source Current IBPSC VBP = 4.3V, TJ = 25 °C 135 μA
N1 = N2 = N3 = Off
BYPASS Pin Shunt Voltage VBP(SHUNT) IBP = 3mA 5.7 6 6.3 V
HVDCP Functions
Data Detect Voltage VDAT(REF) 0.25 0.325 0.4 V
Output Voltage Selection Reference VSEL(REF) 1.8 2 2.2 V
12V / 20V Output VINH VBP V
Inhibit Threshold -0.6
Data Lines Short-Circuit Delay TDAT(SHORT) VOUT ≥ 0.8V 10 20 ms
D+ High Glitch TGLITCH(BC) 1000 1250 1500 ms
DONE
Filter Time
Output Voltage Glitch Filter Time TGLITCH(V) 20 40 60 ms
CHANGE

D- Pull-Down Resistance RDM(DWN) 14.25 19.53 24.5 kΩ

Switch N1 On-Resistance RDS(ON)N1 IN1 = 200μA 300 Ω

Switch N2 On-Resistance RDS(ON)N2 IN2 = 200μA 300 Ω

Switch N3 On-Resistance RDS(ON)N3 IN3 = 200μA 300 Ω

Switch N4 On-Resistance RDS(ON)N4 IN4 = 200μA 300 Ω

Switch N5 On-Resistance RDS(ON)N5 IN5 = 200μA,V(D+) ≤ 3.6V 20 40 Ω

Data Line Capacitance CDCP(PWR) Guaranteed by design. 1 nF

Not tested in production.

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 Preliminary Datasheet LPS100

Operation Information
LPS100 is a low-cost USB high-voltage dedicated charging Switch N4 and output switches N1 to N3 remain off. This sets
port (HVDCP) interface IC for the Quick Charge 2.0 the default 5V output Voltage level. With D+ and D-
specification. It incorporates all necessary functions to add short-circuited the normal handshake between the AC-DC
Quick Charge 2.0 capability to Power Integrations’ integrated adapter (DCP) and powered devices (PD) as described in the
switcher ICs such as TOPSwitch or TinySwitch. LPS100 also USB Battery Charging Specification 1.2 can commence. After
supports other solutions with traditional feedback schemes switch N5 has been turned on LPS100 starts monitoring the
like optocoupler and secondary reference regulator TL431 as Voltage level at D +. If it continuously stays above 0.325V for
depicted in Figure 1. at least 1.25 seconds LPS100 will enter Quick Charge 2.0
operation mode. If the Voltage at D+ drops any time below
0.325V LPS100 resets the 1.25 seconds timer and stays in
USB Battery Charging Specification 1.2 compatibility mode
with a default output Voltage of 5V.
Once LPS100 has entered Quick Charge 2.0 operation mode
switch N5 will be turned off. Additionally switch N4 is turned
on connecting a 19.53kΩ pull-down resistor to D-. As soon as
the Voltage at D- has dropped low (<0.325V) for at least 1ms
LPS100 starts accepting requests for different AC-DC
adapter output Voltages by means of applied Voltage levels
at data lines D+ and D- through the powered device. Table 1
Figure 1. LPS100 with Traditional Output Regulation (CV Only).
summarizes the output Voltage lookup table, corresponding
LPS100 supports the full output Voltage range of Quick
AC-DC adapter output Voltages and status of switches N1 to
Charge 2.0 Class A (5V, 9V, or 12V) or Class B (5V, 9V, 12V,
N3.
or 20V). It automatically detects either Quick Charge 2.0
D+ D- Output Switch Status
capable powered devices (PD) or legacy PDs compliant with
0.6V 0.6V 12V N1 = N2 = On, N3 = Off
the USB Battery Charging Specification revision 1.2 and only
3.3V 0.6V 9V N1 = On, N2 = N3 = Off
enables output Voltage adjustment accordingly.
3.3V 3.3V 20V N1 = N2 = N3 = On
Shunt Regulator 0.6V GND 5V(Default) N1 = N2 = N3 = Off
The internal shunt regulator clamps the BYPASS pin at 6V Table 1. Output Voltage Lookup Table。

when current is provided through an external resistor (RBP in

Figure 1). This facilitates powering of LPS100 externally over Requests made by a connected powered device to set a 12V
the wide power supply output Voltage range of 5V to 20V. output Voltage can be inhibited by connecting theV2 pin to
Recommended Values are RBP = 4.53kΩ and CBP = 220nF. the BYPASS pin (either directly or through a resistor up to
100kΩ). This will also inhibit requests for a 20V output.
BYPASS Pin Undervoltage
Connecting theV3 pin to BYPASS (directly or through a
The BYPASS pin undervoltage circuitry resets the LPS100
resistor up to 100kΩ) will inhibit any requests for setting a 20V
when the BYPASS pin Voltage drops below 3.9V. Once the
output.
BYPASS pin Voltage drops below 3.9V it must rise back to 4V
At USB cable disconnect the Voltage level at D+ is pulled
to enable correct operation.
down by resistor RDAT(LKG) (see Figure 1). Once it drops below
Quick Charge 2.0 Interface 0.325V LPS100 will turn on switch N5 (thereby
At power-up LPS100 turns on switch N5 (see Figure 3) in short-circuiting D+ and D-) and turns off switches N1 to N4.
20ms or less after the BYPASS pin Voltage has reached 4V. This sets the default output Voltage of 5V. The recommended
Value for RDAT(LKG) = 390kΩ.

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 Preliminary Datasheet LPS100

Packaging Information
SOP-8

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