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503 views8 pagesBDLC Syllabus
It is the syllabus for BDLCO subject in 1st semester Computer science Diploma
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0% found this document useful (0 votes)
503 views8 pagesBDLC Syllabus
It is the syllabus for BDLCO subject in 1st semester Computer science Diploma
Uploaded by
Remya SukumaranCopyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
Government of Karnataka
DEPARTMENT OF TECHNICAL EDUCATION
[Program Computer Science andy say. k,
Engineering
Icourse Name Basics of Digital Logic and
Computer Organization [Fype of Course Integrated
Icourse Code 25CS111 (Contact Hours Hours per week
[feaching Scheme _4:0:4 (Credits
[clE Marks 0 SEE Marks [50 (Theory)
1. Rationale
This course is designed to provide a comprehensive foundation for understanding how computers
operate at their core. By studying fundamental digital circuits, students acquire a clear understanding
ofhow data is represented, manipulated, and stored, alongside the mechanisms through which logical
operations are performed to solve computational problems. Furthermore, key concepts in computer
organization empower students to explore the architecture, functionality, and collaboration of
essential hardware components that enable the seamless execution of instructions.
2. Course Outcomes: At the end of the Course, the student will be able to
0-01 | Comprehend the data representation in digital systems.
co-02 | Design a digital circuit using suitable gates for the given scenario.
Simulate and examine the functionalities of combinational and sequential circuits using
CO-03 | appropriate software tools.
co-04 | Explain the basic architecture and functioning of a computer.
co-05 | Explain the interaction of hardware components in execution of an instruction
Course Content
Wee |C | PO Lecture(4HRS) Practice(4HRS)
k |o (Knowledge Criteria) (Performance Criteria)
Data representation Organize and play games like:
Numerical - Binary, octal and | Conversion Bingo game
hexadecimal Number Conversion Relay
1 |1 | 1 | BCD,ASCI, Unicode Base Conversion Escape Room
Conversions between number | Binary to ASCII Decoder Game
systems. Binary Jigsaw Puzzle
Binary Game Binary Bonanza! Binary Number game -
Fun, Free, Online Way to Learn Binary
{penjee.com)
Negative Numbers and Binary
arithmetic
Signed magnitude, 1's complement,
Learn Binary Arithmetic - Binary
Tutorial (ryanstutorials.net)
‘Treasure hunt game
2 1,2. | and 2's complement representation.
Floating point representation
Arithmetic operations in binary
(addition, subtraction)
Logic gates Every Circuit or similar simulator can be
Overview of digital logic design and| used
its applications in computer science | Explore a simulator interface
and engineering. Examine the functionality of each gate using
3 1,2, | Logic gates-Definition, symbol and | simulator
3. | truth table and their applications- | Design simple circuits using logic gates.
NOT, OR, AND, NOR, NAND, XOR,| visualize gate operations using LED-based
XNOR kits or online simulators.
https://www.youtube.com/watch?v=Hine
AhCy2N4
Boolean Algebra and Simplification Every Circuit or similar simulator:
4 1,2, | Laws, Rules and theorem ‘Test and analyze the Boolean laws and rules
3 | Boolean expressions - SOP, POS
Circuit design using Boolean Utilize simulators to create and test digital
12, | expression circuits based on Boolean expressions.
5 “| Derive Boolean expression from Analyze how the simplifying expression
truth table impacts circuit. performance —_ and
complexity.
Combinational Logic Circuits Virtual Labs (vlabs.ac.in)
Arithmetic Circuits: half adder, full simulator.io | Anonym¢ rd
adder Half-Subtractor and Full-| Examine the working of
Subtractor. Half-Adder and Full-Adder circuits.
Data Processing Circuit Multiplexers and Demultiplexers.
6 1,2 | Multiplexer, Demultiplexer, Encoder | Comparator
and Decoder
Comparator Circuits:
Single-bit and multi-bit comparators.
[Note : Concept and Application
only]
‘Sequential Logic Circuits ‘simulator.io | Anonymous board
Flip-Flops - definition, types, |. Examine the functionality of different flip
7 1,2 | applications
Registers- definition and shift
flops
Simulation of Counters: Asynchronous (Ripple)
and Synchronous Counters.
Compare combinational and
sequential circuits
[Note : Concept and Application only]
Flip-Flop-based counters and shift
registers.
Simulate flip-flops and counters using
software like Tinkercad or Logisim.
‘Computer Organization
Definition- computer architecture
and computer organization.
Von Neumann Architecture Central
Processing Unit (CPU) - components
‘The central processing unit (CPU): Its
components and_ functionality able
Sysadmin (redhat com!
CPU-0S simulator
Get familiar with environment of CPU with
8 |4 | 12 | and performance metrics. simulator
oGN89MU
Instruction Set Architecture Demonstrate how the CPU handles
(ISA) - definition and role interrupts (both hardware and software)
9/4 1,7 | Instruction types and returns to normal execution
Addressing modes https://www youtube.com /watch?v=PV
Interrupts - types, handling NAPWUxZ0g
mechanism
Specialized Processors hitps://www youtube,com/watch?v=h9
Emergence of specialized processors | Z40GN89MU
10 |4 | 17 | forspecific tasks (GPU, TPU, NPU).
"| Components of a GPU - Compute Compare CPU, GPU, TPU and NPU
Units, Cores and
Functionalities of GPU
Memory and its Hierarchy £0) 2v=h9
Units of memory Z40GNB9MU
‘Types - Primary Memory, hittps://www,voutube,com/watch?v=5M
11 |5 | 1,7 | Secondary Memory and Tertiary h30886qpg
Memory
Memory Hierarchy
Applications of Memory Types
Input/output (1/0) Locate and identify common 1/0 ports on a
Input devices computer
12 |5 | 17 | output devices Identify 1/0 devices connected to a
1/0 Ports - Definition, common ports | Computer
, standards and protocols
‘System Buses and Communication | Identify the system buses in the computer
System bus and types of buses
13. [5 17 | Bus Architecture: - parallel and
serial
Bus protocols and standards: PCI,
strep CATA 4. References:
SINo_ | Description
1__ | Digital Design - M. Morris Mano and Michael D. Ciletti
Computer Organization and Design: The Hardware/Software Interface - David A. Patterson’
2 | and John L. Hennessy
3__ | Computer System Architecture - M. Morris Mano
4 _| Structured Computer Organization - Andrew S. Tanenbaum
5 _ | Fundamentals of Logic Design - Charles H. Roth and Larry L. Kinney
¢ _ | Digital Circuits and Computer Organization - NPTEL, (IITs and IISc)
https://nptel.ac.in/courses/108/105/108105113/
7 | MIT OpenCourseWare — Digital Systems
https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/
Digital Design and Computer Architecture” (Harris and Harris)
Computer Organization and Design” (Patterson and Hennessy)
10 | Logic and Computer Design Fundamentals” (Mano and Kime)
11 _[ Logisim- Logisim for Beginners (YouTube)
5. CIE Assessment Methodologies
Test Duration | Max
SLNo CIE Assessment Week (minutes) rarks
1, CIE-1TheoryTest 4 90 50
2,_| ClE-2Practice Test 7 180 50
3__| CIE-3TheoryTest 10 90 50 Average of all
4,_| CIE-4Practice Test 13 180 50 CIE=50 Marks
1E-S
* Portfolio evaluation (20)
= Online Course/s of
minimum 10 Hrs. in
7 Infosys Spring Board/ 113 50
‘Swayam/NPTEL/AWS
any other (30)
Total 50 Marks
Note:
Portfolio evaluation
Each laboratory exercise will be evaluated for a total of 20 marks. The evaluation will include the
following components:
"Written description of the experiment in the observation book.
= The results obtained from the experiment.
* Corrections and evaluations of the experiment completed in the previous class, documented in
the record book.
The average of all exercises shall be considered for the final assessment at the end of course.
Rubrics for the Mini Project (if included) should be defined by the course coordinator. 6,_ SEE - Theory Assessment Methodologies
sl. _ | Exam Exam Paper Min marks to
No | SEE~ Theory Assessment} Duration | paper lax Marks \pass
Max scale down to
marks (Conversion)
T. _ | Semester End Examination-| 3 Hours 100 30
20
Theory
7._CIE Theory Test model question paper
Program Computer Science and Engineering Semester -
Course
Name Basics of Digital Logic and Computer Organization | Test yim
Course
Code 2scsi1 Duration | 90 min Marks 50
Name of the Course Coordinator:
Note: Answer any one full question from each section, Each full question carries equal marks,
Q.No
Questions
cL
MARK
co s
Section - 1
a) Group the following numbers into their respective number
systems (Decimal, Binary, Hexadecimal). If a number can belon,
to multiple systems, treat it as decimal by default. Explain you
reasoning for each classification: 62, 1FA,0101011,75 - (10M)
b) Represent the decimal number -34 in binary using the
following methods (sign-magnitude, 1's complement, and 2's
complement) for an 8-bit representation. - (6M)
©) Perform binary addition on the following two 8-bit
numbers:10110011 and 11001101 -(4M)
d) A digital clock uses Binary-Coded Decimal (BCD) to displa
numbers on a seven-segment display. Explain why BCD is used
instead of pure binary and show how the number 25 is
represented in BCD format. _-(5M)
L2
a) Convert the decimal number 87 into its equivalents in binary|
octal, and hexadecimal number systems. Explain the steps you
took for each conversion. - (10M)
b) A temperature sensor gives readings in an 8-bit two's
complement format, where positive numbers represen
temperatures above zero and negative numbers represen
temperatures below zero. If the sensor reads 11100100, convert
this reading to decimal to find the temperature. (6M)
©) Convert each character of the word “HELLO” to its ASCIT binar
representation. (5M)
4) Perform the subtraction 100101 - 1011 using two's
complement binary arithmetic (4M)
L2 Section -2
a) Which gates would you use to design a circuit for these
scenario, justify your selection (12M)
a. The output should be 1 only when at least one input is 1.
», The output is 1 only when the two inputs are the same.
¢ Ina contel system, you need an output of 1 only when all inputs ar 0.
4, Fora security system, if you want the output to be 1 only when both switche
are inthe off position
¢, Output is 1 ifand only ifthe inputs are diferent.
{. Outputs 0 when both inputs are 1.
b) Construct the truth table for a 3-input AND gate, where the
inputs are A, B, and C, and the output X is defined as: (5M)
X=A-B-C 12 2
©) Youare part of a team solving a digital treasure hunt. To 13.
unlock the treasure chest, you need to figure out the secret
combination using a made entirely of NAND gates.
Follow the clues, determine the outputs, and uncover the secret
combination,
Clue 1 : Single NAND Gate -You find a locked door controlled by
a single NAND gate. The inputs A and B are both connected to
switches. The door opens only if the output X=1
What are the possible combinations of A and B to open the
door? (8M) 25
Identify the following gates and construct truth table for each
(12m)
>> |
»>
b) A circuit consists of two inputs, A and B. The output is high
only when both A and B are either high or low. Which logic gate
4 | isused in this circuit, and why? -(5M)
©) You've been given a mysterious circuit that encodes or
decodes a secret binary message using XOR gates. Your task is to
figure out the input, the circuit logic, and the hidden message.
If The binary message M=11001and the secret key K=10101
what is the encoded message X
To decode the message, the encoded message X is passed
through the same XOR gate with the original key K=10101. what
is the decoded message M. - (8M)
12
13 2
Note for the Course coordinator: Each question may have one, two or three subdivisions. Optional
questions in each section carry the same weightage of marks, cognitive level and course outcomes
Sien of the Course Coordinator Sienature of the HOD Sjenature of the IOAC Chairman 8._CIE Practice Test model question paper
Program Computer Science and Engineering Semester 1
CourseName | Basics of Digital Logic and Computer Organization Test yu
CourseCode — ascsiii Duration) 180 min | Marks | 50
Name of the Course Coordinator:
Questions co Marks
‘A security system outputs F if
Door 1 is locked (A) OR Door 2 is locked (B), AND Alarm is OFF (C).
Write the Boolean expression, simplify it, construct truth table and
verify it using simulator.
Design a 2-bit magnitude comparator that compares two 2-bit binary
numbers, A and B, and generates the following outputs:
: Output is 1 if Ais greater than B.
utput is 1 if A is equal to B. 23 50
jutput is 1 if Ais less than B.
Tasks:
Construct the truth table for the 2-bit magnitude comparator, considering all
possible values of A and B
Derive the logic expressions for each output (A>B, A=B, A
