JCEI’S
JAIHIND POLYTECHNIC KURAN
CLASS TEST: - I (2025-26)
Model Answer Paper
Program Code: - Information Technology Program Code: -IF3K
Course Title: - Digital Techniques and Microprocessors Course Code: - 313305
Time: - 1 Hr. 30 Minutes Maximum Marks: - 30
Q. Sub Marking
No Q. No Answer Scheme
1 Attempt any FIVE of the following. 10M
a) Differentiate between Combinational circuit and Sequential Each
Ans point 1/2
circuit.
M
b) Draw the symbol, Truth table and Boolean equation of NAND and NOR Each gate
Ans gate.
1M
NAND GATE NOR gate
Truth table:
Logic expression:
c) List any four features of 8086 microprocessor. Each
Ans 1)Operating clock frequencies are 5MHz,8MHz,10MHz. 1/2M
2)Can operate in single processor and multiprocessor configuration.
3)Support multiprogramming.
4)Provides 256 types of vectored software interrupts.
5)Supports 24 operands addressing modes.
d) Define 1) Bit 2)Nibble Each
Ans defination
1)Bit- The smallest unit of data is defined as a single bit. It can have
1M
two possible values i.e.0 and 1.
2)Nibble- A nibble is a combination of four bits. With a nibble, we
can represent up to 16 distinct values i.e. from 0000 to 1111.
e) Explain rules to simplify Boolean expression using K-map. Each rule
Ans 1/2 M
1.No zero allowed.
2.No diagonals.
3.Overlapping allowed.
4.Wrap around allowed.
5.Fewest number of group possible.
f) Convert following Each
Ans conversio
i) (297)10 = ( )8 n 1M
ii) (453)10 = ( )16
i) (297)10 = ( )8
ii) (453)10 = ( )16
g) Define minterm and Mixterm.Give example. Each
Ans defination
Minterm: 1M
Each individual term in the standard SOP form is called as minterm.
Example: AB+ AB
Maxterm:
Each individual term in the standard POS form is called as maxterm.
Example: (A+B) (A+B)
2 Attempt any FIVE of the following. 12 M
a) State and Explain De-Morgan’s theorems.
The first De Morgan theorem can be written as:
Ans The first theorem states that the, complement of a sum is equal to
product of the complement.
Each
theorem
2M
The second De Morgan theorem can be written as:
The second theorem states that the, complement of a product is equal
to sum of the complement.
b) Implement the OR and NOT gate using NAND gate only. Each
gate 2M
1. . "OR" gate using "Universal NAND" gate:
Ans
2. "NOT" gate using "Universal NAND" gate:
c) Draw and explain full Adder and specify its truth table. Correct
diagram
Full adder is a three input two output combinational logic circuit
Ans &k-map
which can add three single bits applies at its input to produce Sum and 2M
carry outputs.
Block diagram Full Adder Truth Table:
Input Output Truth
A B Cin S Co table
&Workin
0 0 0 0 0
g 2M
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Logic Diagram for Full Adder
d) Implement a 16:1 multiplexer using 4:1 multiplexer. Correct
Ans Diagram
3M
Proper
Labeling
1M M
e) Explain the different triggering methods used in flip-flop. Each
Ans method
1). Positive edge triggered flip-flop: The type of edge-triggered flip-flop
2M
whose output changes its state only on the rising edge (edge that goes
from low to high) of the clock pulse is called a positive edge-triggered
flip-flop. The positive edge triggered flip flop is also called a rising
edge-triggered flip-flop.
2). Negative edge triggered flip-flop: The type of edge-triggered flip
flop whose output changes its state only on the falling edge (edge that
goes from high to low) of the clock pulse is called a negative edge-
triggered flip-flop. The negative edge triggered flip flop is also known
as a falling edge-triggered flip-flop.
f) Simplify the following equation using K-map and realize it using logic Correct
Ans gate. K-Map
2M
Y=∑m= (0,1,2,3,8,10)+ ∑d(5,7)
Correct
diagram
2M
g) Each
Ans Convert the following: conversio
n 1M
1. (11001)2= (?)10 2. (10101)2= (?)8
3. (37)8 = (?)2 4. (5AC)16=(?)2
1. (11001)2= (?)10
2. (10101)2= (?)8
3. (37)8 = (?)2
4. (5AC)16=(?)2
