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Binary Arithmetic: Addition, Subtraction, and Signed Numbers

The document provides an overview of binary arithmetic operations including addition, subtraction, multiplication, and division, along with the representation of signed binary numbers using sign-magnitude, 1's complement, and 2's complement forms. It highlights the advantages and disadvantages of these methods, particularly focusing on the ease of arithmetic operations with 2's complement and the issues of ambiguity in 1's complement. Additionally, it discusses binary codes, their classifications, and the specific features of weighted and non-weighted codes, including Gray code.

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0% found this document useful (0 votes)
20 views77 pages

Binary Arithmetic: Addition, Subtraction, and Signed Numbers

The document provides an overview of binary arithmetic operations including addition, subtraction, multiplication, and division, along with the representation of signed binary numbers using sign-magnitude, 1's complement, and 2's complement forms. It highlights the advantages and disadvantages of these methods, particularly focusing on the ease of arithmetic operations with 2's complement and the issues of ambiguity in 1's complement. Additionally, it discusses binary codes, their classifications, and the specific features of weighted and non-weighted codes, including Gray code.

Uploaded by

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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Dr.

Kananbala Ray
Email :-kbrayfet@[Link]
Binary Addition

It is a key for binary subtraction, multiplication, division. There are


four rules of binary addition.

n fourth case, a binary addition is creating a sum of (1 + 1 = 10) i.e. 0


is written in the given column and a carry of 1 over to the next
column.

Example − Addition

Binary Subtraction

Subtraction and Borrow, these two words will be used very


frequently for the binary subtraction. There are four rules of binary
subtraction.
Example − Subtraction

Binary Multiplication

Binary multiplication is similar to decimal multiplication. It is simpler


than decimal multiplication because only 0s and 1s are involved.
There are four rules of binary multiplication.

Example − Multiplication

Binary Division

Binary division is similar to decimal division. It is called as the long


division procedure.
Example − Division

Signed binary numbers

So far, we have considered only positive numbers. The


representation of negative numbers is also equally important.

In mathematics, positive numbers (including zero) are represented as


unsigned numbers. That is we do not put the +ve sign in front of them
to show that they are positive numbers.

However, when dealing with negative numbers we do use a -ve sign


in front of the number to show that the number is negative in value
and different from a positive unsigned value, and the same is true with
signed binary numbers.

There are two ways of representing signed numbers-sign magnitude


form and complement form. There are two complement forms 1's
complement form and 2's complement form.

Signed Binary Numbers use the MSB as a sign bit to display a range
of either positive numbers or negative number.

In an 8-bit binary number (a byte) we can have a value ranging from 0


(000000002) to 255 (111111112) ie. 28 = 256 different combinations.
For signed binary numbers the most significant bit (MSB) is used as
the sign bit. If the sign bit is “0”, this means the number is positive in
value. If the sign bit is “1”, then the number is negative in value. The
remaining bits in the number are used to represent the magnitude of
the binary number in the usual unsigned binary number format way.

N.B. Adding a “1” to the front of it if the binary number is negative


and a “0” if it is positive.

For example, the decimal number 53 can be expressed as an 8-bit


signed binary number as follows.
Positive Signed Binary Numbers

Negative Signed Binary Numbers

The disadvantage here is that whereas before we had a full range n-bit
unsigned binary number, we now have an n-1 bit signed binary
number giving a reduced range of digits from:

-2(n-1) to +2(n-1)

So for example: if we have 4 bits to represent a signed binary number,


(1-bit for the Sign bit and 3-bits for the Magnitude bits), then the
actual range of numbers we can represent in sign-magnitude notation
would be:

-2(4-1) – 1 to +2(4-1) – 1

-2(3) – 1 to +2(3) – 1

-7 to +7
Whereas before, the range of an unsigned 4-bit binary number would
have been from 0 to 15, or 0 to F in hexadecimal, we now have a
reduced range of -7 to +7. Thus an unsigned binary number does not
have a single sign-bit, and therefore can have a larger binary range as
the most significant bit (MSB) is just an extra bit or digit rather than a
used sign bit.
⇒ 1011112
-1510 as a 6-bit number
+2310 as a 6-bit number ⇒ 0101112
-5610 as a 8-bit number ⇒ 101110002
+8510 as a 8-bit number ⇒ 010101012
-12710 as a 8-bit number ⇒ 111111112
Note that for a 4-bit, 6-bit, 8-bit, 16-bit or 32-bit signed binary
number all the bits must have a value, therefore “0’s” are used to fill
the spaces between the leftmost sign bit and the first or highest value
“1”.

However, using this sign-magnitude method can result in the


possibility of two different bit patterns having the same binary value.
For example, +0 and -0 would be 0000 and 1000 respectively as a
signed 4-bit binary number. So we can see that using this method
there can be two representations for zero, a positive zero ( 00002 ) and
also a negative zero ( 10002 ) which can cause big complications for
computers and digital systems.

Again +1=0,001, and -1=1,001, when we will add these two numbers
0,001
+ 1,001
----------
1,010(-2)------>Disadvantage

Complements are used in the digital computers in order


to simplify the subtraction operation and for the logical
manipulations.
Binary system complements

As the binary system has base r = 2. So the two types of complements


for the binary system are 2's complement and 1's complement.

1's complement
The 1's complement of a number is found by changing all 1's to 0's
and all 0's to 1's. This is called as taking complement or 1's
complement. In 1's complement, the positive numbers are exactly the
same as before for unsigned binary numbers.

Example of 1's Complement is as follows.

Example The one’s complement of 100101002 is simply 011010112 as


all the 1’s are changed to 0’s and the 0’s to 1’s.
2's complement
Two’s Complement or 2’s Complement as it is also termed, is another
method like the previous sign-magnitude and one’s complement form,
which we can use to represent negative binary numbers in a signed
binary number system.
In two’s complement, the positive numbers are exactly the same as
before for unsigned binary numbers.
The 2's complement of binary number is obtained by adding 1 to the
Least Significant Bit (LSB) of 1's complement of the number.

2's complement = 1's complement + 1

Example of 2's Complement is as follows.

One’s Complement of a Signed Binary Number

In one’s complement, positive numbers (also known as non-


complements) remain unchanged as before with the sign-magnitude
numbers.

The one’s complement of a negative binary number is the


complement of its positive counterpart, so to take the one’s
complement of a binary number, all we need to do is change each bit
in turn. The easiest way to find the one’s complement of a signed
binary number when building digital arithmetic or logic decoder
circuits is to use Inverters. The inverter is naturally a complement
generator and can be used in parallel to find the 1’s complement of
any binary number. two’s complement is one’s complement + 1

Find 1's complement of (+14)10


Ans
1's complement of (+14)10 is 0,0001110
Find 1's complement of (-14)10
Ans
(-14)10 in sign magnitude presentation is 1,0001110
1's complement of (-14)10 is 1,1110001.
4-bit Signed Binary Number Comparison

Signed Signed One’s Signed Two’s


Decimal
Magnitude Complement Complement
+7 0111 0111 0111
+6 0110 0110 0110
+5 0101 0101 0101
+4 0100 0100 0100
+3 0011 0011 0011
+2 0010 0010 0010
+1 0001 0001 0001
+0 0000 0000 0000
-0 1000 1111 –
-1 1001 1110 1111
-2 1010 1101 1110
-3 1011 1100 1101
-4 1100 1011 1100
-5 1101 1010 1011
-6 1110 1001 1010
-7 1111 1000 1001
Subtraction of Two Binary Numbers
[Link] 1's complement method
[Link] 2's complement method

Subtraction of Two Binary Numbers

Example 3: Subtract 2710 from 11510 using 1's complement method


11510 – 2710 = 8810

11510 in binary is: 0 1 1 1 0 0 1 1 2

+2710 in binary is: 0 0 0 1 1 0 1 1 2

-2710 in binary is: 1 0 0 1 1 0 1 1 2

Adding the first number and the complement of the second number
(11100100) gives:

01110011

+ 11100100

Overflow → 1 0101011
1

Overflow indicates that the answer is positive. If there is no overflow


then the answer is negative.

01010111
+ 1
01011000

So the result of subtracting 27 ( 000110112 ) from 115 ( 011100112 )


using 1’s complement in binary gives the answer of: 010110002 or (64
+ 16 + 8) = 8810 in decimal.

Two’s Complement of a Signed Binary Number


Two’s Complement or 2’s Complement as it is also termed, is
another method like the previous sign-magnitude and one’s
complement form, which we can use to represent negative binary
numbers in a signed binary number system. A negative number,
however, is represented by a binary number, which when added to its
corresponding positive equivalent results in zero.
In two’s complement form, a negative number is the 2’s complement
of its positive number with the subtraction of two numbers being A –
B = A + ( 2’s complement of B ) using much the same process as
before as basically, two’s complement is one’s complement + 1.

The main advantage of two’s complement over the previous one’s


complement is that there is no double-zero problem plus it is a lot
easier to generate the two’s complement of a signed binary number.
Therefore, arithmetic operations are relatively easier to perform when
the numbers are represented in the two’s complement format.

Special case in 2's complement representation: Whenever a


signed number has a 1 in the sign bit and all 0s for the magnitude bits,
the decimal equivalent is -2n, where n is the number of bits in the
magnitude. For example 1000=-8 and 10000=-16

Example :-
Express -73.75 in 12-bit 2's complement form
Ans
+73.75= 0,1001001.1100
-73.75=1,1001001.1100
1's complement of (-73.75)= 1,0110110.0011
2's complement of (-73.75)= 1,0110110.0011
+1
---------------------
10110110.0100
Example: Subtract 14 from 46 using 2's complement method

Ans: We can write the above as 46-14=46+(-14)

Rule: In the 2's Complement subtraction , add the 2's complement of


the subtrahend to the minuend. If there is a carry out, ignore it. Look
at the sign bit i.e MSB of the term. If the MSB is a 0,the result is
positive and it is in true binary form. If the MSB is a 1(whether there
is a carry or no carry at all)the result is negative and in its 2's
complement form. Take its 2's complement to find its magnitude in
binary.
Differences between 1’s complement and 2’s complement

These differences are given as following below −

1’s complement 2’s complement

To get 2’s complement of a binary number,


To get 1’s complement of a binary number,
simply invert the given number and add 1 to
simply invert the given number.
the least significant bit (LSB) of given result.

1’s complement of binary number 110010 is 2’s complement of binary number 110010 is
001101 001110

Simple implementation which uses only NOT Uses NOT gate along with full adder for each
gates for each input bit. input bit.

Can be used for signed binary number Can be used for signed binary number
representation but not suitable as ambiguous representation and most suitable as
representation for number 0. unambiguous representation for all numbers.

0 has two different representation one is -0 0 has only one representation for -0 and +0
(e.g., 1 1111 in five bit register) and second is (e.g., 0 0000 in five bit register). Zero (0) is
+0 (e.g., 0 0000 in five bit register). considered as always positive (sign bit is 0)

For k bits register, positive largest number that For k bits register, positive largest number
can be stored is (2(k-1)-1) and negative lowest that can be stored is (2(k-1)-1) and negative
number that can be stored is -(2(k-1)-1). lowest number that can be stored is -(2(k-1)).

end-around-carry-bit addition occurs in 1’s end-around-carry-bit addition does not occur


complement arithmetic operations. It added to in 2’s complement arithmetic operations. It is
the LSB of result. ignored.

1’s complement arithmetic operations are not 2’s complement arithmetic operations are
easier than 2’s complement because much easier than 1’s complement because of
of addition of end-around-carry-bit. there is no addition of end-around-carry-bit.

Sign extension is used for converting a signed Sign extension is used for converting a signed
integer from one size to another. integer from one size to another.
Binary Codes

In the coding, when numbers, letters or words are represented by a


specific group of symbols, it is said that the number, letter or word is
being encoded. The group of symbols is called as a code. The digital
data is represented, stored and transmitted as group of binary bits.
This group is also called as binary code. The binary code is
represented by the number as well as alphanumeric letter.

Advantages of Binary Code

Following is the list of advantages that binary code offers.

 Binary codes are suitable for the computer applications.


 Binary codes are suitable for the digital communications.
 Binary codes make the analysis and designing of digital circuits
 Since only 0 & 1 are being used, implementation becomes easy.

Classification of binary codes

The codes are broadly categorized into following four categories.

 Weighted Codes
 Non-Weighted Codes
 Alphanumeric Codes
 Error Detecting and Error Correcting Codes

Weighted Codes

Weighted binary codes are those binary codes which obey the
positional weight principle. Each position of the number represents a
specific weight. Several systems of the codes are used to express the
decimal digits 0 through 9. In these codes each decimal digit is
represented by a group of four bits.
Example:-8421,2421,84-2-1 etc...
8421 is the natural BCD code
Non-Weighted Codes

In this type of binary codes, the positional weights are not assigned.
The examples of non-weighted codes are Excess-3 code and Gray
code.

Gray Code

It is the non-weighted code . That means there are no specific weights


assigned to the bit position. We call it Gray code after Frank [Link]
has a very special feature that, only one bit will change each time the
decimal number is incremented as shown in table -1. As only one bit
changes at a time, the gray code is called as a unit distance code. It is
also known as minimum error [Link] gray code is a cyclic
code.( Each successive code word differs from the preceding one in
only one bit position). Binary number is converted to Gray code to
reduce switching [Link] is also a reflective code. Gray code
cannot be used for arithmetic operation.

Binary to Gray code conversion :

1. The Most Significant Bit (MSB) of the gray code is always


equal to the MSB of the given binary code.
2. Add the MSB of binary to the next bit of binary [Link] the
sum and neglect the carry bit(or perform the X-OR operation).
3. Repeat the process.
Example:Binary to Gray code conversion

Table:-1
HDL implementation: Verilog code for Binary to Gray using gate-level mod

module Binary_to_Gray( input A,B,C,D, output G4,G3,G2,G1 );

buf x1(G4,A);

xor gate1(G3,A,B);

xor gate2(G2,B,C);

xor gate3(G1,C,D);

endmodule

Gray to binary conversion :

[Link] Most Significant Bit (MSB) of the Gray code is always


equal to the MSB of the given binary number.

[Link] the MSB of binary to the next bit of gray [Link] the
sum and neglect the carry bit(or perform the X-OR operation).

[Link] the process.

Example: Gray to Binary conversion


Application of Gray code

 Gray code is popularly used in the shaft position encoders.


 A shaft position encoder produces a code word which represents
the angular position of the shaft.
Binary Coded Decimal (BCD) code

In this code each decimal digit is represented by a 4-bit binary


number. BCD is a way to express each of the decimal digits with a
binary code. In the BCD, with four bits we can represent sixteen
numbers (0000 to 1111). But in BCD code only first ten of these are
used (0000 to 1001). The remaining six code combinations i.e. 1010
to 1111 are invalid in BCD. It is useful in mathematical operation. It
is a weighted code and also sequential code.

Advantages of BCD Codes

 It is very similar to decimal system.


 We need to remember binary equivalent of decimal numbers 0
to 9 only.

Disadvantages of BCD Codes

 The addition and subtraction of BCD have different rules.


 The BCD arithmetic is little more complicated.
 BCD needs more number of bits than binary to represent the
decimal number.

Example : 14=1110 in pure binary

14=0001 0100 in BCD

So BCD is less efficient than binary.

BCD to Binary Conversion

Steps

 Step 1 -- Convert the BCD number to decimal.


 Step 2 -- Convert decimal to binary.

Example − convert (00101001)BCD to Binary.

Step 1 - Convert to BCD

BCD Number − (00101001)BCD

Calculating Decimal Equivalent. Convert each four digit into a group


and get decimal equivalent for each group.

Step BCD Number Conversion

Step 1 (00101001)BCD 00102 10012


Step 2 (00101001)BCD 210 910
Step 3 (00101001)BCD 2910

BCD Number − (00101001)BCD = Decimal Number −> 2910


Logic Gates
A Logic Gates is an electronic circuit which performs the particular
logic operation. They are also known as the building block of the
digital electronics circuits. It is a combination of various (one or more
than one) input and one output. They are built up by various
integrated circuits. Inputs and outputs of logic gates can occur only in
two levels(i.e High and low or True and False or On and Off or
simply 1 and 0).

 AND, OR and NOT are called basic gates.


 NAND, NOR gates are called universal gate.
 XOR(EX-OR), XNOR(EX-NOR) are called
derived gates.
AND Operation, OR and NOT Operation
The three Binary Operations are AND Operation, OR and NOT
Operation. A binary logic deals with variables having distinct values
like true or false, yes or no, hot or cold, high or low, etc. In a digital
system design, assigning the values 1 or 0 to these two values of the
variables because digital algebraic operations involve the binary
number system. Binary logics consist of binary variables such as x, y,
z, a, b, c, etc. and three basic logical operations namely AND, OR and
NOT(AOI). Each binary variable is having two and only two distinct
values 0 and 1.

OR Gate
An OR gate has two or more than two inputs and one output signal. It
is called an OR gate because the output signal will be high only if any
or all input signals are high. This gate is also known as any or all gate.
This can also be called as an inclusive OR gate. The OR gate follow
the logical operation of the input and output signals. It permits the
signal to pass and stop through it.

It is represented by a plus (+) sign.


For example – x + y = z which is read as “x or y is equal to z”.

The logic symbol for the OR gate is shown below.


The switching circuit of the gate operation is shown below.

A lamp L is connected to a voltage source. A and B are the two


switches. The switching circuit illustrates that the lamp L will glow
when either of the switches A or B or both A and B is closed. The
lamp will go off when both the switches are in the open condition.

Truth Table:- The table used to represent the Boolean expression of


a logic gate function is commonly called a Truth Table. A logic gate
truth table shows each possible input combination to the gate or
circuit with the resultant output depending upon the combination of
these input(s).

Then a logic circuit with “n” number of inputs would have 2n possible
input combinations. For example, consider a single 2-input logic
circuit with input variables labelled as A and B. There are “four”
possible input combinations or 22. a 3-input logic circuit would have 8
possible input combinations or 23 and a 4-input logic circuit would
have 16 or 24, and so on as the number of inputs increases

The truth table of the OR gate is given below.

A B Z
0 0 0
0 1 1
1 0 1
1 1 1
From the truth table, it is clear that when the inputs of the OR gate are
LOW that is 0, the output will be 0. If any one of the input or both the
input of the OR gate is 1 that is HIGH, the output will be high, i.e., 1.

AND Gate
The AND operation is represented by a dot. The And Operation is
mostly used in the logical operation in digital electronics and for
designing the digital circuit. AND gate also has two or more input
signals same as that of OR gate, and the output is single. The gate has
a high output only when all the input signals are high otherwise the
output signal is low. Hence AND gate is also called an all or nothing
gate .The symbolic representation of the AND gate is shown below .

The truth table of the AND gate is given below.

A B Z
0 0 0
0 1 0
1 0 0
1 1 1

AND gate IC:-

 74LS08 Quad 2-input


 74LS11 Triple 3-input
 74LS21 Dual 4-input
7408 Quad 2-input AND Gate

The switching circuit of the AND gate is shown below. A lamp is


connected to a voltage source through the two switches A and B. The
lamp will glow when both the switches are closed. If any one of the
switches is opened, the lamp will not glow.
Application :-The AND gate is an ideal control device. It is used in
interfacing circuitry and Microprocessor design.

NOT Gate
Like OR and AND operation, the NOT Operation is also an
important function in the digital electronic circuit. It is denoted by a
bar. The binary not operation is also known as not function or
complement function or bit invert function. This gate is also known as
Inverter or Inhibitor gate or Complement gate . The not operation has
only one input and one output. The input and output of the not
operation are either zero or one. The not operation will always
produce a 0 out if their input is 1 and if their input is 0 then it
produces the 1 output.

Example: Consider the word statement Z = A Not A. In Boolean


algebra it is expressed as

For the given operation the output can be expressed as

The logic symbol for the gate is shown below.

The symbol of the not gate is a triangle with a bubble on its end. This
bubble is known as the inversion bubble. It gives the complement of
the input signal. It is also known as the decision making devices
because it has only one input.
The switching circuit diagram of the NOT gate is shown below.

The switching circuit illustrates that the lamp will glow when switch
A is open and will go off when the switch A is closed.

The truth table of the NOT gate is given below.

A Z
0 1
1 0

Universal Logic Gate(NAND and NOR)


NAND Gate
The NAND gate is a combination of an AND gate and NOT gate.
They are connected in cascade form. It is also called Negated And
gate. The NAND gate provides the false or low output only when both
the inputs are high or true. The NAND gate is essential because
different types of a Boolean function are implemented by using it. It
consumes less power.

The NAND gate has the property of functional completeness. The


function completeness means any types of gates can be implemented
by using the NAND gate. It performs the function of OR, NOR and
AND gate. The logic symbol for the gate is shown below.

The logic circuit of the NAND gate is shown below

From the logic circuit, the output can be expressed as

The equation is read as “Z equals NOT A AND B”. Since the logic
circuit involves an AND gate followed by an inverter.

The truth table of the NAND gate is given below.

A B Z
0 0 1
0 1 1
1 0 1
1 1 0

From the truth table of the gate it is clear that, all the inputs must be
high to get a low output and if any of the input is low, the output
obtained will be high. If any one of the input is also high the output
will be high that is [Link] gate is also called a bubbled OR gate or
negative OR gate. Also called an active low OR gate.
NAND GATE IC

7400---Quad 2 I/P NAND gate


7420---Dual 4 I/P NAND gate

Logic Gates using only NAND Gates


NOR Gate
An OR gate followed by a NOT gate in a cascade is called a NOR
gate. In other words, the gate which provides a high output signal
only when there are low signals on the inputs such type of gate is
known as nor gate. The logic symbol of the gate is shown below.

From the logic circuit of the NOR gate, the output can be expressed
by the equation shown below. The below equation is read as “Z
equals NOT A OR B”. Since the logic circuit involves an OR gate
followed by an Inverter, the output can only be high when both the
inputs are low.

The truth table of the NOR gate is given below.

A B Z
0 0 1
0 1 0
1 0 0
1 1 0
Hence, in NOR gate, all the inputs must be low to get high output that
is when both the inputs A and B are at 0 the output will be 1. If any of
the input is high, the output of the gate will be low that is 0. If both
the inputs are high then also, the output will be low, i.e., 0.

Logic Gates using only NOR Gates


Exclusive OR Gate – EXOR Gate
EX-OR gate(X-OR)

The EXOR gate is used extensively in digital data processing circuits


and is known as Exclusive-OR-gate. The EXOR gate has a high
output only when an odd number of inputs are high. For the two input
EXOR gates, the output will be high when the set of input is either 01
or 10. The XOR gate is used in the adder, subtractor and controlled
inverter circuit. It is also used in the computers for implementing the
binary addition. It is called an anti-coincidence gate or enequality
detector . Therefore, the gate can be used as a Comparator where it
gives high output if both the inputs are not equal.

7486 Quad 2-input Exclusive-OR Gate

The logic symbol of the EXOR gate is shown below.

Exclusive-OR function being given as:

Z = (A ⊕ B) = A'.B + A.B'
Implementation of X-OR Gate using basic logic gates(AOI).

The truth table for X-OR logic gate

A B Z
0 0 0
0 1 1
1 0 1
1 1 0
For AB: 00

For AB: 01

For AB: 10

For AB: 11

From the truth table, it is analysed that the output is high when A or B
is high, but it is not high when both are high. That’s why this logic
circuit is known as an exclusive-OR gate. Thus, the inputs must be
different to get a high output from the two input exclusive OR gate.
X-OR gate using NAND Gates only.
How can you convert an XOR gate into a buffer or an inverter?

Figure 1 above shows the truth table of a 2-input XOR gate. It has two
inputs A, B and an output OUT. On looking closely, we observe that:

 If one of the inputs (say B) is 0, OUT is equal to the other input.


For instance, when B = 0,
o OUT = 0 when A = 0
o OUT = 1 when A = 1
 Similarly, if one of the inputs is 1, OUT is equal to invert of the
other input. For instance, when B = 1,
o OUT = 1 when A = 0
o OUT = 0 when A = 1

Using the above information, XOR gate can be easily converted to a


buffer and an inverter.

Buffer using XOR gate: Simply connecting one of the inputs to logic
'0' will convert XOR gate into a buffer. As shown in the truth table
below, OUT is following the value of B.

Inverter design using XOR gate: Similarly, we can realize an inverter


using an XOR gate by connecting one of the inputs to logic '1'. As
shown in the truth table below, OUT is opposite to the value of B.
Exclusive NOR Gate – EXNOR Gate
EXNOR gate means exclusive NOR gate and is a combination of X-
OR and NOT gate. It also has two inputs and one output. When both
the inputs are at 0, the output of the EXNOR gate will be high i.e.1.
If one of the input is 0 and the other is 1 the output will be 0, and the
gate is known as Coincidence gate. The output of the gate are high
only when both of their input are equivalent to each other and because
of this the ex-nor gate is known as an equivalent gate. It is also called
an equality detector.
The logical symbol of the X-NOR gate is shown below.

The logical symbol of exclusive nor gate is represented by the


exclusive-or gate with the bubble. It is the complementary of the
exclusive or gate.

Q=A  B=(A ⊕ B) '= AB+A'B'


The truth table of the X-NOR gate is given below.

A B Z
0 0 1
0 1 0
1 0 0
1 1 1

In general, the output of the logic gate is high only when there inputs
are of even numbers and low output is obtained only when there
inputs are of odd numbers.

Homework

[Link] can you convert an XNOR gate into a buffer or an inverter?

Logic Circuit of [Link] gate using (AOI)


X-NOR using NAND Gate only

X-NOR using NOR Gates only

Ex-NOR gates are used mainly in electronic circuits that perform


arithmetic operations and data checking such as Adders, Subtractors
or Parity Checkers, etc. As the Ex-NOR gate gives an output of logic
level “1” whenever its two inputs are equal it can be used to compare
the magnitude of two binary digits or numbers and so Ex-NOR gates
are used in Digital Comparator circuits.

74266 Quad 2-input Ex-NOR Gate


Find the output expression for the given circuit?

The applications of Logic Gates are:

 NAND Gates are used in Burglar alarms and buzzers.


 They are basically used in circuits involving computation and processing.
 They are also used in push button switches. E.g. Door Bell.
 They are used in the functioning of street lights.
 AND Gates are used to enable/inhibit the data transfer function.
 They are also used in TTL (Transistor Transistor Logic) and CMOS circuitry.

Advantages of Logic Gates

The advantages of Logic Gates are:


 Logical Operations are performed using Boolean Algebra which makes the circuit
design more economical and simple.
 Logic ‘1’ and Logic ‘0’ can be easily distinguished.

Disadvantages of Logic Gates

The disadvantages of Logic Gates are:

 Operating Voltage is limited.


 Time delay occurs between input and output.
Boolean Theorems
Boolean algebra was invented by George Boole in [Link]
Simon Boole, an Englishman, born in 1815, known today as the
"father of Boolean Algebra "published his Mathematical Analysis of
Logic which has found wide spread application in the design of digital
computers. A set of rules or Laws of Boolean Algebra expressions
have been invented to help reduce the number of logic gates needed to
perform a particular logic operation resulting in a list of functions or
theorems known commonly as the Laws of Boolean Algebra.

Boolean Algebra is the mathematics we use to analyse digital gates


and circuits. We can use these “Laws of Boolean” to both reduce and
simplify a complex Boolean expression in an attempt to reduce the
number of logic gates required. Boolean Algebra is therefore a system
of mathematics based on logic that has its own set of rules or laws
which are used to define and reduce Boolean expressions.

Boolean Algebra is used to analyze and simplify the digital (logic)


circuits. It uses only the binary numbers i.e. 0 and 1. It is also called
as Binary Algebra or logical Algebra

Boolean theorems and laws are used to simplify the various logical
expressions. In a digital designing problem, a unique logical
expression is evolved from the truth table. If this logical expression is
simplified the designing becomes easier. The Boolean algebra is
mainly used in digital electronics, set theory and digital electronics. It
is also used in all modern programming languages. Thus, Boolean
theorems help in this way.

There are few basic laws and theorems of Boolean algebra, some of
which are familiar to everyone such as Cumulative Law, Associative
Law, Distributive law, De Morgan’s Theorems, Double Inversion law
and Duality Theorems.
Boolean Algebra-Laws and Axioms

Axioms are set of logical expressions that we accept without any


proof and upon which we build a set of useful theorems.

Duality Theorem

The new Boolean relation can be derived with the help of Duality
theorem. According to this theorem for the given Boolean relation,
the new Boolean relation can be derived by the following steps.

 Changing each OR sign to an AND sign.


 Changing each AND sign to an OR sign.
 Complementing each 0 or 1 appearing in the given Boolean
identity

For example:

The distributive law states that

Now, by using the duality theorem, we can get the new relation
by interchanging each OR and AND sign. The equation
becomes.

This equation is a new Boolean relation. Similarly, for any other


Boolean relation, its dual relation can also be derived.
1. Complementation Laws

2. AND laws

These laws use the AND operation. Therefore they are called as AND
laws. The three basic identities of AND operations is given below.

3. OR laws

These laws use the OR operation. Therefore they are called as OR


laws.

(Null Law)

(Identity Law)
4. Commutative laws
5. Associative Laws
6. Distributive Laws
7. Redundant Literal Rule

8. Idempotence Laws
9. Absorption Laws

10. Consensus Theorem (Included Factor Theorem)


11. Transposition Theorem

12. DeMorgan’s Theorem

Law 1:
Law 2:
K-Map (Karnaugh Map)

It is a graphical representation of minimization of Boolean expression.


This map is first proposed by Veitch and slightly modified by
Karnaugh in 1953 is known as Veitch Diagram or [Link]. The
[Link] consists of a number of squares. Each square is called a
cell .Each of the squares represents a minterm or a maxterm . K-map
technique is used upto 6 variables. The number of cells in the K-map
is determined by the number of input variables and is mathematically
expressed as two raised to the power of the number of input variables,
i.e., 2n, where the number of input variables is n.

Thus, to simplify a logical expression with two inputs, we require a


K-map with 4 (=22) cells. A four-input logical expression would lead
to a 16 (=24) celled-K-map, and so on.

Further, each cell within a K-map has a definite place-value which is


obtained by using an encoding technique known as Gray code.

In K-maps, the rows and the columns of the table use Gray code-
labelling which in turn represent the values of the corresponding input
variables. This means that each K-map cell can be addressed using a
unique Gray Code-Word.

Pair:- A group of two adjacent cells in Karnaugh Map(K-Map).A pair


cancels one variable in a k-map Simplification.
Quad:- A group of four adjacent cells in Karnaugh Map(K-Map).A
quad cancels two variables in a k-map Simplification.
Octet:- A group of eight adjacent cells in Karnaugh Map(K-Map).An
octet cancels three variables in a k-map Simplification
Standard SOP is also known as Disjunctive canonical form. It is also
known as canonical Sum-of-Products form. In standard sop form, the
function is the sum of a number of product terms where each term
contains all the variables(literals) of the function either in
complemented or un complemented form. In SOP A is considered as
1 and A̅ is considered as 0.
Standard POS is also known as Conjunctive Canonical Form(CCF). It
is also known expanded product of sums form or canonical Products -
of- Sum form. In standard POS form, the function is the product of a
number of sum terms where each term contains all the variables of the
function either in complemented or un complemented form. In POS A
is considered as 0 and A̅ is considered as 1.
The minterms are expressed as m0,m1,m2..........(mi) .The suffix i
indicates the decimal code corresponding to the minterm combination.
An n variable function can have in all 2n minterms. A two variable
function have 22 = 4 minterms[A̅B̅(m0),A̅B(m1),AB̅(m2)andAB(m3)].
A three variable function have 23= 8 minterms and a four variable
function have 24= 16 minterms. Here A is considered as 1 and A̅ is
considered as 0

The maxterms are expressed as M0,M1,M2..........(Mi) .The suffix i


indicates the decimal code corresponding to the maxterm combination.
An n variable function can have in all 2n maxterms.
A two variable function have 22 = 4 maxterms[A+B (M0), A+B̅ (M1),
A̅+B (M2)and A̅+B̅ (M3)]. A three variable function have 23= 8
maxterms and a four variable function have 24= 16 maxterms. Here A
is considered as 0 and A̅ is considered as 1.
Minterms and Maxterms of a three variable function.
Possible minterm and maxterm
\
Advantages of K-Maps

1. The K-map simplification technique is simpler and less error-


prone compared to the method of solving the logical expressions
using Boolean laws.
2. It prevents the need to remember each and every Boolean
algebraic theorem.
3. It involves fewer steps than the algebraic minimization
technique to arrive at a simplified expression.
4. K-map simplification technique always results in minimum
expression if carried out properly.
5. It is also a faster one, for reducing Boolean expressions.

Disadvantages of K-Maps

1. As the number of variables in the logical expression increases,


the K-map simplification process becomes complicated i.e it is
almost impossible to work with problems of 7 or more variables
using K-Map.
2. K-map simplification is a manual technique and simplification
process is heavily dependent on the human abilities.
3. It cannot be programmed.
4. The minimum logical expression arrived at by using the K-map
simplification procedure may or may not be unique depending
on the choices made while forming the groups. For example, for
the output variable Y shown by the K-map in Figure, we can
obtain two different, but accurate logical expressions. The
variation in the solution obtained is observed in the third term,
which may be either B̅C̅ or AC̅ (highlighted in Figure). This
difference depends on whether one chooses to group the cells
(0,4) or (4,6) to form a two-celled group in order to cover the
one found in the K-map cell numbered 4.
Figure
In excess-3 system the binary states 0000, 0001, 0010, 1101, 1110
and 1111 are invalid .Hence these are called don't care. The don't care
terms are denoted by d or X. During the process of design using an
SOP map don't care is considered as 1 . During the process of design
using an POS map don't care is considered as 0.

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