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Computer Architecture Model Question Papers

The document contains model question papers for computer architecture, structured into three sections: Section A with short answer questions, Section B with detailed questions, and Section C with comprehensive questions. Each section covers various topics such as number systems, logic gates, microprocessors, and instruction sets, with varying marks assigned to each question. The papers are designed to assess knowledge in computer architecture fundamentals and practical applications.

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Thiran Dami
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0% found this document useful (0 votes)
108 views6 pages

Computer Architecture Model Question Papers

The document contains model question papers for computer architecture, structured into three sections: Section A with short answer questions, Section B with detailed questions, and Section C with comprehensive questions. Each section covers various topics such as number systems, logic gates, microprocessors, and instruction sets, with varying marks assigned to each question. The papers are designed to assess knowledge in computer architecture fundamentals and practical applications.

Uploaded by

Thiran Dami
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

MODEl QEESTION PAPERS

r•...
.. MODEL QUESTION PAPER - 1
Max Marks : 80
SECTION-,q
I. Answer any Ten questions. Each question carries 2 Marks. (10 X 2 = 20}

1. (a) Define Computer Architecture.


(b) Write the symbol and truth table for NANO gate
(c) Convert (0111) 2 to excess 3 code.
(d) What is a hexadecimal number system? \ - g
(e) State and Prove Distributive Law Using Truth Table. 2 - .:5 <)
1
(f) Define flip flop. Mention its types:3 • C) ; 3 • '.3
!

(g) Define a Multiplexer. '' • ' -


(h) Define a micro-operation with an example. 'j • 1
(i) What is a Stack Pointer (SP)? •• I '1
(j) What is EBCDIC? •• '~;:,
-¥( -. I 3 ~l
(k) What is Assembly Language Programming?
(1) What is the purpose of the Instruction Register in 8085? i ...f). D
[ SECTION-'8 ]
II. Answer any Five questions. Each question carries 6 marks. (5 x 6 = JO)
2. What is {r-l}'s compliment? Explain (r-l)'s Complement for Different Number System. \ # t 'b
3. Explain the Functional Entities of a Computer System~ "Y
4. Simplify F(A, B, C, D) = l:m(l, 5, 7, 8, 9, 13) + l:d(3, 12) } , l:, ~
5. Define a half adder. Describe its truth table, block diagram. How a Half Adder Works? •
6. Explain the working of 4-Bit Synchronous Binary Counter '-1 3(,<I

7. Explain the function and purpose of different registers used in a basic computer system. S. \ \ ,, ~\ 2- \
/

( D.2 }.--- -• Comput.r Architectvre

8. Explain Push and Pop Micro-Operation in memory stack. b , ' \


9 • Describe how to write, assemble, and execute a simple 8085 assembly language program . + . L( ~

( 3 x 1 O = 30)
Ill. Answer any Three questio ns. Each questio n carries 10 marl<s.

lO,_)Jp lain all the cases of binary subtraction using Two's Complement Method
with exampl es. l ,3';
.,J,-t'.' Explain the working of a 3-to-8 line Decoder. Mention its applications. Y 1
12. (a) Write a note on the following: (a) BUN (b) BSA (c) ISZ ~
.£»fExplain different addressing modes used in comput er architec ture. ° 6 3~
nicate with the Arithm etic~;) ~
~ Describe the general register organization in the CPU. How do register s commu
~
Logic Unit (ALU) and memory?
';:{ _') <""")
14. %Exp lain Instruction Classification of8085 Based on Word Length
8085 instruct ion set
)b) 'Explain the various arithmetic operations that can be perform ed using the
Provide examples of ADD, ADC, SUB, and their impact on flagy

••••
Ap.,.ndhc D : Motlel Question Papers -•- - { 0.3 }

MODEL QUESTION PAPER - 2


' SECTION - .,q ;,
I. Answer any Ten queSt ions. Each question carries 2 Marks. (10 X 2: 20}
(a) Define the octal number system.
[b) ~~overt 110111,1 to Gray code.
(c) md the 2's compliment of 101101
(d) Define AND Gate. Give Logic Symbol of AND Gate and Truth Table.
(e) Wh~t is a Karna ugh Map (K-Map)?
(f) Define a combinational circuit Giv examples.
(g) Define Encoder and Decoder.
(h) Define operation code and operand in an instruction. Give an example.
(i) What is register indirect addressing mode? Give an example.
(j) Explain the function of the ADD instruction.
(k) What is a microprocessor? List the key components of a microprocessor.
(I) What is Manual Assembly Process?
~ .~
SECTION - '8 ...:
II. Answer any Five questions. Each question carries 6 marks. (5 x 6 = 30)
2. Write the General Steps to Perform Binary Addition Using 2's Complement.
3. List and describe the fundamental laws of Boolean algebra.
4. Given F(X, Y, Z) = l: (1, 3, 5, 7) then prove that F(X, Y, Z) = 1t (0, 2, 4, 6)
5. Define a Full Adder. Describe its truth table and block diagram. How a Full Adder Works?
6. Explain how a T flip-flop can be implemented using a J-K flip-flop.
,

/
J. Explain the concept of stored program organization and describe how data and instructions are stored in
memory
8. Explain the block diagram of a traditional CPU and the microprocessor used as a CPU.
9. Describe the rotate instructions (RAL, RAR, RLC, and RRC) in the 8085 microprocessor.
SECTION-C ~ .I,

Ill. Answer any Three questions. Each question carries 10 marks. (3 x 10 = 30)
1O. Explain the Classification of Binary Codes with examples.
11. What is NANO Gate Decoder? Discuss the working of a 2-to-4 line NANO gate decoder, with an example
illustrating the truth table.
12.)afExplain any five input-output instructions in a basic computer system.
)'Y Briefly explain Common Bus System of basic computer with a neat diagram.
»: Explain stack organization in detail including the register stack and memory stack.
14. ~Explain Instruction Classification of 8085 Based on Functions.
(b) Explain how the 8085 uses timing and control signals to coordinate data flow between the CPU,
memory, and 1/0 devices.

••••
[ D.4 ) ~ - - - • Computer Architedure

~ MODEL QUESTION PAPER - 3


•' SECTION - ~
I. Answer any Ten questions. Each question carries 2 Marks. ( 10 X 2: 20)

1. (a) Define the binary number system.


(b) Convert (642) 10 to Binary
(c) Define NOR Gate. Write the symbol, and truth table for NOR gate.
(d) Show that A+AB=A+B
(e) Define Minterm and Maxterm with an example.
(f) Define Clock Signal. What is the role of a clock signal in the operation of flip-flops.
(g) Define Binary Counter.. List the types of Binary Counter.
(h) What is Register? List different types of Computer Register.
(i) Define program control instructions.
U) What is the function of the MOV instruction?
(k) Define the purpose of the Program Counter (PC).
(l) How are the 8085 instruction • • •• • • •

j
~
SECTION - '8 ~

II. Answer any Five questions. Each question carries 6 marks. (5 X 6 = 30)
2. Explain Hexadecimal Arithmetic with examples.
3. State and prove De Morgan's theorems by the method of perfect induction.
4. Explain How NOR gate is used to create AND, OR and NOT Gates.
5. Explain the working of S-R flip flop with a neat diagram.
/Explain any five register-reference instructions in a basic computer system.
7. Explain the procedure for evaluating RPN Using stacks. Evaluate (8 * 2 + 1) * (5 + (2 * 3) + 9) using stack.
8. Explain the types of Instruction Formats based on number of addresses.
9. Explain the branching instructions available in the 8085 microprocessor. How do conditional and
unconditional branching differ?
.. "
-">
., SECTION - C i
'
Ill. Answer any Three questions. Each question carries 1 O marks. (3 X 10 = 30)
10. What is Gray Code? Describe the process of Binary to Gray Code and Gray Code to Binary Conversions
with an example.
11. Explain the working of a 4-to-1 line multiplexer.
12. Describe the working of an octal-to-binary encoder. Include its block diagram, truth table, and Boolean
_)unctions for generating outputs.
fl Explain the characteristic features of Complex Instruction Set Computer (CISC) architecture. Mention its
advantages and disadvantages.
14. Explain the architecture of the 8085 microprocessor in detail. Describe each component and its function .

••••
I
I

Ap,-ndlx D : Model Question Papers -•- - ( D.5 )

MODEL QUESTION PAPER - 4


- SECTION-11
I. Answer any Ten queS tions. Each question carries 2 Marks.
(10X2=20}
1. (a) Define Bit and Byte. \ . ;-
(b) Define XNOR W • h
. • rite t e symbol, and truth table for XNOR gate. & . \ <
(c) Give the BCD equivalent of the decimal number 69 27 f • 59
(d) • . • (1or
What is Duahty Principle? z. ~ :J-
(e) Prove algebraically that X+ (Y + Z) = (X + Y) + Z
(f) What is the difference between positive edge triggering and negative edge triggering? '?>' 1 1
(g) What is an integrated circuit (IC) ?y. ;j
(h) Mention the steps involved in instruction cycle. <:::. :1 2 c;- . 3 3
(i) L'1 ~ ":)
0
>
st the types of Instruction Formats based on number of addresses. •-j c l{ 0
(j) What is the function of the JUMP instruction? g ·½. 2
(k) What is the 8085 microprocessor? 1· 15
(1) What is the purpose of the instruct' on LXI R 16-b't data? S· b
. SECTION - '8
II. Answer any Five questions. Each question carries 6 marks. (5 X 6 = JQ}
2. Explain Octal Arithmetic with examples. 1 • '~'-1 ! ~' 1 - '.1 j_.
3. Explain universal property of NAND Gate. ) , \ r'"' ; , > 't , ? V
4. Given the Boolean function F(W, X, Y,Z) = 1:(0, 2, 3, 4, 7, 8, 11, 12), reduce it by using K-map.
5. Explain the working of a JK flip-flop with a neat diagram. 3 • I 2 / 3 • ) ?>
6. What is a flip-flop excitation table? Write an excitation table for SR and JK flip-flops. 3 ' 2 5 , 2 J· b
;r. Explain any five memory-reference instructions in a basic computer system. .S • Y2 ½ 5 . L{ 5
)k Compare and Contrast CISC and RISC Architectures. b•5 Lt/ b •Ej
9. Explain the role of the accumulator in the 8085 microprocessor. Discuss accumulator-based operations
like CMA, RAL, and RAR. 'l ' 1 \
.: SECTION - C .
Ill. Answer any Three questions. Each question carries 10 marks. (3X10=30)

10. Explain the different types of number systems with examples. 1• Lr -I e I· g


11. Explain the working of Bidirectional Shift Register with Parallel Load. ~, 2,.q +e Lr ,. 3 f
12. (a) What is Timing and Control? How Timing and Control Work together? 5 •2.5, 5- 1 i; J . '2 <{_8&.r
(b) Explain the interrupt cycle with a neat diagram. ? ,. 55 5 ·5 b
1
13. (a) Describe the key features of the 8085 microprocessor i ~ /O
(
1 . {/
(b) Explain the key components of 8085 Programming Model. 1 •3 3
I
14. Describe the pin configuration of the 8085 microprocessor. 1 · 2-~ ff) f •3 D
•••• /
7
[ 0 •6 }r----- Computer Architecture

MODEL QUESTION PAPER - 5


-'. SECTION - 41 f
I. Answer any Ten questions. Each question carries 2 Marks. ( 10 X 2 = 20)
1. (a) Define non-weighted codes and give an example.
(b) • Write a Gray code for decimal number 1 to 10.
(c) Convert the octal number 56 78 to a decimal number.
(d) What is ASCII?
(e) What are sum-of-products (SOP) and product-of-sums (POS) forms?
(f) What is State Table and State Diagram?
(g) Define a Shift Register.
(h) What is an Interrupt? Give an example
(i) What is the mode field in an instruction format?
(j) Describe the difference between rotate left and rotate right instruction.
(k) What is the fetch-decode-execute cycle?
(I) List any two features of the 8085 microprocessor.

SECTION-'8
II. Answer any Five questions. Each question carries 6 marks. (5 X 6 = 30)
2. What is BCD Code? Explain Addition and Subtraction of BCD with examples.
l 3. Given the Boolean Function F(A, B, C, D) = E(0,2,5,7,8,10,13,15). Reduce it by using K-map.

l
I
I
'
4.
5.
Explain the process of converting a non-standard Boolean Expression into Standard SOP or POS
Explain the working of a Dflip-flop with a neat diagram.
6. What is an Instruction Cycle? Explain the Phases of the Instruction Cycle.
7. Explain the different types of CPU organization
8. Explain Shift Instructions in computer architecture with examples.
9. Explain in detail the load and store accumulator instructions (LDA and STA) in the 8085 microprocessor.

~ECTION-C C
Ill. Answer any Three questions. Each question carries 10 marks. (3 X 10 = 30)
10. What is Unicode? Explain the features of of Unicode. Mention the Differences Between ASCII and Unicode.
11. Define a Register with Parallel Load. Describe its working principle and how it differs from serial data
loading
12. (a) Explain input and output configuration in computer systems with relevant examples.
(b) Explain the control unit of a basic computer system with a neat diagram. How the Control Unit Works?

" 13. Describe the characteristic features of Reduced Instruction Set Computer (RISC) architecture. Mention
its advantages and disadvantages.
14. Explain the Instruction Classification of 8085 Based on Functions. Discuss data transfer, arithmetic,
logical, branching, and machine control instructions

••••

Common questions

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A full adder adds three binary digits (two input binary numbers and a previous carry) to produce a sum and a carry output. It consists of two half adders and an OR gate, where the first half adder adds the two input bits, and the second half adder adds the sum from the first half adder to the carry input. Unlike a half adder, which only adds two binary digits input, the full adder handles the carry input, making it suitable for multi-bit binary addition.

The Program Counter (PC) in the 8085 microprocessor holds the address of the next instruction to be executed. During instruction execution, the PC ensures sequential access to program instructions by automatically incrementing after an instruction is fetched. It plays a crucial role in the execution cycle by pointing to where the CPU should fetch the next instruction from, thus controlling the flow of the program.

The 8085 microprocessor architecture is significant in computer systems due to its ability to handle data flow and control within the system efficiently. It coordinates data flow between the CPU, memory, and I/O devices using a set of timing and control signals. These signals are essential for synchronizing the operations of different components and ensuring proper data transfer. The control unit within the 8085 generates these control signals to manage internal and external operations, facilitating communication across the system's bus.

Binary subtraction using the two's complement method involves converting the subtrahend into its two's complement and adding it to the minuend. For example, to subtract binary 0101 from 1101, first convert 0101 to its two's complement by inverting the bits to get 1010 and adding 1 to get 1011. Then add this to the minuend: 1101 + 1011 = 11000, ignoring the overflow bit, the result is 1000, which is the answer in binary.

Shift instructions in computer architecture perform bit manipulation on data words by moving bits left or right. Left shifts (e.g., arithmetic and logical shifts) often multiply the data by powers of two, while right shifts can divide by powers of two. These operations are used in arithmetic calculations, logical operations, and in particular for bit masking and adjustments in cryptographic algorithms or digital signal processing.

Boolean functions are simplified using Karnaugh Maps (K-Maps) by organizing truth table values into a grid format, highlighting groups of adjacent ones (or zeros for POS forms). This method visually simplifies expressions by minimizing the number of terms and variables through groupings. K-Maps are preferred over algebraic simplification because they reduce human error and provide a systematic approach to achieve the simplest expression efficiently, beneficial for designing streamlined digital circuits.

Addressing modes in computer architecture determine how the operand of an instruction is accessed during execution. These modes impact execution by affecting the complexity and speed of data retrieval. Examples include Immediate addressing, where the operand is specified within the instruction itself; Direct addressing, where the address of the operand is given; and Indirect addressing, where the address of the operand is found at another specified location. Each mode offers trade-offs between instruction size, execution speed, and flexibility.

CISC (Complex Instruction Set Computer) architectures are characterized by complex instructions that can execute multiple tasks. They often have fewer registers and rely on memory. RISC (Reduced Instruction Set Computer) architectures have simpler instructions designed to execute in a single clock cycle, leading to faster execution speeds and more efficient pipeline designs. These differences affect system performance by trading off the complexity of individual instructions in CISC for increased speed and efficiency in RISC, which benefits applications requiring fast processing of simple operations.

The instruction cycle consists of several phases: fetch, decode, and execute. During the fetch phase, the CPU retrieves the instruction from memory. In the decode phase, the CPU interprets the instruction to determine the required operations. Finally, the execute phase involves carrying out the operations specified by the instruction. This cycle enables the step-by-step execution of a program as each instruction is processed in sequence, allowing the computer to perform complex tasks by breaking them down into simpler operations.

A 3-to-8 line decoder functions by taking 3 binary input lines and activating one of 8 output lines, corresponding to the binary value of the input. It works by using a combination of AND gates that combine the input signals with necessary bit inversions to produce a single active high output line per input combination. Applications include memory address decoding and data demultiplexing in digital systems.

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