Why study logic design?

Obvious reasons

this course is part of the CS/CompE requirements it is the implementation basis for all modern computing devices

building large things from small components provide a model of how a computer works

More important reasons

the inherent parallelism in hardware is often our first exposure to parallel computation it offers an interesting counterpoint to software design and is therefore useful in furthering our understanding of computation, in general

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

What will we learn in this class?

The language of logic design

Boolean algebra, logic minimization, state, timing, CAD tools

analogous to variables and program counters in software systems

The concept of state in digital systems

How to specify/simulate/compile/realize our designs

hardware description languages tools to simulate the workings of our designs logic compilers to synthesize the hardware blocks of our designs mapping onto programmable hardware
sequential and parallel implementations specify algorithm as well as computing/storage resources it will use
Copyright 2004, Gaetano Borriello and Randy H. Katz 2

Contrast with software design

I - Introduction

Applications of logic design

Conventional computer design

CPUs, busses, peripherals

phones, modems, routers

Networking and communications

Embedded products

in cars, toys, appliances, entertainment devices

testing, sensing, reporting

Scientific equipment

The world of computing is much much bigger than just PCs!

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

A quick history lesson

1850: George Boole invents Boolean algebra

maps logical propositions to symbols permits manipulation of logic statements using mathematics his Masters thesis its switching elements are vacuum tubes (a big advance from relays) 18,000 vacuum tubes several hundred multiplications per minute replaces vacuum tubes enable integration of multiple devices into one package gateway to modern electronics

1938: Claude Shannon links Boolean algebra to switches

1945: John von Neumann develops the first stored program computer

1946: ENIAC . . . The worlds first completely electronic computer

1947: Shockley, Brittain, and Bardeen invent the transistor

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

What is logic design?

What is design?

given a specification of a problem, come up with a way of solving it choosing appropriately from a collection of available components while meeting some criteria for size, cost, power, beauty, elegance, etc.

What is logic design?

determining the collection of digital logic components to perform a specified control and/or data manipulation and/or communication function and the interconnections between them which logic components to choose? there are many implementation technologies (e.g., off-the-shelf fixed-function components, programmable devices, transistors on a chip, etc.) the design may need to be optimized and/or transformed to meet design constraints
Copyright 2004, Gaetano Borriello and Randy H. Katz 5

I - Introduction

What is digital hardware?

Collection of devices that sense and/or control wires that carry a digital value (i.e., a physical quantity that can be interpreted as a 0 or 1)

example: digital logic where voltage < 0.8v is a 0 and > 2.0v is a 1 example: pair of transmission wires where a 0 or 1 is distinguished by which wire has a higher voltage (differential) example: orientation of magnetization signifies a 0 or a 1 logic computation devices (sense and drive)

Primitive digital hardware devices

are two wires both 1 - make another be 1 (AND) is at least one of two wires 1 - make another be 1 (OR) is a wire 1 - then make another be 0 (NOT)

memory devices (store)

sense

store a value recall a previously stored value

AND

drive
6

I - Introduction

sense Copyright 2004, Gaetano Borriello and Randy H. Katz

What is happening now in digital design?

Important trends in how industry does hardware design

larger and larger designs shorter and shorter time to market cheaper and cheaper products
pervasive use of computer-aided design tools over hand methods multiple levels of design representation emphasis on abstract design representations programmable rather than fixed function components automatic synthesis techniques importance of sound design methodologies higher levels of integration use of simulation to debug designs simulate and verify before you build
Copyright 2004, Gaetano Borriello and Randy H. Katz 7

Scale

Time

Cost

I - Introduction

CSE 370: concepts/skills/abilities

Understanding the basics of logic design (concepts) Understanding sound design methodologies (concepts) Modern specification methods (concepts) Familiarity with a full set of CAD tools (skills) Realize digital designs in an implementation technology (skills) Appreciation for the differences and similarities (abilities) in hardware and software design

New ability: to accomplish the logic design task with the aid of computer-aided design tools and map a problem description into an implementation with programmable logic devices after validation via simulation and understanding of the advantages/disadvantages as compared to a software implementation
I - Introduction Copyright 2004, Gaetano Borriello and Randy H. Katz 8

Computation: abstract vs. implementation

Up to now, computation has been a mental exercise (paper, programs) This class is about physically implementing computation using physical devices that use voltages to represent logical values Basic units of computation are:

representation: assignment: data operations: control: sequential statements: conditionals: loops: procedures:

"0", "1" on a wire set of wires (e.g., for binary ints) x = y x+y5 A; B; C if x == 1 then y for ( i = 1 ; i == 10, i++) A; proc(...); B;

We will study how each of these are implemented in hardware and composed into computational structures
Copyright 2004, Gaetano Borriello and Randy H. Katz 9

I - Introduction

Switches: basic element of physical implementations

Implementing a simple circuit (arrow shows action if wire changes to 1):

A Z close switch (if A is 1 or asserted) and turn on light bulb (Z)

open switch (if A is 0 or unasserted) and turn off light bulb (Z)

Z A
I - Introduction Copyright 2004, Gaetano Borriello and Randy H. Katz 10

Switches (contd)

Compose switches into more complex ones (Boolean functions):

AND A

B
Z A and B

A OR Z A or B

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

11

Switching networks

Switch settings

determine whether or not a conducting path exists to light the light bulb
use a light bulb (output of the network) to set other switches (inputs to another network). to construct larger switching networks, i.e., there is a way to connect outputs of one network to the inputs of the next.

To build larger computations

Connect together switching networks

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

12

Relay networks

A simple way to convert between conducting paths and switch settings is to use (electro-mechanical) relays. What is a relay?
conducting path composed of switches closes circuit current flowing through coil magnetizes core and causes normally closed (nc) contact to be pulled open

when no current flows, the spring of the contact returns it to its normal position

What determines the switching speed of a relay network?

I - Introduction Copyright 2004, Gaetano Borriello and Randy H. Katz 13

Transistor networks

Relays aren't used much anymore

some traffic light controllers are still electro-mechanical

MOS stands for Metal-Oxide on Semiconductor C is for complementary because there are both normally-open and normally-closed switches similar, though easier to work with than relays.

Modern digital systems are designed in CMOS technology

MOS transistors act as voltage-controlled switches

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

14

MOS transistors

MOS transistors have three terminals: drain, gate, and source

they act as switches in the following way: if the voltage on the gate terminal is (some amount) higher/lower than the source terminal then a conducting path will be established between the drain and source terminals
G G

n-channel open when voltage at G is low closes when: voltage(G) > voltage (S) +

p-channel closed when voltage at G is low opens when: voltage(G) < voltage (S)

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

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MOS networks

X 3v Y 0v

what is the relationship between x and y? x 0 volts y 3 volts 0 volts

3 volts

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

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Two input networks

X 3v Z1 0v X Y Y
what is the relationship between x, y and z? x y z1 3 volts 3 volts 3 volts z2 3 volts

0 volts 0 volts 0 volts 3 volts 3 volts 0 volts

3v
Z2 0v
I - Introduction

0 volts
0 volts 0 volts NOR

3 volts 3 volts

0 volts
NAND

Copyright 2004, Gaetano Borriello and Randy H. Katz

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Speed of MOS networks

What influences the speed of CMOS networks?

charging and discharging of voltages on wires and gates of transistors

capacitance is at gates of transistors and wire material resistance mostly due to transistors

Capacitors hold charge

Resistors slow movement of electrons

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

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Representation of digital designs

Physical devices (transistors, relays) Switches Truth tables Boolean algebra Gates Waveforms Finite state behavior Register-transfer behavior Concurrent abstract specifications

scope of CSE 370

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

19

Digital vs. analog

Convenient to think of digital systems as having only discrete, digital, input/output values In reality, real electronic components exhibit continuous, analog, behavior

Why do we make the digital abstraction anyway?

switches operate this way easier to think about a small number of discrete values

Why does it work?

does not propagate small errors in values always resets to 0 or 1

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

20

Mapping from physical world to binary world

Technology Relay logic CMOS logic Transistor transistor logic (TTL) Fiber Optics Dynamic RAM Nonvolatile memory (erasable) Programmable ROM Bubble memory Magnetic disk Compact disc State 0 Circuit Open 0.0-1.0 volts 0.0-0.8 volts Light off Discharged capacitor Trapped electrons Fuse blown No magnetic bubble No flux reversal No pit State 1 Circuit Closed 2.0-3.0 volts 2.0-5.0 volts Light on Charged capacitor No trapped electrons Fuse intact Bubble present Flux reversal Pit

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

21

Combinational vs. sequential digital circuits

A simple model of a digital system is a unit with inputs and outputs:

inputs system outputs

Combinational means "memory-less"

a digital circuit is combinational if its output values only depend on its input values

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

22

Combinational logic symbols

Common combinational logic systems have standard symbols called logic gates

Buffer, NOT
A Z

AND, NAND
A B Z

OR, NOR
A B Z

easy to implement with CMOS transistors (the switches we have available and use most)

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

23

Sequential logic

Sequential systems

exhibit behaviors (output values) that depend not only on the current input values, but also on previous input values
because the outputs do not change instantaneously after an input change why not, and why is it then sequential?

In reality, all real circuits are sequential

A fundamental abstraction of digital design is to reason (mostly) about steady-state behaviors

look at the outputs only after sufficient time has elapsed for the system to make its required changes and settle down

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

24

Synchronous sequential digital systems

Outputs of a combinational circuit depend only on current inputs

after sufficient time has elapsed

even after waiting for the transient activity to finish

Sequential circuits have memory

The steady-state abstraction is so useful that most designers use a form of it when constructing sequential circuits:

the memory of a system is represented as its state changes in system state are only allowed to occur at specific times controlled by an external periodic clock the clock period is the time that elapses between state changes it must be sufficiently long so that the system reaches a steady-state before the next state change at the end of the period

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

25

Example of combinational and sequential logic

Combinational:

input A, B wait for clock edge observe C wait for another clock edge observe C again: will stay the same
input A, B wait for clock edge observe C wait for another clock edge observe C again: may be different

A C B Clock

Sequential:

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

26

Abstractions

Some we've seen already

digital interpretation of analog values transistors as switches switches as logic gates use of a clock to realize a synchronous sequential circuit
truth tables and Boolean algebra to represent combinational logic encoding of signals with more than two logical values into binary form state diagrams to represent sequential logic hardware description languages to represent digital logic waveforms to represent temporal behavior

Some others we will see

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

27

An example

Calendar subsystem: number of days in a month (to control watch display)

used in controlling the display of a wrist-watch LCD screen inputs: month, leap year flag outputs: number of days

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

28

Implementation in software
integer number_of_days ( month, leap_year_flag) {
switch (month) {
case 1: return (31); case 2: if (leap_year_flag == 1) then return (29) else return (28); case 3: return (31); ... case 12: return (31); default: return (0);

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

29

Implementation as a combinational digital system

Encoding:

how many bits for each input/output? month binary number for month 0000 0001 four wires for 28, 29, 30, and 31 combinational truth table specification
0010 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 111

Behavior:

month

leap

d28 d29 d30 d31

I - Introduction

leap 0 1

d28 0 1 0 0 0 0 0 0 0 0 0 0 0

d29 0 0 1 0 0 0 0 0 0 0 0 0 0

d30 0 0 0 0 1 0 1 0 0 1 0 1 0

d31 1 0 0 1 0 1 0 1 1 0 1 0 1

Copyright 2004, Gaetano Borriello and Randy H. Katz

30

Combinational example (contd)

Truth-table to logic to switches to gates

d28 = 1 when month=0010 and leap=0 d28 = m8'm4'm2m1'leap'

symbol for not

d31 = 1 when month=0001 or month=0011 or ... month=1100 d31 = (m8'm4'm2'm1) + (m8'm4'm2m1) + ... (m8m4m2'm1') month leap d28 d29 d30 d31 d31 = can we simplify more? 0001 0 0 0 1
symbol for and symbol for or
0010 0010 0011 0100 ... 1100 1101 111 0000 0 1 1 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0

1
31

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

Combinational example (contd)

d28 = m8'm4'm2m1'leap d29 = m8'm4'm2m1'leap d30 = (m8'm4m2'm1') + (m8'm4m2m1') + (m8m4'm2'm1) + (m8m4'm2m1) = (m8'm4m1') + (m8m4'm1) d31 = (m8'm4'm2'm1) + (m8'm4'm2m1) + (m8'm4m2'm1) + (m8'm4m2m1) + (m8m4'm2'm1') + (m8m4'm2m1') + (m8m4m2'm1')

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

32

Activity

How much can we simplify d31?

d31 is true if: month is 7 or less and odd (1, 3, 5, 7), or month is 8 or more and even (8, 10, 12, and includes 14) d31 is true if: m8 is 0 and m1 is 1, or m8 is 1 and m1 is 0 d31 = m8m1 + m8m1

What if we started the months with 0 instead of 1? (i.e., January is 0000 and December is 1011)
More complex expression (0, 2, 4, 6, 7, 9, 11): d31 = m8m4m2m1 + m8m4m2m1 + m8m4m2m1 + m8m4m2m1 + m8m4m2m1 + m8m4m2m1 + m8m4m2m1 d31 = m8m1 + m8m4m2 + m8m1 (includes 13 and 15) d31 = (d28 + d29 + d30)

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

33

Combinational example (contd)

d28 = m8'm4'm2m1'leap d29 = m8'm4'm2m1'leap d30 = (m8'm4m2'm1') + (m8'm4m2m1') + (m8m4'm2'm1) + (m8m4'm2m1) d31 = (m8'm4'm2'm1) + (m8'm4'm2m1) + (m8'm4m2'm1) + (m8'm4m2m1) + (m8m4'm2'm4') + (m8m4'm2m1') + (m8m4m2'm1')

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

34

Another example

Door combination lock:

punch in 3 values in sequence and the door opens; if there is an error the lock must be reset; once the door opens the lock must be reset
inputs: sequence of input values, reset outputs: door open/close memory: must remember combination or always have it available as an input

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

35

Implementation in software
integer combination_lock ( ) {
integer v1, v2, v3; integer error = 0; static integer c[3] = 3, 4, 2; while (!new_value( )); v1 = read_value( ); if (v1 != c[1]) then error = 1; while (!new_value( )); v2 = read_value( ); if (v2 != c[2]) then error = 1; while (!new_value( )); v3 = read_value( ); if (v2 != c[3]) then error = 1; if (error == 1) then return(0); else return (1);

}
I - Introduction Copyright 2004, Gaetano Borriello and Randy H. Katz 36

Implementation as a sequential digital system

Encoding:

how many bits per input value? how many values in sequence? how do we know a new input value is entered? how do we represent the states of the system?
new
value

Behavior:

reset

clock wire tells us when its ok to look at inputs (i.e., they have settled after change) clock sequential: sequence of values must be entered sequential: remember if an error occurred finite-state specification
Copyright 2004, Gaetano Borriello and Randy H. Katz

state

open/closed

I - Introduction

37

Sequential example (contd): abstract control

Finite-state diagram

states: 5 states

represent point in execution of machine each state has outputs changes of state occur when clock says its ok based on value of inputs
closed C2!=value & new S3 closed C3!=value & new

transitions: 6 from state to state, 5 self transitions, 1 global

ERR

inputs: reset, new, results of comparisons output: open/closed C1!=value

& new
S1 reset closed C1=value & new S2 closed C2=value & new

OPEN

C3=value & new

open

not new
I - Introduction

not new

not new
38

Copyright 2004, Gaetano Borriello and Randy H. Katz

Sequential example (contd): data-path vs. control

Internal structure

data-path

control

storage for combination comparators

finite-state machine controller control for data-path state changes controlled by clock

new value C1 C2
multiplexer comparator

equal

reset

C3 mux control
controller

clock

equal
I - Introduction

open/closed
Copyright 2004, Gaetano Borriello and Randy H. Katz 39

Sequential example (contd): finite-state machine

Finite-state machine

refine state diagram to include internal structure

ERR closed not equal & new reset S1 closed mux=C1 equal & new not new S2 closed mux=C2 equal & new not new not equal not equal & new & new S3 OPEN closed open mux=C3 equal & new not new

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

40

Sequential example (contd): finite-state machine

Finite-state machine

ERR closed

generate state table (much like a truth-table)

reset

not equal not equal not equal & new & new & new S1 S2 S3 OPEN closed closed closed open mux=C1 equal mux=C2 equal mux=C3 equal & new & new & new not new not new not new

reset 1 0 0 0 0 0 0 0 0 0 0 0

new 0 1 1 0 1 1 0 1 1

equal 0 1 0 1 0 1

state S1 S1 S1 S2 S2 S2 S3 S3 S3 OPEN ERR

next state S1 S1 ERR S2 S2 ERR S3 S3 ERR OPEN OPEN ERR

mux C1 C1 C2 C2 C3 C3

open/closed closed closed closed closed closed closed closed closed closed open open closed
41

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

Sequential example (contd): encoding

Encode state table

state can be: S1, S2, S3, OPEN, or ERR

needs at least 3 bits to encode: 000, 001, 010, 011, 100 and as many as 5: 00001, 00010, 00100, 01000, 10000 choose 4 bits: 0001, 0010, 0100, 1000, 0000 needs 2 to 3 bits to encode choose 3 bits: 001, 010, 100 needs 1 or 2 bits to encode choose 1 bits: 1, 0

output mux can be: C1, C2, or C3

output open/closed can be: open or closed

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

42

Sequential example (contd): encoding

Encode state table

state can be: S1, S2, S3, OPEN, or ERR

choose 4 bits: 0001, 0010, 0100, 1000, 0000

choose 3 bits: 001, 010, 100 choose 1 bits: 1, 0 reset 1 0 0 0 0 0 0 0 0 0 0 0 new 0 1 1 0 1 1 0 1 1 equal 0 1 0 1 0 1 state 0001 0001 0001 0010 0010 0010 0100 0100 0100 1000 0000 next state 0001 0001 0000 0010 0010 0000 0100 0100 0000 1000 1000 0000 mux 001 001 010 010 100 100 open/closed 0 0 0 good choice of encoding! 0 0 mux is identical to 0 last 3 bits of state 0 0 open/closed is 0 identical to first bit 1 of state 1 0
43

output mux can be: C1, C2, or C3

output open/closed can be: open or closed

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

Activity

Have lock always wait for 3 key presses exactly before making a decision

remove reset

not new E2 closed new

not new E3 closed ERR closed

new

not equal & new

not equal & new

not equal & new

S1 closed mux=C1 equal & new

not new

S2 closed mux=C2 equal & new

not new

S3 closed mux=C3 equal & new

not new

OPEN
open

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

44

Sequential example (contd): controller implementation

Implementation of the controller

new equal reset special circuit element, called a register, for remembering inputs when told to by clock clock new equal reset open/closed mux control comb. logic state open/closed clock

mux control

controller

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

45

Design hierarchy
system

data-path

control

code registers multiplexer

comparator

state registers

combinational logic

register switching networks

I - Introduction

logic

Copyright 2004, Gaetano Borriello and Randy H. Katz

46

Summary

That was what the entire course is about

converting solutions to problems into combinational and sequential networks effectively organizing the design hierarchically doing so with a modern set of design tools that lets us handle large designs effectively taking advantage of optimization opportunities

Now lets do it again

this time we'll take nine weeks instead of one

I - Introduction

Copyright 2004, Gaetano Borriello and Randy H. Katz

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