Bipolar Junction Transistors (BJT)
Prepared by
Partha Protim Mondal
Lecturer, Dept. of EEE
North Western University
References
Electronic Devices and Circuit Theory by Robert L. Boylestad
Principles of Electronics by V. K. Mehta
Transistors
A transistor consists of two pn junctions formed by sandwiching either p-type or n-type semiconductor
between a pair of opposite types.
Accordingly, There are two types of transistors:
• pnp
• npn
In each type of transistor, the following points may be noted :
These are two pn junctions. Therefore, a transistor may be regarded as a combination of two diodes
connected back to back.
There are three terminals, one taken from each type of semiconductor.
Transistor Construction
The terminals are labeled:
• E - Emitter
• B - Base
• C – Collector
The section on one side is the emitter and the section on
the opposite side is the collector.
The middle section is called the base and forms two
junctions between the emitter and collector.
Transistor Construction
•dc biasing is necessary to establish the proper region of operation for ac amplification.
•The emitter layer is heavily doped, the base lightly doped, and the collector only lightly
doped.
•The outer layers have widths much greater than the sandwitched p- or n-type material.
•For the transistors shown in Fig. the ratio of the total width to that of the center layer is
0.150/0.001 1501.
•The doping of the sandwiched layer is also considerably less than that of the outer layers
(typically, 101 or less).
•This lower doping level decreases the conductivity of this material by limiting the number
of “free” carriers.
Transistor Operation
Forward-biased junction of a pnp transistor Reverse-biased junction of a pnp transistor.
• forward-biased diode • reverse-biased diode
• heavy flow of majority carriers from • heavy flow of minority carriers from
the p- to the n-type material the n- to the p-type material
Transistor Operation
With the external sources, VEE and VCC connected as shown:
• The emitter-base junction is forward biased
• The base-collector junction is reverse biased
Transistor Operation
Emitter current is the sum of the collector and base
currents:
The collector current is comprised of two currents:
Common-Base Configuration
The base is common to both input (emitter–base) and output (collector–base) of the transistor.
Common-Base Amplifier
Input Characteristics
This curve shows the relationship between of
input current (IE) to input voltage (VBE) for
three output voltage (VCB) levels.
Input or driving point characteristics for a common-base
transistor amplifier.
Common-Base Amplifier
Output Characteristics
This graph demonstrates the output current (IC) to
an output voltage (VCB) for various levels of input
Current (IE).
Output or collector characteristics for a common-base
transistor amplifier.
Operating Regions
Active region
Operating range of the amplifier. In the active region the collector-base junction is
reverse-biased, while the base-emitter junction is forward-biased.
Cutoff region
The amplifier is basically off. There is voltage, but little current. In the cutoff region
the collector-base and base- emitter junctions of a transistor are both reverse-biased.
Saturation region
The amplifier is full on. There is current, but little voltage. In the saturation region
the collector-base and base-emitter junctions are forward-biased.
Alpha(α)
Alpha () is the ratio of to
Ideally: = 1
In reality: is between 0.9 and 0.998
Collector Current
Since alpha is defined solely for the majority carriers, it becomes
Common–Emitter Configuration
The emitter is common to both
input (base-emitter) and output
(collector-emitter).
The input is on the base and the
output is on the collector.
(a) npn transistor (b) pnp transistor.
Common-Emitter Characteristics
Base Characteristics Collector Characteristics
Beta (β)
β represents the amplification factor of a transistor.
Relationship between amplification factors and :
Common–Collector Configuration
The input is on the base and
the output is on the emitter.
Load-Line Analysis
The network of Fig. 4.11a establishes an
output equation that relates the variables
and in the following manner:
The output characteristics of the transistor
also relate the same two variables and as
shown in Fig. 4.11b .
Load-Line Analysis
A d.c. load line can be drawn by locating two end points (i.e. Max. point and Max. point) on
the output characteristics.
If we choose to be 0 mA, we find that
If we now choose to be 0 V, we find that is determined by the following equation:
Problem
Problem
Transistor as a Switch
Cut-off Region
Saturation Region
Comparison of Transistor Connections
Commonly used Transistor Connection
Thermal Runway
Phase Reversal of CE Transistor
Phase Reversal of CE Transistor
