TASK
Himani Vandara
Guided by Payal suthar
Q.1) Write a code for Single bit
subtractor
Continue:
Q.2) Write a code for 8to3 encoder
Continue:
Continue:
Q.3) Write a code for 1to4 demux
Continue:
Continue:
Q.4) Write a code for 4to1 mux
Continue:
Continue:
Continue:
Q.5) Write a code for Xs3 to BCD
Continue:
Continue:
Q.6) Write a code for 4to2 priority
encoder
Continue:
Continue:
Continue:
Q.7) Write a code for 2 bit adder
Continue:
Q.8) Write a code for FA using HA
Continue:
Q.9) Write a code for D flipflop
Continue:
Continue:
Q.10) Write a code for SR Flipflop
Continue:
Continue:
Q.11) Write a code for JK Flipflop
Continue:
Continue:
Q.12) Write a code for T Flipflop
Continue:
Continue:
Q.13) How to implement duty cycle
in clock generation
Q.14) Try different timescale and try
to generate same frequency
Q.15) Read about procedural blocks and their
functionality. Write a short note with pseudocode
examples.
• A procedural block in Verilog is a section of code that is
executed sequentially, line by line in a simulation.
• main types:
• initial block: Executes only once at the start of the
simulation.
• always block: Executes continuously when its
sensitivity list changes.
Continue:
• Ex;
• Module mux;
• Reg A, B, S;
• Wire Y;
• initial begin
• A = 0;
• B = 1;
• S = 0; #10 S = 1;
• End
• always @(S or A or B) begin
• if (S)
• Y = B;
• else Y = A;
• End
• endmodule
Q.16) Read about assign statement.
Write a short note with pseudocode
examples.
• Works with wire data types only.
• Executes continuously.
• Commonly used for logic gates, multiplexers, and
arithmetic operations.etc...
•
• Ex; module ANDgate;
• wire A, B, Y;
• assign Y = A & B;
• endmodule
Q.17) Write working example codes
for each type of operator (logical,
arithmetic, etc.).
Verilog supports several types of operators:
Arithmetic Operators: +, -, *, /, %
reg [7:0] a = 10, b = 3;
wire [7:0] sum, diff, mult, rem;
assign sum = a + b;
assign diff = a - b;
assign mult = a * b;
assign rem = a % b;
Continue:
• Logical Operators: &&, ||, !
• wire and_op, or_op, not_op;
• assign and_op = a && b;
• assign or_op = a || b;
• assign not_op = !a;
Continue:
• Bitwise Operators: &, |, ^, ~
•
• wire [7:0] bit_and, bit_or, bit_xor, bit_not;
• assign bit_and = a & b;
• assign bit_or = a | b;
• assign bit_xor = a ^ b;
• assign bit_not = ~a;
Continue:
• Comparison Operators: ==, !=, <, >, <=, >=
• wire is_equal, is_greater;
• assign is_equal = (a == b);
• assign is_greater = (a > b);
Continue:
• Shift Operators: <<, >>
• wire [7:0] shift_left, shift_right;
• assign shift_left = a << 1;
• assign shift_right = a >> 1;
Q.18) Read about all the data types. Write example
codes for showing use and format specifiers for
displaying each data types.
• Verilog supports several data types, such as reg, wire,
integer, real, etc.
Q.19) Read about arrays and vectors in verilog.
Write short note woth examples of how to
instantiate them.
• Arrays: A collection of elements of the same type.
• Vectors: Multi-bit signals.
Q.20) Create a 10 element array of vector of sizr of
8 bits. Initialize each vector value to 8'hac.
Displaying entire array
