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Memory Management in Operating Systems

NIET UNIT 4 OS SECOND YEAR...............................................................MMMMMMMMMMM

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0% found this document useful (0 votes)
81 views116 pages

Memory Management in Operating Systems

NIET UNIT 4 OS SECOND YEAR...............................................................MMMMMMMMMMM

Uploaded by

wisexsir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

Noida Institute of Engineering and Technology, Greater Noida

Memory Management

Unit: 4

Operating Systems

Madhu Tanwar
Assistant Professor
Course Details
(B Tech 3rd Sem) Department of CS

Madhu Tanwar Unit-4


1
Friday, November 21, 2025
Noida Institute of Engineering and Technology, Greater
Syllabus Of Course
Noida

Friday, November 21, 2025 Madhu Tanwar BCSE0403 OS Unit-4 2


Noida Institute of Engineering and Technology, Greater
Syllabus Of Course
Noida

Friday, November 21, 2025 Madhu Tanwar Unit-4 3


Noida Institute of Engineering and Technology, Greater
Syllabus Of Course
Noida

Friday, November 21, 2025 Madhu Tanwar Unit-4 4


Syllabus Of Course

Friday, November 21, 2025 Madhu Tanwar Unit-4 5


Friday, November 21, 2025 Madhu Tanwar Unit-4 6
Noida Institute of Engineering and Technology, Greater
Branch wise Application
Noida

• Airlines reservation system.


• Air traffic control system.
• Systems that provide immediate updating.
• Used in any system that provides up to date and minute
• information on stock prices.
• Defense application systems like RADAR.
• Networked Multimedia Systems.
• Command Control Systems.

Friday, November 21, 2025 Madhu Tanwar Unit-4 7


Content
• Memory Allocation
• Contiguous
• Fixed Partition
• Variable partition
• Non Contiguous
• Paging
• Segmentation
• Segmentation with paging
• Virtual Memory
• Demand Paging
• Global and local page replacement
• Page replacement algorithms
• FIFO
• LRU
• OPTIMAL
• Thrashing
Friday, November 21, 2025 Madhu Tanwar Unit-4 8
Memory Allocation

Definition: Memory management is a function of the OS that manages


primary memory (RAM).

•Objectives: Allocate memory to processes.


•Deallocate memory when processes terminate.
•Optimize memory usage and prevent fragmentation.

•Functions: Track memory allocation.


•Manage free and used memory blocks.
•Handle swapping and paging.

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Address Binding

Address Binding: Mapping logical addresses (generated by the CPU) to physical


addresses (in memory).

Types of Address Binding:


[Link] Time: Physical address decided at compile-time.
[Link] Time: Address is determined when the program is loaded into memory.
[Link] Time: Address is resolved dynamically during execution.

Loading: Placing programs into memory.


Linking: Combining program modules into a single executable file.

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Memory Management Techniques

Divided into two categories:

[Link] Memory Allocation

1. Memory is allocated in a single continuous block.

[Link]-Contiguous Memory Allocation

1. Uses paging or segmentation for efficient allocation.

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Memory Allocation

Topic Objective: To understand memory allocation schemes


• One of the major functions of OS is memory management.
• The OS controls the allocation/de-allocation of physical memory.
• It keeps track of memory occupancy, loading of programs into free memory
space, getting the memory occupied by a process when the process terminates,
dynamic allocation/de-allocation of memory to executing process.

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Memory Allocation

Topic Objective: To understand memory allocation schemes


• One of the major functions of OS is memory management.
• The OS controls the allocation/de-allocation of physical memory.
• It keeps track of memory occupancy, loading of programs into free memory
space, getting the memory occupied by a process when the process terminates,
dynamic allocation/de-allocation of memory to executing process.

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Memory Allocation

Fixed Partition
Contiguous
Dynamic Partition
Memory
Allocation Paging

Non-
Segmentation
Contiguous

Segmentation
with paging
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Friday, November 21, 2025 14
Memory Allocation

Topic objective: To understand the contiguous memory allocation and its type.
In this allocation, a memory resident program occupies a single continuous block of physical
memory.
The physical memory is partitioned into block of different sizes for accommodating the
programs. This partitioning is of two types:
1. Fixed partitioning
2. Variable partitioning

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Fixed Partitioning

Topic Objective: To understand the mechanism of fixed partitioning.


The memory is divided into a fixed number of partitions of different sizes, which may suit the
range of usually occurring program sizes. Each partition can accommodate exactly one process.
Thus, the degree of multi-programming is fixed.

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Implementation of Fixed Partitioning

Topic objective: To understand the various steps in implementing the fixed partitioning scheme.
Whenever, a program needs to be loaded, a partition, big enough to accommodate the
program, is allocated. Since a program may not exactly fit the allocated partition, some space
may be left unoccupied, after loading the program. This space is wasted and it termed as
internal fragmentation.
Memory management is implemented using a table called partition description table(PDT).

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Advantages of Fixed Partition

Topic objective: Analyze the fixed partition scheme from implementation point of view.
• The implementation is very easy.
• The processing overheads are low

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Disadvantages of Fixed Partition

Topic objective: Analyze the fixed partition from the point of memory utilization
• The degree of multiprogramming is fixed, since the number of partition is fixed.
• Suffers from internal fragmentation

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Dynamic Partitioning

Topic objective: To understand the dynamic partitioning and how we remove the limitation of
fixed partition by implementing it.
This scheme is free of the limitations encountered in the case of fixed partitioning.
Its functions are as follows:
Initially, the entire available memory is treated as a single partition.
The incoming programs, requesting memory allocation, are queued up.

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Dynamic Partitioning

Topic objective: To understand and implement dynamic partitioning.


A waiting program is loaded, only when a free partition, big enough to fit the program, is
available. When a program is loaded, it is allocated a space , exactly equal to its size. The
balance unoccupied space, in the allocated partitioned is treated as another free space.

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Dynamic Partitioning

When a process terminates, it releases the partition occupied. If the released partition
is continuous to another free partition, then both the free partitions are clubbed
together into a single free partition.

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External fragmentation

Topic Objective: To elucidate the concept of external fragmentation and removal of it


through compaction technique.
When a free partition is too small to accommodate any program, it is called External
fragmentation.
External fragmentation refers to the large number of small chunks of free memory that
may be scattered all over the physical memory and individually each of the chunks may
not be big enough to accommodate even the small program.

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External fragmentation

However, if joined together, the total free space, thus resulted, may be big enough to
accommodate some more programs that may be waiting for loading.
Compaction is a technique, by which the resident programs are re-located in such a
way that the small chunks of free are made contiguous to each other and clubbed
together into a single free partition, that may be big enough to accommodate Some
more programs. But the compaction has very high processing overheads.

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Daily Quiz

Which of the following is NOT a function of memory management?


a) Allocation of memory to processes
b) Deallocation of memory
c) Preventing CPU overheating
d) Handling fragmentation

Address binding done during program execution is known as:


a) Compile-time binding
b) Load-time binding
c) Execution-time binding
d) Dynamic binding

In fixed partitioning, unused memory within allocated partitions is referred to as:


a) External fragmentation
b) Internal fragmentation
c) Swapping
d) Segmentation

What is the main issue with variable partitions?


a) Internal fragmentation
b) External fragmentation
c) High implementation complexity
d) Low memory utilization

• Fill in the Blanks


1. In __________ memory allocation, a single contiguous block is allocated to each process.
2. __________ is the process of mapping logical addresses to physical addresses.
3. External fragmentation occurs in __________ memory allocation technique.

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Different Strategy for Partition Allocation

Topic objective: To explore the following allocation strategies and its implementation.
There are three strategies:
• First Fit
• Best Fit
• Worst Fit

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First Fit

Topic Objective: To analyze its merit and demerit.


This refers to the allocation of the first encountered partition that may be big enough
to accommodate the program being loaded. This algorithm works both for fixed as well
as variable partition allocation.
Advantage: search time is small
Disadvantage: The memory loss, on account of fragmentation, is likely to be high.

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Best Fit

Topic objective: To analyze the merits and demerits of Best fit allocation strategy.
It refers to the allocation of the smallest available free partition that may be big
enough to accommodate the program being loaded. This algorithms also works for
both fixed partition and variable partition.
Advantage: The memory loss, on account of fragmentation will be lesser than in the
case of first fit.
Disadvantage: Search time will be larger, as compared to first fit.

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Worst Fit

Topic objective: To analyze the merits and demerits of worst fit allocation strategy.

It refers to the allocation of the largest partition out of the ones which are available,
which may be bigger enough to accommodate the program.

The sprit behind this scheme is that the balance space, left in the allocated partition,
after loading program, may be big enough to load another small program; and in that
eventually, memory loss due to fragmentation may be lower than first fit. Search time
in this scheme would be of the same order as in the case of Best Fit.

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Worst Fit

Advantage: It is expected to provide a smaller memory loss on account of

fragmentation.

Disadvantage: Search time is larger than first fit. It is same as in the case of Best Fit.

This algorithm is designed only for variable-partition allocation.

By mistake if used along with fixed partition, the results will be suicidal.

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Memory protection in contiguous memory allocation

Topic objective: To implement security for protecting the data from


address space.

If (Logical address L < limit register Value M)


Physical address P=Logical address L + Relocation value R;
else
Raise Exception: Invalid Address

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Non-Contiguous Memory Allocation

Topic Objective: To understand and implement the non-contiguous memory allocation


scheme.
It offers the following advantages over contiguous memory allocation:
• Permits sharing of code and data amongst processes.
• There is no external fragmentation of physical memory.
• Supports virtual memory concepts.

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Non-Contiguous Memory Allocation

Topic objective: To understand the implementation of non contiguous memory


allocation.
It involves a complex implementation and involves additional costs in terms of memory
and processing.
It can be implemented by the concept of:
• Paging
• Segmentation
• Segmentation with paging

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Paging

• Topic Objective: To explain the paging hardware with the help of following diagram

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Paging

Topic Objective: To understand the paging mechanism and how logical address is
translated into physical address in this mechanism
It permits physical address space of a process to be non-contiguous.
The logical address space of a process is divided into blocks of fixed size called Pages.
Also, the physical memory is divided into blocks of fixed sizes called Frames.
In the system, the page and frame will be of same size.

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Paging

The size is of the order of 512 bytes to a few MB.


Whenever, a process is to be executed, its page are moved from secondary
storage(Hard disk) to the available frames in physical memory(RAM).
The information about frame number, in which a page is resident, is entered in page
table. The page table is indexed by page number.

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Translation of Logical address into physical address

For a ‘m’ bit processor, the logical address will be m bits long.
Let the page size be 2n bytes.
Then lower order n bits of a logical address (L) will represent page offset(d) and the
higher order m-n bits will represent the page number (p).
Then page number p=L/2n
And page offset d=L%2n

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Translation of Logical address into physical address

Let f be the frame number that holds the page referenced by logical address (L).
Then f can be obtained by indexing into page table, by using page number p as index
f=page-table[p].
Corresponding physical address (P)=f*2n + d
This physical address is fed to MMU to access the memory location, referenced by
logical address L.

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Internal Fragmentation in Paging

Topic Objective: To compute internal fragmentation in paging mechanism.


Since, a program size may not be an exact multiple of the page-size, some space would
remain unoccupied in the last page of the process.
The average memory loss, due to internal fragmentation, would be of the order of half
page per process. So, larger the page size, larger would be the loss of memory, by
internal fragmentation.
Suppose, a system supports a page-size of P bytes.
Then a program of size M bytes, will have an internal fragmentation= P-(M%P) bytes

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Limitation of Basic Paging Scheme

Topic objective: to compare paging with fixed partitioning scheme.


• The effective memory access time increases, since for accessing of an operand, first
its frame number has to be accessed. Since, the page table resides in the RAM itself,
the effective access time to get an operand will be twice the RAM access time. So, if
RAM access time is 100 ns, the effective access time would be 200 ns.
• The page table occupies a significant amount of memory

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How to Reduce the Effective Access Time in Paging?

Topic Objective: To increase the performance of paging mechanism by introducing the


concept of TLB.
TLB (Translation Look-aside Buffer) is page-table cache, which is implemented as a fast
associative memory. The associative memory is distinguished by its ability to search for
a key, concurrently in all entries in a table.
This property makes the associative memory much faster than conventional RAM. But
it is much costlier also.

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How to Reduce the Effective Access Time in Paging?

Topic Objective: to compare TLB with RAM.


Due to higher cost, it may not be cost effective to have entire page table in TLB, but a
subset of page table, that may be currently active, can be moved to TLB.
Each entry of TLB would contain Page no. of a page and the Frame no. where the page
is stored in RAM

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TLB

• Topic objective: To explain


mechanism of TLB Hardware
with the help of following
diagram.

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TLB

Topic Objective: To understand the mechanism of TLB.


Whenever, a logical address is generated, the page no. p of the logical address is fed as
a key to the TLB.
The key is searched in parallel in all the entries of TLB.
If the match found for the page no. p, it is termed as TLB hit. The entry, with the
matching number contains the frame no., where the page is stored.

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TLB

If match not found for the page no., it indicates TLB miss. Then, the frame no. is
accessed from the page table. Also, the page table entry is moved to TLB, so that for
further references to that page, its frame no. can be accessed from TLB itself.
If TLB is full, then some replacement algorithm can be used to replace one of the
existing entries in the TLB.

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Improvement in effective memory access time

Topic objective: To compute the effective memory access time of cache memory.
TLB Hit ratio=0.9
RAM access time T=100 ns and TLB access time t=20 ns
Effective access time without TLB= 2T=200 ns
Effective access time with TLB
=H*(T + t) + (1-H) * (2*T + t)
=0.9*(100+20) + (1-0.9)*(2*100+20)
=0.9*120+0.1*220=108+22=130 ns
Reduction in effective access time=(200-130)*100/200=35%
Madhu Tanwar BCSE0403 OS Unit-4
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Inverted Page Table(IPT)

• Topic Objective: To explain the


mechanism of IPT with the help of
following diagram.

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Inverted Page Table(IPT)

Topic Objective: To explain the translation of logical address into physical address
using IPT
The size of IPT is related to the size of the physical memory, not the size of logical
address space. Since IPT is not process specific and it does not need switching during
context switching of the processes. IPT contains process id along with page no. for
each frame in the physical memory. IPT is system wide not per process.

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Inverted Page Table(IPT)

A logical address generated by CPU contains process-id(pid), Page no.(p) and page
offset(d). A search is carried out in IPT to find a match for the process id and the
page number. The offset of the matching slot in the IPT, gives the frame number,
where the desired page is residing. The frame number combined with the offset d,
gives the intended physical address.

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Advantages of IPT over conventional Page Table

Topic Objective: Comparison of IPT with conventional Page Table.


There is only one page table for all processes, whereas conventional page table is
per process.
Its size is related to the size of physical memory available.
Limitations: The search time to match an entry in IPT is very large.
The average search time of IPT can be reduced by combining the IPT with a TLB.

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IPT with a TLB

Topic Objective: Comparison of IPT with TLB.


Each entry in the TLB would comprise Page number, process-id and its corresponding
frame number. The associative memory would permit matching of a process-id and
page number pair simultaneously with all the entries in TLB. The desired frame
number can then be obtained from the matching entry.

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IPT with a TLB

Each entry in the TLB would comprise Page number, process-id and its corresponding
frame number. The associative memory would permit matching of a process-id and
page number pair simultaneously with all the entries in TLB. The desired frame
number can then be obtained from the matching entry.

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Hashed Page Table

• Topic Objective: To explain


the mechanism of Hashed
Page Table with the help of
following diagram

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Hashed Page Table

Topic objective: Translation of logical address into physical address using Hashed
Page Table.
A page table is created of length M.
Whenever, logical address is generated, a hashing function is applied to the page
number p, to generate an index i.
i=p%M;
The index value i is used to index into the page table. Each entry in the page table is
a pointer to a linked list.

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Multi-level Paging

• Topic Objective: To explain the mechanism of multi-level paging with the help of
following diagram

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Multi-level Paging

Topic Objective: To explain the steps for translating logical address into physical
address in multi-level paging scheme.
The page table is split into multiple levels. For example, in a two level page table, a
logical address would comprise of the following fields:
(a)Page number p1, for indexing into outer page table.
(b)Page number p2, for indexing into inner page table.
(c)Offset or displacement d that is used to index into the selected frame, to obtain
the desired operand

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Multi-level Paging

The page table is split into multiple levels. For example, in a two level page table, a
logical address would comprise of the following fields:
(a)Page number p1, for indexing into outer page table.
(b)Page number p2, for indexing into inner page table.
(c)Offset or displacement d that is used to index into the selected frame, to obtain
the desired operand

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Advantage of Multi-level Paging

Topic objective: To explain the advantages of multi-level paging.


All the inner page tables would not be required to be memory resident
simultaneously. Depending upon the size of executing program only a small fraction
of the set of inner page tables would need to be memory resident, thus reducing the
memory overhead of the page table.

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Disadvantage of Multi-level Paging

Topic objective: To explain the disadvantage of multi-level paging.


To access an operand, multi-level paging needs some extra memory accesses. For
example, in the case of two level paging, an additional memory access is required,
that is, to get the base address of inner page table.

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Segmentation

• Topic objective: To understand segmentation mechanism with the help of


following diagram

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Segmentation

Topic objective: How logical address is translated into physical address in


segmentation mechanism.
In segmentation, the physical memory is divided into segments of varying sizes. Each
segment is assigned a unique segment number.
The memory management is done through a segment table, which is indexed by
segment number. For each segment, it has an entry that provides base address of
the segment and size of the segment. The logical address contains segment number
‘s’ and offset within the segment ‘d’

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Segmentation

Using the segment number, the system obtains base address of the segment. Then it
makes a check to determine whether offset is within the segment size or not. If yes
then the offset d is valid and physical address is computed by adding the offset to
the base address; else it is invalid (error).

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Segmentation with paging

Topic Objective: To understand and implement the segmentation with paging


mechanism.
In this, the logical space is divided into a number of segments of varying sizes and
each segment is divided into a number of pages, each of a fixed size.
The memory management is done through a segment table. Each segment has an
entry in the table. An entry contains base address of the segment page table and
size of the segment page table.

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Segmentation with paging

The logical address contains segment number, page number in a segment and offset
‘d’ in the page. The segment number s is to access the segment entry in the access
the segment page table. So, each segment will have a separate page table. The page
number p is used to access the frame number in the page table, provide p<M (size of
the segment page table); else it is invalid page number. The frame number ‘f’ is
combined with the offset ‘d’ to compute the physical address.

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Daily Quiz
Which allocation strategy places a process in the first memory block that is large enough?
a) Best Fit b) First Fit c) Worst Fit d) Next Fit

Which memory allocation strategy results in the smallest leftover memory block?
a) First Fit. b) Best Fit. c) Worst Fit d) Random Fit

Paging divides the process into:


a) Equal-sized pages
b) Variable-sized segments
c) Fixed-sized blocks and pages
d) None of the above

Segmented Paging is a combination of:


a) Paging and Fixed Partitioning
b) Paging and Variable Partitioning
c) Segmentation and Paging
d) Contiguous and Non-Contiguous Memory Allocation

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Virtual Memory(VM) Concept

Topic Objective: To understand and implement the virtual memory concepts.


Virtual memory is a technique that permits execution of processes with their code
only partially loaded into the physical memory.
This technique takes advantage of the fact that a program tends to have locality of
reference, and a process code never required in its entirety, at the same time.

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Virtual Memory(VM) Concept

Virtual memory is a technique that permits execution of processes with their code
only partially loaded into the physical memory.

This technique takes advantage of the fact that a program tends to have locality of
reference, and a process code never required in its entirety, at the same time.

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Advantages of Virtual Memory

Topic objective: To describe the advantages of using virtual memory concepts.


 Programs are not constrained by physical memory size.
 Degree of multi programming can be varied over a large range

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Implementation of VM

Topic objective: Implantation of VM concepts using demand paging and demand


segmentation.
It is implemented by demand paging or by demand segmentation.
When a process is swapped-in, the pager loads a set of its pages, which may be
predicted to be initially needed by the process into the physical memory.
The secondary memory holds the remaining pages of the process.

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Implementation of VM

When a process is swapped-in, this bit is set to invalid for all the entries in the page
table. When page is loaded into RAM, its frame number is entered and page validity
bit is set to valid.
Thus if bit is valid, it indicates that the page is legally from the logical address space
of the process and is currently in the RAM.
If it is set to invalid, it indicates that either the page does not belong to the logical
address space of the process or it is still not loaded into RAM.

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Implementation of VM

Whenever, a logical or virtual address is generated, the system operates as follows:


(i) Looks into the page table. If the page validity bit is set to v, it reads the
corresponding frame number, adds page offset and determines physical
address.
(ii) If the page table indicates page invalid, then system reads the page into a free
frame. If no free frame is available, it uses a page replacement algorithm to
replace an occupied frame.

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Implementation of VM

In addition to this, system needs the following system tables:


(a) Page Map Table : This table is per process. It indicates whether the page is
memory resident or not. It also contains validity bit.
(b) Memory Map Table (Free Frames’ list): This table provides information about
the availability of free frames, that can be allocated accommodate new pages.
This table is per system.
(c) File Map Table: This table is per process. It provides the disk addresses, where
the process pages are stored on the secondary storage.

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Demand Paging

Topic objective: To explain the types of demand paging.


Pure Demand Paging: All the pages are placed in secondary storage and on demand
basis, it is loaded into main memory at execution or run time. At the outset, main
memory is empty.

Pre-fetched Demand Paging: In this some of the selective pages are


preloaded(before execution starts). Initially some of the pages are in main memory.

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Modified/Dirty Bit

Topic objective: To understand the concept of modified and


dirty bit in the implementation of Virtual Memory Concepts.
 It is used to reduce one disk access.
 If write operation is performed on the page after loading, then page is modified
or dirty.
 If page is dirty, first write the dirty page into disk and bring the requested page
into main memory.
 If the page is clean, no write operation is performed on the page simply replace
the page with requested page
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Global and Local Page Replacement

Topic Objective: To understand and Page Replacement Concepts and its types.
Whenever, a process experiences a page fault, if no free frame are available, then
the OS gets a currently occupied frame released and allocates the released frame to
the page faulting process, for accommodating the new page. If the victim page
belongs to the page faulting process itself, it is called local page replacement; else it
is called global page replacement. Global page replacement does not focus on the
performance of individual processes. It rather focuses on the system performance.

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FIFO Page Replacement Algorithm

Topic Objective: To implement the FIFO Page Replacement Algorithm.


It replaces the page that has been in the memory for the longest time. One possible
implementation is a FIFO (queue) of the existing pages in the memory. Whenever,
page fault occurs, the page at the top of the queue is made victim and the new page
is put at the tail of the queue.
Reference String: It refers to the sequence of page numbers referenced by a program
during its execution.
Page number = Quotient (Logical Address/Page Size), if logical address =0745 and
page size =100 bytes, then page no=0745/100=7
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Advantages and Disadvantages of FIFO

Topic Objective: To explain the merit and demerit of FIFO Page Replacement Algorithm.
Advantage: Implementation is fairly simple
Limitation: This algorithm does not take into account the current usages of pages and
may often eject some pages that may be currently active. Such pages would need to be
moved in frames again, in near future.
Also, if the system has global page replacement, then the program having largest number
of allocated pages would have higher page fault rate, since the probability of oldest page,
belonging to this program would be very high. This phenomena is called Belady’s
Anomaly and it defies intuition.
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No. of Faults using FIFO

7 7 7 2 2 2 2 4 4 4 0 0 0 0 0 0 0 7 7 7
No. of Frames
0 0 0 0 3 3 3 2 2 2 2 2 1 1 1 1 1 0 0

1 1 1 1 0 0 0 3 3 3 3 3 2 2 2 2 2 1

Status F F F F H F F F F F F H H F F H H F F F

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No. of Faults using FIFO

Total no. of page fault or misses =15


Total no. of Hits = 5
Hit ratio= 5/20=0.25
Page fault % = (15/20)*100=75%

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LRU Page Replacement Algorithm

Topic Objective: To implement the LRU Page Replacement Algorithm.


It replaces the page which has been used least recently. So, while choosing a resident page for
replacement, the algorithm considers its current usage. It is presumed that a page that has been
used least recently, would be the one that would be least likely to be accessed soon. One
implementation of this algorithm could be by using a stack. Whenever, a new page is brought in, it
is placed at the top of stack. Also, whenever, a resident page is accessed, it is removed from its
current position and moved to the top of the stack. Whenever, a page is to be replaced, victim
page is chosen from the bottom of the stack.

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LRU Page Replacement Algorithm

Topic Objective: To explain the advantages and disadvantages of LRU Page Replacement
Algorithm.
Advantage: While selecting a resident page for replacement, it takes into consideration the
current usage of a page. This algorithm is free from Belady’s Anomaly.
Limitations: The algorithm has a lot of processing overheads, which are needed to keep track of
least recently used

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No. of Faults using LRU

7 7 7 2 2 2 2 4 4 4 0 0 0 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 3 3 3 3 3 3 0 0 0 0 0

1 1 1 3 3 3 2 2 2 2 2 2 2 2 2 7 7 7

Status F F F F H F H F F F F H H F H F H F H H

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No. of Faults using LRU

Total no. of page fault or misses =12


Total no. of Hits = 8
Hit ratio= 8/20=0.40
Page fault % = (12/20)*100=60%

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Optimal Page Replacement Algorithm

Topic Objective: To implement the Optimal Page Replacement Algorithm.


In its ideal form, this algorithm should replace a page, which is to be referenced in the
most distant future. Since, it requires knowledge of future, its ideal form is not
implementable. The significance of this algorithm is only theoretical. It is used to compare
performance of an implementable algorithm with that of the optimal.

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Optimal Page Replacement Algorithm

Topic Objective: To compare Optimal Page Replacement Algorithm with FIFO and LRU.
Optimal algorithm appears to be best in term of number of page faults, but it is not
feasible to implement this algorithm since the algorithm requires the knowledge of
future. Out of FIFO and LRU, the LRU is better, since it takes into consideration the current
usage of a page whenever a resident page is considered for replacement. The page, which
has been least recently used is chosen for replacement.

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No. of Faults using Optimal Page Replacement

No. of Frames 3 7 7 7 2 2 2 2 2 2 2 2 2 2 2 2 2 2 7 7 7

0 0 0 0 0 0 4 4 4 0 0 0 0 0 0 0 0 0 0

1 1 1 3 3 3 3 3 3 3 3 1 1 1 1 1 1 1

Status F F F F H F H F H H F H H F H H H F H H

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No. of Faults using Optimal Page Replacement

Total no. of page fault or misses =09


Total no. of Hits = 11
Hit ratio= 11/20=0.55
Page fault % = (9/20)*100=45%

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Thrashing

Topic objective: To understand the concept of thrashing and how it impacts


adversely on the performance of the system
As we increase the degree of multiprogramming CPU utilization increases to a certain
limit, after that drastically decreases that is called thrashing.

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Working Set Model

Topic objective: Removal of thrashing with the help of working set model.
 It is one of the solution of thrashing.
 It is based on assumption of locality of reference.
 It uses ∆, working set window
 Idea is to examine recent working set window page references
 If a page is in active use, it will be in working set window and if it is no
longer being used it will be dropped from working set
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Locality of Reference of a Process(Spatial and Temporal)

Topic objective: To understand the locality of reference of a process and its type.

At any time, during its execution, a process will be accessing only a small subset of
logical address space. This subset of the logical address space is called its current locality
of references. The current locality keeps shifting. It also keeps varying in size. Whenever,
a page forming part of the current locality is not found in the memory, it will cause a
page fault. So when a process moves from one locality to another, it will get the new
pages into memory through page faulting.

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Page Fault Frequency

Topic Objective: To remove the thrashing with the concept of Page Fault Frequency.

At any time, during its execution, a process will be accessing only a small subset of
logical address space. This subset of the logical address space is called its current locality
of references. The current locality keeps shifting. It also keeps varying in size. Whenever,
a page forming part of the current locality is not found in the memory, it will cause a
page fault. So when a process moves from one locality to another, it will get the new
pages into memory through page faulting.

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Page Fault Frequency

The PFF Algorithm may be implemented as follows:


Whenever, a process is having a page fault, the OS computes the time elapsed since its
last page fault. If the interval is lower than the critical value T (it indicates a PFF higher
than critical), then a new frame is allocated to the process.
However, if the interval is higher than T, then frame assigned to the process, whose
reference bit and written –into bit are found to be clear, is replaced by new page.
The OS sweeps and frees those frames that have not been referenced since last sweep.
These frames are added to the pool of free pages. The referenced bits of the remaining
resident pages are reset.
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Case Study

Virtual Memory Management in Modern OS: Windows 10

 How Paging Impacts Performance


 Virtual memory provides an abstraction of memory
resources
 Enables multitasking, memory protection, and
stability
 Used in all modern operating systems including
Windows 10

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Case Study

What is Virtual Memory?

• Illusion of a large continuous block of memory


• Enables execution of programs larger than
physical RAM
• Uses hard disk (page file) when RAM is full
• Supports memory protection and isolation

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Case Study

Virtual Memory in Windows 10

• Page-based memory model


• Process virtual address space:
• - 4 GB (32-bit) or 128 TB (64-bit)
• Page size: 4 KB
• Backed by [Link]
• Uses demand paging

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Case Study

Tools for Monitoring

• Task Manager
• Resource Monitor
• Performance Monitor (PerfMon)
• Sysinternals: VMMap, Process Explorer

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Case Study

What is Paging?

• Divides memory into fixed-size pages (4 KB)


• Maps virtual pages to physical memory frames
• Loads pages into RAM as needed
• Handles page hits and page faults

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Case Study

Paging Operations

• Page Hit: Page is in RAM, fast access


• Page Fault: Page not in RAM, load from disk
• Page Replacement Algorithms: LRU, FIFO, etc.

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Case Study

Impact of Paging
Benefits:
• Multitasking
• Security and memory isolation
• Flexibility in memory usage
Drawbacks:
• Page faults slow down performance
• Thrashing reduces system responsiveness
• Disk I/O bottlenecks on HDDs
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Case Study

Real-World Scenario

• User runs Chrome, Photoshop, Visual Studio, and a


game
• RAM: 8 GB; Page file: 8 GB
• High page fault rate
• Application lag and freezes
• Upgrade to 16 GB RAM or SSD improves
performance
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Case Study

Optimization Tips

• Increase physical RAM


• Use SSD for faster paging
• Manually configure page file size
• Monitor memory usage
• Close unused background apps

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Case Study

Conclusion

• Virtual memory enables stability and flexibility


• Excessive paging degrades performance
• Optimization helps maintain system responsiveness

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Faculty Video Links, YouTube & NPTEL Video Links and
Online Courses Details

YouTube/other Video Links

• [Link]
• [Link]
• [Link]
• [Link]

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Daily Quiz
Which of the following is responsible for memory allocation and deallocation in an
operating system?
•A) Compiler
•B) Loader
•C) Memory Manager
•D) Scheduler

Dynamic memory allocation occurs at:


•A) Compile time
•B) Run time
•C) Link time
•D) None of the above

Which type of address binding occurs during program execution?


•A) Compile-time
•B) Load-time
•C) Execution-time
•D) Static-time
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Daily Quiz
In fixed partitioning, memory is divided into:
•A) Variable-sized partitions
•B) Fixed-sized partitions
•C) Dynamic partitions
•D) None of the above

Which of the following is a disadvantage of contiguous memory allocation?


•A) External fragmentation
•B) Internal fragmentation
•C) Both A and B
•D) None of the above

Which allocation strategy finds the first free block that is large enough?
•A) Best Fit
•B) First Fit
•C) Worst Fit
•D) Next Fit

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Daily Quiz
Which allocation strategy minimizes wasted space?
•A) Best Fit
•B) First Fit
•C) Worst Fit
•D) Random Fit

In paging, a logical address is divided into:


•A) Frame number and offset
•B) Page number and offset
•C) Segment number and page number
•D) Segment number and offset

Virtual memory allows a program to:


•A) Use less memory than physically available
•B) Run even if it exceeds physical memory
•C) Avoid all fragmentation
•D) None of the above

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Daily Quiz
Which page replacement algorithm replaces the page that has been in memory the
longest?
•A) Optimal
•B) FIFO
•C) LRU
•D) LFU

Thrashing occurs when:


•A) The CPU is underutilized
•B) Too many pages are replaced too frequently
•C) All pages are in memory
•D) The program has no working set

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MCQ
Which of the following techniques does the memory manager use to improve memory utilization?
•A) Compaction
•B) Segmentation
•C) Paging
•D) All of the above

The role of the loader in memory management is to:


•A) Execute instructions
•B) Translate logical addresses to physical addresses
•C) Load the program into memory
•D) Allocate memory to the process

Which of the following address binding techniques allows processes to be moved between memory locations
during execution?
•A) Compile-time
•B) Load-time
•C) Execution-time
•D) Static binding
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MCQ
What is a logical address?
•A) The physical address of a process in memory
•B) The address generated by the CPU
•C) The address used by the memory unit to fetch data
•D) None of the above

In fixed partitioning, unused memory within a partition is called:


•A) External fragmentation
•B) Internal fragmentation
•C) Page fault
•D) Thrashing

In paging, the size of a page is determined by:


•A) Operating system
•B) Processor architecture
•C) Both A and B
•D) Compiler

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Weekly Assignment

• Name the common strategies to select a free hole from a set of available holes.
• Explain Compaction.
• Define Virtual Memory.
• Name the various page replacement algorithms used for page replacement.

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Old Question Papers

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Old Question Papers

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Old Question Papers

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Old Question Papers

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Glossary Questions

1. What is memory management in operating systems and types of memory management


techniques?
2. Define address binding. What are the different stages of address binding?
3. Difference between logical and physical address?
4. What are contiguous and non-contiguous memory allocation?
5. Define fixed partitioning in memory management.
6. What is variable partitioning and how is it better than fixed partitioning?
7. What is paging in memory management?
8. Define segmentation. How does it differ from paging?
9. What is virtual memory?
[Link] demand paging. How does it work?

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Expected Questions for University Exam

1. Explain paging. Describe how logical address is translated to physical address in a paged
system.
2. Explain thrashing. State the cause of thrashing and discuss its solution
3. Differentiate between internal fragmentation and external fragmentation.
4. Define Belady’s anomaly.
5. Differentiate between the paging and segmentation.
6. When do page faults occur? Describe in detail the actions taken by the operating system
when a page faults occur.
7. Consider the following reference string 1,3,2,4,0,1,5,6,0,1,2,3,0,5,6,4,2,1,3,2.7,3,2.
How many page faults will occur for:
FIFO Page Replacement
Optimal Page Replacement
LRU Page Replacement
Assuming three and four frames (initially empty)
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