(1)冷门习题1:Verilog Language - More Verilog Features - Reduction operators
一个矢量的位操作,多比特矢量操作会变得方便。
(2)冷门习题2:Verilog Language - More Verilog Features - Combination for-loop:Vector reversal2
Verilog中的for循环
(3)冷门习题3:Verilog Language - More Verilog Features - Combination for-loop:255-bit population count
out需要赋初值0,wire类型,使用阻塞赋值。
(4)较难习题1:Verilog Language - More Verilog Features - Combination for-loop:100-bit binary adder 2
generate语法 + 模块实例化
(5)较难习题2:Verilog Language - More Verilog Features - Combination for-loop:100-digit BCD adder
需要自己定义一个中间变量
(6)冷门习题4:Circuits - Combinational Logic - Basic Gates - Gates and Vectors
可以使用generate语句实现
(7)冷门习题5:Circuits - Combinational Logic - Basic Gates - Even longer Vectors
可以使用generate语句实现或者直接assign语句实现