<?xml version="1.0" encoding="utf-8" ?><rss version="2.0"><channel><title><![CDATA[luuxc的专栏]]></title><description><![CDATA[]]></description><link>https://blog.csdn.net/luuxc</link><language>zh-cn</language><generator>https://blog.csdn.net/</generator><copyright><![CDATA[Copyright &copy; luuxc]]></copyright><item><title><![CDATA[Quartus II常见错误(转)]]></title><link>https://blog.csdn.net/luuxc/article/details/5479984</link><guid>https://blog.csdn.net/luuxc/article/details/5479984</guid><author>luuxc</author><pubDate>Tue, 13 Apr 2010 10:38:00 +0800</pubDate><description><![CDATA[1.Found clock-sensitive change during active clock edge at time  on register ""　　原因：vector source file中时钟敏感信号（如：数据，允许端，清零，同步加载等）在时钟的边缘同时变化。而时钟敏感信号是不能在时钟边沿变化的。其后果为导致结果不正确。　　措施：编辑vector source fil]]></description><category></category></item></channel></rss>