IC芯片设计流程
步骤 | 工具/相关内容 | 人员 |
---|---|---|
Marketing Request (市场需求) | ||
Architecture spec(架构说明书 ) | Top architect | Architecture engineer |
Arch/Algorithm Emulation (架构/算法仿真) | C/C++/Matlab | Algorithm Engineer |
Design Spec(设计说明书) | Design Spec example | |
RTL Coding(RTL代码) | VHDL/Verilog/SystemVerilog | RTL design engineer/design engineer |
IP Level RTL coding | ||
IP Level RTL simulation | Makefile 仿真验证工具:cadence:Incisive. Synopsys: VCS. Mentor:Questasim. | |
( IP Level verification ) | C/C++/SystemC/SystemV |