RK3568-修改调试串口对应的串口端口

瑞芯微SDK默认将uart2_m0作为调试串口，以下方法将调试串口修改为uart5_m1。

修改bootloader

修改/OK3568-linux-source/rkbin/tools/ddrbin_param.txt文件，5表示串口5。1表示复用m1。

执行./ddrbin_tool ddrbin_param.txt ../bin/rk35/rk3568_ddr_1560MHz_v1.11.bin命令

修改uboot

diff --git a/arch/arm/dts/OK3568-C.dts b/arch/arm/dts/OK3568-C.dts
index ddbdaee..56c8e7c 100644
--- a/arch/arm/dts/OK3568-C.dts
+++ b/arch/arm/dts/OK3568-C.dts
@@ -105,6 +105,10 @@
 	status = "okay";
 };
 
+&uart5 {
+	status = "okay";
+};
+
 &vop {
 	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
 	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL> , <&cru PLL_GPLL>;
diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi
index bcec6fe..56d058c 100644
--- a/arch/arm/dts/rk3568-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-u-boot.dtsi
@@ -14,7 +14,7 @@
 	};
 
 	chosen {
-		stdout-path = &uart2;
+		stdout-path = &uart5;
 		u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor;
 	};
 };
@@ -36,6 +36,14 @@
 	status = "okay";
 };
 
+&uart5 {
+	clock-frequency = <24000000>;
+	u-boot,dm-spl;
+	/delete-property/ pinctrl-names;
+	/delete-property/ pinctrl-0;
+	status = "okay";
+};
+
 &grf {
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/configs/OK3568-C_defconfig b/configs/OK3568-C_defconfig
index efddde9..e7648fb 100644
--- a/configs/OK3568-C_defconfig
+++ b/configs/OK3568-C_defconfig
@@ -166,7 +166,7 @@ CONFIG_DM_RESET=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RESET_ROCKCHIP=y
 CONFIG_BAUDRATE=115200
-CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_BASE=0xfe690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_ROCKCHIP_SFC=y

修改kernel

diff --git a/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi b/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi
index 31ffd6024..cb788b447 100644
--- a/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi
+++ b/arch/arm64/boot/dts/rockchip/OK3568-C-common.dtsi
@@ -392,14 +392,14 @@
 
 	fiq-debugger {
 		compatible = "rockchip,fiq-debugger";
-		rockchip,serial-id = <2>;
+		rockchip,serial-id = <5>;
 		rockchip,wake-irq = <0>;
 		/* If enable uart uses irq instead of fiq */
 		rockchip,irq-mode-enable = <1>;
 		rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
 		interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&uart2m0_xfer>;
+		pinctrl-0 = <&uart5m1_xfer>;
 		status = "okay";
 	};
 
@@ -1804,7 +1804,7 @@
 };
 
 &uart5 {
-	status = "okay";
+	status = "disabled";
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart5m1_xfer>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts b/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts
index 178b4d831..977417144 100644
--- a/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/OK3568-C-linux.dts
@@ -2,6 +2,6 @@
 
 / {
 	chosen: chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait";
+		bootargs = "earlycon=uart8250,mmio32,0xfe690000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait";
 	};
 };

最后执行全编译操作

./build.sh uboot
./build.sh kernel

分别烧写分区

分步烧写uboot/rk356x_spl_loader_v1.11.111.bin到loader分区
烧写uboot/uboot.img到uboot分区
烧写kernel/boot.img到boot分区