【1】仿真器是怎么实现cpu的访存的（gem5代码阅读）

gem5中可以用的cpu模型和存储系统模型有很多种，我选择的cpu模型是TimingSimple CPU模型，它主要是模拟cpu的访存机制，cpu发出访存指令，cpu暂停直到接收到存储系统的响应
我模拟的一个系统是cpu+memory的系统，下图为系统配置图

所以我想gem5是怎么模拟cpu到memory的访问的，我先看了simulate.cc的代码
`//! Mutex for handling async events.
std::mutex asyncEventMutex;

//! Global barrier for synchronizing threads entering/exiting the
//! simulation loop.
Barrier *threadBarrier;

//! forward declaration
Event *doSimLoop(EventQueue *);

/**

• The main function for all subordinate threads (i.e., all threads
• other than the main thread). These threads start by waiting on
• threadBarrier. Once all threads have arrived at threadBarrier,
• they enter the simulation loop concurrently. When they exit the
• loop, they return to waiting on threadBarrier. This process is
• repeated until the simulation terminates.
  */
  static void
  thread_loop(EventQueue *queue)
  {
  while (true) {
  threadBarrier->wait();
  doSimLoop(queue);
  }
  }`