Data Hazards occur when an instruction depends on the result of previous instruction and that result of instruction has not yet been computed.
Whenever two different instructions use the same storage. the location must appear as if it is executed in sequential order.
Register Hazards
There are four types of data dependencies:
- Read after Write (RAW),
- Write after Read (WAR),
- Write after Write (WAW),
- Read after Read (RAR).
These are explained as follows below.
Read after Write (RAW) :
It is also known as True dependency or Flow dependency.
It occurs when the value produced by an instruction is required by a subsequent instruction.
For example,
ADD R1, --, --;
SUB --, R1, --;
Stalls are required to handle these hazards.
Write after Read (WAR) :
It is also known as anti dependency.
These hazards occur when the output register of an instruction is used right after read by a previous instruction.
For example,
Write after Write (WAW) :
It is also known as output dependency.
These hazards occur when the output register of an instruction is used for write after written by previous instruction.
For example,
Read after Read (RAR) :
It occurs when the instruction both read from the same register.
For example,