modelsim仿真ISE工程时出现# ** Error: (vlog-19) Failed to access library 'rtl_work' at "rtl_work

vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L cycloneive_ver -L rtl_work -L work -voptargs=""+acc"" b_code_1_tb # Start time: 14:49:08 on Jun 09,2025 # ** Note: (vsim-3812) Design is being optimized... # ** Error: (vopt-13130) Failed to find design unit b_code_1_tb. # Searched libraries: # altera_ver # lpm_ver # sgate_ver # altera_mf_ver # altera_lnsim_ver # cycloneive_ver # rtl_work # work # work # Optimization failed # ** Note: (vsim-12126) Error and warning message counts have been restored: Errors=1, Warnings=0.什么意思

Error: (vish-42) Unsupported ModelSim library format for "D:/BaiduNetdiskDownload/top_clock_new/simulation/modelsim/rtl_work". (Format: 4)

# Start time: 10:12:28 on Jul 01,2025 # Loading work.tb_led # ** Error: (vsim-3037) D:/FPGAsxProject/led1/par/../sim/tb_led.v(22): Missing instance name in instantiation of 'led_flow'. # Time: 0 ps Iteration: 0 Instance: /tb_led File: D:/FPGAsxProject/led1/par/../sim/tb_led.v # Error loading design # Error: Error loading design # Pausing macro execution # MACRO ./led_run_msim_rtl_verilog.do PAUSED at line 12 # Load canceled

WINDOW2 START Reading C:/questasim64_10.7c/tcl/vsim/pref.tcl # 10.7c # do ../TB/run2.do # ** Warning: (vlib-34) Library already exists at "work". # QuestaSim-64 vmap 10.7c Lib Mapping Utility 2018.08 Aug 18 2018 # vmap work work # Modifying modelsim.ini # QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 18 2018 # Start time: 15:42:27 on Mar 14,2025 # vlog "+cover=bsfce" ../RTL/DIG_clk_cnt.v # -- Compiling module DIG_clk_cnt # # Top level modules: # DIG_clk_cnt # End time: 15:42:27 on Mar 14,2025, Elapsed time: 0:00:00 # Errors: 0, Warnings: 0 # QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 18 2018 # Start time: 15:42:27 on Mar 14,2025 # vlog "+cover=bsfce" ../RTL/Dynamic_dispaly.v # -- Compiling module Dynamic_dispaly # # Top level modules: # Dynamic_dispaly # End time: 15:42:27 on Mar 14,2025, Elapsed time: 0:00:00 # Errors: 0, Warnings: 0 # QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 18 2018 # Start time: 15:42:27 on Mar 14,2025 # vlog "+cover=bsfce" ../RTL/top.v # -- Compiling module top # # Top level modules: # top # End time: 15:42:27 on Mar 14,2025, Elapsed time: 0:00:00 # Errors: 0, Warnings: 0 # case004 # ../Output/func_report/Log/case004.log # ../Output/func_report/Wlf/case004.wlf # ../Output/func_report/Ucdb/case004.ucdb # QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 18 2018 # Start time: 15:42:27 on Mar 14,2025 # vlog ../TB/testbench.v # -- Compiling module testbench # # Top level modules: # testbench # End time: 15:42:27 on Mar 14,2025, Elapsed time: 0:00:00 # Errors: 0, Warnings: 0 # vsim -voptargs="+acc" -coverage work.testbench -l ../Output/func_report/Log/case004.log # Start time: 15:42:27 on Mar 14,2025 # ** Note: (vsim-8009) Loading existing optimized design _opt # // Questa Sim-64 # // Version 10.7c win64 Aug 18 2018 # // # // Copyright 1991-2018 Mentor Graphics Corporation # // All Rights Reserved. # // # // QuestaSim and its associated documentation contain trade # // secrets and commercial or financial information that are the property of # // Mentor Graphics Corporation and are privileged, confidential, # // and exempt from disclosure under the Freedom of Information Act, # // 5 U.S.C. Section 552. Furthermore, this information # // is prohibited from disclosure under the Trade Secrets Act, # // 18 U.S.C. Section 1905. # // # Loading work.testbench(fast) # Loading work.top(fast) # Loading work.DIG_clk_cnt(fast) # Loading work.Dynamic_dispaly(fast) # rst_n is 1 # ** Note: $stop : C:/sim_env/sim/VSIM/../TB/testbench.v(20) # Time: 20 ns Iteration: 1 Instance: /testbench # Break in Module testbench at C:/sim_env/sim/VSIM/../TB/testbench.v line 20 # Stopped at C:/sim_env/sim/VSIM/../TB/testbench.v line 20 # Dataset "sim" exported as WLF file: ../Output/func_report/Wlf/case004.wlf. # ** Error: couldn't read file "../TB/error_detection.tcl": no such file or directory # Error in macro ./../case/case004/main.tcl line 19 # couldn't read file "../TB/error_detection.tcl": no such file or directory # while executing # "source ../TB/error_detection.tcl"