5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDI1_TX_N7 SDI2_RX_N 8
SDI1_TX_P7 SDI2_RX_P 8
HDMI_REC_CLOCK_P6 CSI1_LVDS_HS2_P 14
HDMI_REC_CLOCK_N6 CSI1_LVDS_HS2_N 14
SDI2_TX_N8 SDI1_RX_N 7
CSI1_LVDS_HS0_P 14
SDI2_TX_P8 SDI1_RX_P 7
CSI1_LVDS_HS0_N 14
CSI1_LVDS_HS1_P 14
CSI1_LVDS_HS1_N 14
CSI1_LVDS_HS3_P 14
CSI1_LVDS_HS3_N 14
CSI1_LVDS_CLK_P 14
SDI_CLK0_N9
CSI1_LVDS_CLK_N 14
SDI_CLK0_P9
CSI1_LP_CLK_P 14
CSI1_LP_CLK_N 14
HDMI_TX_D2N5 HDMI_RX_D2N 4
HDMI_TX_D2P5 HDMI_RX_D2P 4
CSI1_LP0_P14 CSI1_LP2_P 14
CSI1_LP0_N14 CSI1_LP2_N 14
HDMI_TX_D1N5 HDMI_RX_D1N 4
HDMI_TX_D1P5 HDMI_RX_D1P 4
HDMI_TX_D0N5 HDMI_RX_D0N 4
CSI1_LP1_P 14
HDMI_TX_D0P5 HDMI_RX_D0P 4
CSI1_LP1_N 14
CSI1_LP3_P 14
HDMI_TX_D3N5
CSI1_LP3_N 14
HDMI_TX_D3P5
CSI2_LVDS_HS2_P 14
HDMI_8T49N241_OUT_N6 HDMI_CLKN 4
CSI2_LVDS_HS2_N 14
HDMI_8T49N241_OUT_P6 HDMI_CLKP 4
CSI2_LVDS_HS0_P 14
CSI2_LVDS_HS0_N 14
SFP1_TX_N11 PCIE_TX0_N 10
SFP1_TX_P11 PCIE_TX0_P 10
CSI2_LVDS_HS1_P 14
CSI2_LVDS_HS1_N 14
SFP1_RX_N11 PCIE_RX0_N 10
CSI2_LVDS_HS3_P 14
SFP1_RX_P11 PCIE_RX0_P 10
CSI2_LVDS_HS3_N 14
SFP2_TX_N11 PCIE_TX1_N 10
CSI2_LP_CLK_P 14
SFP2_TX_P11 PCIE_TX1_P 10
CSI2_LP_CLK_N 14
CSI2_LVDS_CLK_P 14
SFP2_RX_N11 PCIE_RX1_N 10
CSI2_LVDS_CLK_N 14
SFP2_RX_P11 PCIE_RX1_P 10
CSI2_LP2_P 14
PCIE_TX2_N 10
CSI2_LP2_N 14
PCIE_TX2_P 10
CSI2_LP0_P 14
CSI2_LP0_N 14
PCIE_RX2_N 10
PCIE_RX2_P 10
CSI2_LP1_P 14
CSI2_LP1_N 14
PCIE_TX3_N 10
CSI2_LP3_P 14
PCIE_TX3_P 10
CSI2_LP3_N 14
PCIE_RX3_N 10
PCIE_RX3_P 10
SFP_CLK_N11 PCIE_CLK_FPGA_N 10
SFP_CLK_P11 PCIE_CLK_FPGA_P 10
FPGA_TCK 19
FPGA_TMS 19
FPGA_TDO 19
FPGA_TDI 19
SDI_CLK1_N 9
SDI_CLK1_P 9
Title
Size Document Number Rev
Date: Sheet of
上海派普蓝电子
http://www.pipeblue.com
<Doc> 1.0
PAGE02 Board Connector1
A3
2 21Thursday, April 03, 2025
Title
Size Document Number Rev
Date: Sheet of
上海派普蓝电子
http://www.pipeblue.com
<Doc> 1.0
PAGE02 Board Connector1
A3
2 21Thursday, April 03, 2025
Title
Size Document Number Rev
Date: Sheet of
上海派普蓝电子
http://www.pipeblue.com
<Doc> 1.0
PAGE02 Board Connector1
A3
2 21Thursday, April 03, 2025
J1
AXK6A2337YG
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S1
NC
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S2
NC
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S3
NC
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S4
NC
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J2
AXK6A2337YG
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BANK115_TX0_N BANK115_RX0_N
BANK115_TX0_P BANK115_RX0_P B18_L5_P B18_L3_P
B18_L5_N B18_L3_N
BANK115_TX1_N BANK115_RX1_N B18_L6_P B18_L2_P
BANK115_TX1_P BANK115_RX1_P B18_L6_N B18_L2_N
BANK115_TX2_N BANK115_RX2_N B18_L7_P B18_L1_P
BANK115_TX2_P BANK115_RX2_P B18_L7_N B18_L1_N
B18_L8_P B18_L4_P
BANK115_TX3_N BANK115_RX3_N B18_L8_N B18_L4_N
BANK115_TX3_P BANK115_RX3_P
B18_L9_P B18_L12_P
BANK115_CLK0_N B18_L9_N B18_L12_N
BANK115_CLK0_P B18_L16_P B18_L10_P
B18_L16_N B18_L10_N
BANK116_TX0_N BANK116_RX0_N
BANK116_TX0_P BANK116_RX0_P B18_L18_P B18_L20_P
B18_L18_N B18_L20_N
BANK116_TX1_N BANK116_RX1_N B18_L15_P B18_L11_P
BANK116_TX1_P BANK116_RX1_P B18_L15_N B18_L11_N
BANK116_TX2_N BANK116_RX2_N B18_L23_P B18_L21_P
BANK116_TX2_P BANK116_RX2_P B18_L23_N B18_L21_N
B18_L17_P B18_L22_P
BANK116_TX3_N BANK116_RX3_N B18_L17_N B18_L22_N
BANK116_TX3_P BANK116_RX3_P
B18_L24_P B17_L5_N
BANK116_CLK0_N BANK116_CLK1_N B18_L24_N B17_L5_P
BANK116_CLK0_P BANK116_CLK1_P B18_L19_P B17_L15_P
B18_L19_N B17_L15_N
BANK117_TX0_N BANK118_TX0_N
BANK117_TX0_P BANK118_TX0_P B17_L17_P B17_L14_P
B17_L17_N B17_L14_N
BANK117_RX0_N BANK118_RX0_N B17_L1_P B17_L20_P
BANK117_RX0_P BANK118_RX0_P B17_L1_N B17_L20_N
BANK117_TX1_N BANK118_TX1_N B17_L22_N B17_L21_P
BANK117_TX1_P BANK118_TX1_P B17_L22_P B17_L21_N
B17_L8_P B17_L13_P
BANK117_RX1_N BANK118_RX1_N B17_L8_N B17_L13_N
BANK117_RX1_P BANK118_RX1_P
B17_L24_P B17_L23_N
BANK117_TX2_N BANK118_TX2_N B17_L24_N B17_L23_P
BANK117_TX2_P BANK118_TX2_P B17_L18_N B17_L12_P
B17_L18_P B17_L12_N
BANK117_RX2_N BANK118_RX2_N
BANK117_RX2_P BANK118_RX2_P B17_L19_N B17_L11_N
B17_L19_P B17_L11_P
BANK117_TX3_N BANK118_TX3_N B17_L10_N B17_L9_N
BANK117_TX3_P BANK118_TX3_P B17_L10_P B17_L9_P
BANK117_RX3_N BANK118_RX3_N B17_L16_N B17_L7_P
BANK117_RX3_P BANK118_RX3_P B17_L16_P B17_L7_N
B17_L2_N B17_L3_N
BANK117_CLK0_N BANK118_CLK0_N B17_L2_P B17_L3_P
BANK117_CLK0_P BANK118_CLK0_P
B17_L4_N FPGA_TCK
B17_L4_P FPGA_TMS
B17_L6_P FPGA_TDO
B17_L6_N FPGA_TDI
BANK115_CLK1_N
BANK115_CLK1_P
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