Closed
Description
While using DSignal (delayed signals) and generating VHDL for a simple design, i get warnings like this :
WARNING: file src/Clash/Core/Subst.hs, line 345
inScope {a3530822107858468865}
tenv [3530822107858468865 :-> a3530822107858468865]
tys k03530822107858468864
-> a3530822107858468865 -> GHC.Prim.TYPE GHC.Types.LiftedRep
needsInScope {k03530822107858468864}
WARNING: file src/Clash/Core/Subst.hs, line 345
inScope {a3530822107858468865}
tenv [3530822107858468865 :-> a3530822107858468865]
tys k03530822107858468864
-> a3530822107858468865 -> GHC.Prim.TYPE GHC.Types.LiftedRep
needsInScope {k03530822107858468864}
WARNING: file src/Clash/Core/Subst.hs, line 345
inScope {a3530822107858468865}
tenv [3530822107858468865 :-> a3530822107858468865]
tys k03530822107858468864
-> a3530822107858468865 -> GHC.Prim.TYPE GHC.Types.LiftedRep
needsInScope {k03530822107858468864}
WARNING: file src/Clash/Core/Subst.hs, line 345
inScope {a3530822107858468865}
tenv [3530822107858468865 :-> a3530822107858468865]
tys k03530822107858468864
-> a3530822107858468865 -> GHC.Prim.TYPE GHC.Types.LiftedRep
needsInScope {k03530822107858468864}
Code being synthesized is:
function vx vy = res
where
res = if' (vel_sqr !>=! (ad_Off zero_DS vel_sqr)) vel_sqr (ad_Off zero_DS vel_sqr)
vel_sqr = (sqr_DS vx) !+! (sqr_DS vy)
There are a lot of function definitions used here. These functions are mentioned below :
class DS_Num t where
type Lat_Add t :: Nat
type Lat_Sqr t :: Nat
-- DSignal Addition operator (both DSignal)
(!+!) :: forall domain n1 n2 n3 n4 gated sync.
(HiddenClockReset domain gated sync, n3 ~ (Max n1 n2),
(n2 <= n3), (n1 <= n3), n4 ~ (n3 + Lat_Add t),
KnownNat n1, KnownNat n2, KnownNat n3)
=> DSignal domain n1 t
-> DSignal domain n2 t
-> DSignal domain n4 t
-- DSignal Square operator
sqr_DS :: forall domain n1 gated sync.
(HiddenClockReset domain gated sync, KnownNat n1)
=> DSignal domain n1 t
-> DSignal domain (n1 + Lat_Sqr t) t
class DS_Inequality t where
type Lat_ge t :: Nat
-- DSignal Greater than equal to operator (both DSignal)
(!>=!) :: forall domain n1 n2 n3 n4 gated sync.
(HiddenClockReset domain gated sync, n3 ~ (Max n1 n2),
(n2 <= n3), (n1 <= n3), n4 ~ (n3 + Lat_ge t),
KnownNat n1, KnownNat n2, KnownNat n3)
=> DSignal domain n1 t
-> DSignal domain n2 t
-> DSignal domain n4 Bool
instance DS_Num Float where
type Lat_Add Float = 3
type Lat_Sqr Float = 3
(!+!) = fp_Add_single_elem
sqr_DS = fp_Sqr_single_elem
instance DS_Inequality Float where
type Lat_ge Float = 0
(!>=!) = comp_function (ge_float)
ge_float :: Signal domain Float -> Signal domain Float -> Signal domain Bool
ge_float a b = a .>=. b
{-# NOINLINE ge_float #-}
fp_Add_single_elem a b = unsafeFromSignal out
where
(x,y) = sync_2signals a b
x' = toSignal x
y' = toSignal y
out = fpadd_single x' y'
fp_Sqr_single_elem a = unsafeFromSignal out
where
a' = toSignal a
out = fpsqr_single a'
fpadd_single a b = register 0.0 (
register 0.0 (
register 0.0 (a+b)))
{-# NOINLINE fpadd_single #-}
fpsqr_single a = register 0.0 (
register 0.0 (
register 0.0 ((a*a))))
Some supporting functions used above are also mentioned below ::
-- Function used to adjust the offset of a DSignal with respect to other signal
ad_Off :: KnownNat n2
=> (forall n1. KnownNat n1 => DSignal domain n1 b)
-> DSignal domain n2 a
-> DSignal domain n2 b
ad_Off x y = x
-- if statement working on DSignals
-- automatically synchronizes the input signals
if' :: forall a domain gated sync n1 n2 n3 n4.
(HiddenClockReset domain gated sync,
n4 ~ (Max n3 (Max n1 n2)),
(n1 <= n4), (n2 <= n4), (n3 <= n4),
Undefined a, KnownNat n1,
KnownNat n2, KnownNat n3, KnownNat n4)
=> DSignal domain n1 Bool
-> DSignal domain n2 a
-> DSignal domain n3 a
-> DSignal domain n4 a
if' c t f = unsafeFromSignal out
where
(c', t', f') = sync_3signals c t f
cond = toSignal c'
t_val = toSignal t'
f_val = toSignal f'
out = mux cond t_val f_val
-- Function used to synchronize three signals using registers on either signal
sync_3signals :: forall a b c domain gated sync n1 n2 n3 n4.
(HiddenClockReset domain gated sync,
n4 ~ (Max n3 (Max n1 n2)),
(n1 <= n4), (n2 <= n4), (n3 <= n4),
Undefined a, KnownNat n1,
Undefined b, KnownNat n2,
Undefined c, KnownNat n3,
KnownNat n4)
=> DSignal domain n1 a
-> DSignal domain n2 b
-> DSignal domain n3 c
-> (DSignal domain n4 a, DSignal domain n4 b, DSignal domain n4 c)
sync_3signals as bs cs = (delayedI' @a @(n4-n1) as, delayedI' @b @(n4-n2) bs, delayedI' @c @(n4-n3) cs)
zero_DS :: forall n1 domain a.
(KnownNat n1, Num a)
=> DSignal domain n1 a
zero_DS = unsafeFromSignal (pure 0)
Any idea what might be the possible cause of these warnings?