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| 1 | +Patch originally From: Yimin Gu < [email protected]> |
| 2 | +--- |
| 3 | + Rules.mak | 2 ++ |
| 4 | + extra/Configs/Config.in | 9 +++++++++ |
| 5 | + extra/Configs/Config.riscv32 | 14 ++++++++++++++ |
| 6 | + libc/sysdeps/linux/riscv32 | 1 + |
| 7 | + libc/sysdeps/linux/riscv64/bits/wordsize.h | 3 ++- |
| 8 | + libc/sysdeps/linux/riscv64/sys/asm.h | 6 +++++- |
| 9 | + 6 files changed, 33 insertions(+), 2 deletions(-) |
| 10 | + create mode 100644 extra/Configs/Config.riscv32 |
| 11 | + create mode 120000 libc/sysdeps/linux/riscv32 |
| 12 | + |
| 13 | +diff --git a/Rules.mak b/Rules.mak |
| 14 | +index 3fb64c728..71a14fc38 100644 |
| 15 | +--- a/Rules.mak |
| 16 | ++++ b/Rules.mak |
| 17 | +@@ -305,6 +305,7 @@ ifneq ($(TARGET_ARCH),c6x) |
| 18 | + ifneq ($(TARGET_ARCH),h8300) |
| 19 | + ifneq ($(TARGET_ARCH),arc) |
| 20 | + ifneq ($(TARGET_ARCH),aarch64) |
| 21 | ++ifneq ($(TARGET_ARCH),riscv32) |
| 22 | + CPU_CFLAGS-y += -msoft-float |
| 23 | + endif |
| 24 | + endif |
| 25 | +@@ -316,6 +317,7 @@ endif |
| 26 | + endif |
| 27 | + endif |
| 28 | + endif |
| 29 | ++endif |
| 30 | + |
| 31 | + ifeq ($(TARGET_ARCH),aarch64) |
| 32 | + CPU_CFLAGS-y += -ftls-model=initial-exec |
| 33 | +diff --git a/extra/Configs/Config.in b/extra/Configs/Config.in |
| 34 | +index a58ceb265..5e6af800d 100644 |
| 35 | +--- a/extra/Configs/Config.in |
| 36 | ++++ b/extra/Configs/Config.in |
| 37 | +@@ -39,6 +39,7 @@ choice |
| 38 | + default TARGET_or1k if DESIRED_TARGET_ARCH = "or1k" |
| 39 | + default TARGET_powerpc if DESIRED_TARGET_ARCH = "powerpc" |
| 40 | + default TARGET_riscv64 if DESIRED_TARGET_ARCH = "riscv64" |
| 41 | ++ default TARGET_riscv32 if DESIRED_TARGET_ARCH = "riscv32" |
| 42 | + default TARGET_sh if DESIRED_TARGET_ARCH = "sh" |
| 43 | + default TARGET_sparc if DESIRED_TARGET_ARCH = "sparc" |
| 44 | + default TARGET_sparc64 if DESIRED_TARGET_ARCH = "sparc64" |
| 45 | +@@ -125,6 +126,9 @@ config TARGET_powerpc |
| 46 | + config TARGET_riscv64 |
| 47 | + bool "riscv64" |
| 48 | + |
| 49 | ++config TARGET_riscv32 |
| 50 | ++ bool "riscv32" |
| 51 | ++ |
| 52 | + config TARGET_sh |
| 53 | + bool "superh" |
| 54 | + |
| 55 | +@@ -240,6 +244,10 @@ if TARGET_riscv64 |
| 56 | + source "extra/Configs/Config.riscv64" |
| 57 | + endif |
| 58 | + |
| 59 | ++if TARGET_riscv32 |
| 60 | ++source "extra/Configs/Config.riscv32" |
| 61 | ++endif |
| 62 | ++ |
| 63 | + if TARGET_sh |
| 64 | + source "extra/Configs/Config.sh" |
| 65 | + endif |
| 66 | +@@ -538,6 +546,7 @@ config UCLIBC_HAS_LINUXTHREADS |
| 67 | + select UCLIBC_HAS_REALTIME |
| 68 | + depends on !TARGET_aarch64 && \ |
| 69 | + !TARGET_riscv64 && \ |
| 70 | ++ !TARGET_riscv32 && \ |
| 71 | + !TARGET_metag |
| 72 | + help |
| 73 | + If you want to compile uClibc with Linuxthreads support, then answer Y. |
| 74 | +diff --git a/extra/Configs/Config.riscv32 b/extra/Configs/Config.riscv32 |
| 75 | +new file mode 100644 |
| 76 | +index 000000000..304d30f70 |
| 77 | +--- /dev/null |
| 78 | ++++ b/extra/Configs/Config.riscv32 |
| 79 | +@@ -0,0 +1,14 @@ |
| 80 | ++# |
| 81 | ++# For a description of the syntax of this configuration file, |
| 82 | ++# see extra/config/Kconfig-language.txt |
| 83 | ++# |
| 84 | ++ |
| 85 | ++config TARGET_ARCH |
| 86 | ++ string |
| 87 | ++ default "riscv32" |
| 88 | ++ |
| 89 | ++config FORCE_OPTIONS_FOR_ARCH |
| 90 | ++ bool |
| 91 | ++ default y |
| 92 | ++ select ARCH_LITTLE_ENDIAN |
| 93 | ++ select ARCH_HAS_MMU |
| 94 | +diff --git a/libc/sysdeps/linux/riscv32 b/libc/sysdeps/linux/riscv32 |
| 95 | +new file mode 120000 |
| 96 | +index 000000000..11677ef05 |
| 97 | +--- /dev/null |
| 98 | ++++ b/libc/sysdeps/linux/riscv32 |
| 99 | +@@ -0,0 +1 @@ |
| 100 | ++riscv64 |
| 101 | +\ No newline at end of file |
| 102 | +diff --git a/libc/sysdeps/linux/riscv64/bits/wordsize.h b/libc/sysdeps/linux/riscv64/bits/wordsize.h |
| 103 | +index 67a16ba62..1fc649aad 100644 |
| 104 | +--- a/libc/sysdeps/linux/riscv64/bits/wordsize.h |
| 105 | ++++ b/libc/sysdeps/linux/riscv64/bits/wordsize.h |
| 106 | +@@ -25,5 +25,6 @@ |
| 107 | + #if __riscv_xlen == 64 |
| 108 | + # define __WORDSIZE_TIME64_COMPAT32 1 |
| 109 | + #else |
| 110 | +-# error "rv32i-based targets are not supported" |
| 111 | ++# define __WORDSIZE_TIME64_COMPAT32 1 |
| 112 | ++// # warning "rv32i-based targets are experimental" |
| 113 | + #endif |
| 114 | +diff --git a/libc/sysdeps/linux/riscv64/sys/asm.h b/libc/sysdeps/linux/riscv64/sys/asm.h |
| 115 | +index ddb84b683..3c94c9a70 100644 |
| 116 | +--- a/libc/sysdeps/linux/riscv64/sys/asm.h |
| 117 | ++++ b/libc/sysdeps/linux/riscv64/sys/asm.h |
| 118 | +@@ -26,7 +26,11 @@ |
| 119 | + # define REG_S sd |
| 120 | + # define REG_L ld |
| 121 | + #elif __riscv_xlen == 32 |
| 122 | +-# error "rv32i-based targets are not supported" |
| 123 | ++# define PTRLOG 2 |
| 124 | ++# define SZREG 4 |
| 125 | ++# define REG_S sw |
| 126 | ++# define REG_L lw |
| 127 | ++// # warning "rv32i-based targets are experimental" |
| 128 | + #else |
| 129 | + # error __riscv_xlen must equal 32 or 64 |
| 130 | + #endif |
| 131 | +-- |
| 132 | +2.37.1 |
| 133 | + |
| 134 | + |
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