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cmd/compile: loop invariant code motion #64815
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The implementation consists of {Loop Invariant Code Motion, Loop Rotation, Type-based Alias Analysis, Loop Closed SSA Form} Testing: attached IR tests, codegen, go test, ssacheck, golang/benchmarks, go-http-routing-benchmark Co-authored-by: [email protected] Co-authored-by: [email protected] Co-authored-by: [email protected] Co-authored-by: [email protected] Updates golang#63670
This PR (HEAD: 07403a6) has been imported to Gerrit for code review. Please visit Gerrit at https://go-review.googlesource.com/c/go/+/551381. Important tips:
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@y1yang0 please can you explain me what your changes is about |
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codegen/issue58166.go fails, it expected loop increment to generate incq, but instead, it ended up generating leaq+mov. During register allocation, v114 couldn't be allocated to the same register r8 as v149, due to the fact that there were two uses of v114 (v136 and v146) right after v149. As a result, unexpected instructions were produced. b26: v149 = ADDQconst <int> [1] v114 v135 = MULSD <float64> v87 v123 v136 = ADDSDloadidx8 <float64> v135 v50 v114 v160 ;;use of v114 v146 = MOVSDstoreidx8 <mem> v50 v114 v136 v160 ;; use of v114 v91 = CMPQ <flags> v15 v149 After loop rotation, the schedule pass calculated scores for b26, resulting in the following order: Before schedule: b26: v135 (12) = MULSD <float64> v87 v123 v136 (12) = ADDSDloadidx8 <float64> v135 v50 v114 v160 v146 (12) = MOVSDstoreidx8 <mem> v50 v114 v136 v160 v149 (+11) = ADDQconst <int> [1] v114 v91 (+11) = CMPQ <flags> v15 v149 After schedule: b26: v149 = ADDQconst <int> [1] v114 v135 = MULSD <float64> v87 v123 v136 = ADDSDloadidx8 <float64> v135 v50 v114 v160 v146 = MOVSDstoreidx8 <mem> v50 v114 v136 v160 v91 = CMPQ <flags> v15 v149 An optimization was made as per CL 463751, which prioritizes values that are used within their live blocks. Since v149 is used by v91 in the same block, it has a higher priority. The proposed fix is that if a value is used by a control value, then it should have the lowest priority. This would allow v146 and v91 to be scheduled closely together. After this scheduling, there would be no use of v114 after v146, thus allowing v146 and v114 to be allocated to the same register, ultimately generating an incq instruction.
func f4(x *[10]int) { ... _ = x[9] // ERROR "generated nil check" for { if x[9] != 0 { // ERROR "removed nil check" break } } } Loop rotation duplicates conditional test Values into loop gaurd block: ... loopGuard: v6 (+159) = NilCheck <*[10]int> v5 v1 v15 (159) = OffPtr <*int> [72] v6 v9 (159) = Load <int> v15 v1 v7 (159) = Neq64 <bool> v9 v13 If v7 → b5 loopHeader loopHeader: v8 (+159) = NilCheck <*[10]int> v5 v1 v11 (159) = OffPtr <*int> [72] v8 v12 (159) = Load <int> v11 v1 v14 (159) = Neq64 <bool> v12 v13 Plain → b3 So we need to add a loop nilcheckelim pass after all other loop opts to remove the v6 NilCheck in the loop guard, but that's not the whole story. The code _ = x[9] is expected to generate a nilcheck, buttighten pass will move the LoweredNilCheck from the loop entry b1 to the loop guard. At that point, there happens to be a CMPQconstload in the loop guard that meets the conditions for late nilcheckelim, resulting in the elimination of the LoweredNilCheck as well. Therefore, we also need to modify the test to no longer expect the generated code to contain a nilcheck.
This PR (HEAD: 30e0fea) has been imported to Gerrit for code review. Please visit Gerrit at https://go-review.googlesource.com/c/go/+/551381. Important tips:
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The implementation consists of {Loop Invariant Code Motion, Loop Rotation, Type-based Alias Analysis, Loop Closed SSA Form}
Testing: attached IR tests, codegen, go test, ssacheck, golang/benchmarks, go-http-routing-benchmark
Co-authored-by: [email protected]
Co-authored-by: [email protected]
Co-authored-by: [email protected]
Co-authored-by: [email protected]
Updates #63670