⚠️ simplify UART and SDI modules

[stnolting]

UART0 & UART1

• remove RX/TX FIFO "half-full" status flags
• simply interrupt conditions
  • RX FIFO not empty (data available)
  • RX FIFO full
  • TX FIFO empty
  • TX FIFO not full
• massive code rework
• rework control and data register layouts
• minor logic optimizations and code-cleanups

SDI

• remove RX/TX FIFO "half-full" status flags
• simply interrupt conditions
  • RX FIFO not empty (data available)
  • RX FIFO full
  • TX FIFO empty
• rework control register layout
• minor logic optimizations and code-cleanups