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RISC-V & Space and Aerospace

Space and Aerospace markets require high-performance, secure processing to handle emerging AI workloads such as fully autonomous management and on-board science compute. Domain-specific requirements call for high reliability, fault tolerance in harsh environments, functional safety, and optimized energy consumption. As the market shifts towards a more agile public-private partnership model and increasingly becomes a vital part of critical infrastructure, there is a growing demand for sovereign technology supported by robust, resilient, and preferably local supply chains.

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RISC-V is the single industry standard ISA that scales fully across space and aerospace use cases

Unique customization permits workload-appropriate processor implementations to address the specific and exacting segment needs.  As a non-proprietary ISA, RISC-V empowers users through technology sovereignty and a robust supply chain ecosystem.

Video: RISC-V: Reaching New Orbits in Space Computing

Lucana Santos, Microelectronics Engineer, ESA.

Learn how ESA is increasingly using RISC-V in space missions, driving its adoption through new SoCs and supporting IP cores, software, and the UDSM initiative. These efforts leverage RISC-V’s open and flexible nature to innovate, reduce proprietary reliance, and enhance space industry sustainability.

RISC-V is the single industry standard ISA that scales across the full scope of space and aerospace use cases

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Global Standard

RISC-V is a global standard adopted by multiple diverse industry sectors and steered via a collaborative effort from respected  technology leaders

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Scalable

RISC-V is the single ISA that scales across Space and Aerospace use cases, from low-power on-board sensors and edge AI to powerful, ground systems and HPC modelling, allowing for end-to-end toolchains and software reuse

Open Ecosystem

RISC-V already has a capable and growing ecosystem of open source software providers active in close adjacent segments with similar market requirements, such as IoT,  Edge AI, Automotive, and HPC

Dissimilarity

Deploying devices with comparable performance, but built on an alternative ISA provides dissimilarity. This enhances system redundancy and ultimately improves safety

The RISC-V ISA is customizable for workload-appropriate implementations that meet the domain-specific needs of the space and aerospace sectors

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Resource Efficient

RISC-V’s unique customization by extensions enhances processor efficiency, enabling complex compute in use cases where power consumption is highly constrained

Fault Tolerant

RISC-V implementations can be customized through extensions to prioritize reliability and fault-tolerant feature sets, crucial attributes in harsh and remote environments

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Enhanced Security

An open industry standard  ISA provides transparency, mitigating the risk of hidden security vulnerabilities. Customization simplifies the implementation of bespoke, domain-specific security features

Functional Safety

Customization permits the deployment of processor level functional safety features that can then be certified to the appropriate ISO standards

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AI Native

Built for vectorization, the RISC-V ISA provides custom instructions and domain-specific acceleration to address Edge AI compute workloads in remote locations

RISC-V promotes technology sovereignty and supply chain resilience

Non-proprietary ISA

A Non-proprietary ISA strengthens technology sovereignty in allowing operators to customize without the need to rely on a select few commercial entities

Vendor Choice

In a market traditionally served by a very small number of vendors, RISC-V opens up user choice and avoids single vendor lock-in issues

Supply Chain Stability

RISC-V has already been adopted and embraced by stable well established chip suppliers with long experience in the segment and close adjacent markets

Collaborative Community

RISC-V’s collaborative open community, spanning commercial, state, scientific, and academic bodies, aligns with the new mission paradigm of multiple short projects and joint cooperation between government and private sectors

Hear From Our Members About Space, Aerospace, and RISC-V

Explore the Latest RISC-V Space and Aerospace Content

NASA, Google, AWS Join Stellar Line-up for RISC-V Summit North America 2025

RISC-V Summit North America 2025 will bring the global RISC-V community together in Santa Clara for two days of keynotes, technical sessions, workshops, and demos.

Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions

As modern space missions evolve in complexity, the role of software onboard spacecraft is undergoing a dramatic transformation. Spacecraft are no longer limited to basic telemetry and remote control. Today, onboard computing must support autonomous decision-making, intelligent…

Microchip Unveils Industry’s Highest Performance 64-bit HPSC Microprocessor (MPU) Family for a New Era of Autonomous Space Computing

CHANDLER, Ariz., JULY 9, 2024 — The world has changed dramatically in the two decades since the debut of what was then considered a trail-blazing space-grade processor used in NASA missions such as the comet-chasing…

Eight core RISC-V processor and TSN switch for AI space designs

Microchip is qualifying an eight core fault tolerant RISC-V processor for AI in space applications. The radiation tolerant PIC64-HSPC octal core 1.2GHz switch provides 26K DMIPS and is built on a 12nm FINFET process at…