INNOSILICA

🚀 INNOSILICA is Hiring! Engineering Roles Across All Domains 🚀 Hi LinkedIn Members, INNOSILICA is looking for talented engineers who can efficiently solve design challenges and take ownership of their work. We have openings across multiple domains, and we welcome passionate professionals who are eager to contribute to our growing team. We are currently working on in-house projects, so we are looking for engineers who can quickly understand requirements, take independent responsibility, and deliver effective solutions. If you are interested, please click the link below and apply: 👉 Apply Here: https://lnkd.in/gNu447DQ Join INNOSILICA and be part of our innovation-driven environment! #Innosilica #Hiring #EngineeringJobs #Semiconductor #Embedded #Software #Careers #DesignEngineering #InHouseProjects #ApplyNow

📢 We’re Hiring – Complete VLSI Project Team (8+ Years Experience Required) We are looking for a full in-house VLSI design team for our upcoming project. We are hiring experienced professionals (8+ years) who have previously handled and mentored junior engineers in the following domains: -Packaging -RTL Design -Design Verification (DV) -DFT -Synthesis -Physical Design (PnR) -Physical Verification (PV) -Timing Signoff -EM/IR Analysis If you meet the above experience and leadership criteria, please send your resume to: [email protected] 📩 Apply Now & Be Part of Our Growing Team!

🚀 We Are Hiring – DFT Engineer (4+ Years Experience) We are looking for a Design For Test (DFT) Engineer with 4 years of hands-on experience in semiconductor design and verification. 📍 Location: Bangalore / Hyderabad 💼 Experience: 4+ years 🧩 Skills Required: Scan insertion, ATPG, MBIST, and JTAG Good analytical and problem-solving skills. If you are passionate about semiconductor design and eager to work on cutting-edge projects, we’d love to hear from you! 📩 Interested candidates can share their resume at: 👉 [email protected] Let’s innovate together! 💡 #Hiring #DFT #Semiconductor #VLSI #DesignForTest #JobOpening #CareerOpportunity

✨ Celebrating the festival of lights with our incredible Innosilica team! 🪔 Wishing everyone a Diwali filled with joy, prosperity, and endless possibilities. May the light of innovation continue to guide us toward new horizons. Happy Diwali from all of us at Innosilica! 🎇 #HappyDiwali #Diwali2025 #Innosilica #TeamSpirit #FestivalOfLights #CelebratingTogether

🚀 FINAL CALL: VLSI Internship Selection Program 🚀 Are you a VLSI engineer ready to take your career to the next level? This is your last chance to apply! 📋 What We Offer: A comprehensive one-month training program in November 2025 that goes beyond technical skills. You'll be evaluated through: 📊 Professional PPT Presentations 🎤 Industry-Standard Mock Interviews 💬 Collaborative Group Discussions 🎯 Who Can Apply: Candidates with training background in: ✅ Synthesis ✅ Physical Design ✅ Static Timing Analysis (STA) 🏆 The Selection Edge: Top 10 performers will earn spots in our prestigious internship program. Your dedication, technical expertise, and communication skills will set you apart. ⏰ Critical Timeline: 📅 Application Deadline: October 20, 2025 (Just 4 days left!) 📅 Training Begins: November 2025 🔗 Apply Here: https://lnkd.in/gtSKhhNz This is more than just an internship—it's a launchpad for your semiconductor career. Work alongside industry experts, gain hands-on experience, and build connections that matter. ⚡ Don't wait—your future in VLSI starts now! #VLSIInternship #PhysicalDesign #STA #Synthesis #SemiconductorCareers #EngineeringOpportunity #HiringNow #VLSIJobs #ChipDesign #InternshipAlert #CareerGrowth #TechCareers #LastChanceToApply

🚀 Internship Opportunity Alert! 🚀 We're excited to announce our exclusive Internship Selection Program designed for VLSI enthusiasts! 📋 Program Overview: Join us for an intensive one-month training program in November, where you'll undergo comprehensive evaluation through: 📊 PPT Presentations 🎤 Mock Interviews 💬 Group Discussions 🎯 Eligibility Criteria: Candidates must have completed training in: ✅ Synthesis ✅ Physical Design ✅ STA (Static Timing Analysis) 🏆 Selection Process: Based on your performance throughout the training period, the Top 10 candidates will be selected for our prestigious internship program. ⏰ Important Dates: 📅 Application Deadline: October 20, 2025 📅 Training Program: November 2025 🔗 Apply Now: https://lnkd.in/gtSKhhNz This is your opportunity to showcase your skills, learn from industry experts, and secure a position in our internship program! Don't miss out – Apply before the deadline! #Internship #VLSIJobs #PhysicalDesign #STA #Synthesis #CareerOpportunity #HiringAlert #EngineeringJobs #SemiconductorIndustry #InternshipProgram

✨ On this Dussehra 2025, may the triumph of good over evil inspire success and positivity. 🌸 Warm wishes from the Innosilica family — Happy Dussehra 2025!

🚀 We’re Hiring: Physical Design Engineer (4+ Years Experience) 🧠💻 Are you an experienced Physical Design Engineer with 4+ years of hands-on expertise in block-level implementation, STA, and physical verification? Join our growing team and contribute to cutting-edge semiconductor technologies! 🔍 What We’re Looking For: ✅ 4+ years of experience in Physical Design (RTL to GDSII) ✅ Strong knowledge of STA, CTS, placement, routing & sign-off ✅ Hands-on experience with tools like Cadence Innovus, PrimeTime, Calibre ✅ Scripting skills (TCL, Perl, Python) a strong plus ✅ Experience in advanced nodes (7nm/5nm/3nm) is a big advantage 📩 Apply Now: Send your resume to [email protected] #Hiring #VLSI #Semiconductors #PhysicalDesign #STA #Innosilica #Careers

🚀 We're Hiring: Physical Design Engineer (2 Years Experience) 🧠💻 Are you a passionate Physical Design Engineer with around 2 years of hands-on experience in block-level implementation, STA, and physical verification? Join our growing team and work on cutting-edge semiconductor technologies! 🔍 What We're Looking For: 2+ years of experience in Physical Design (RTL to GDSII) Strong knowledge of STA, CTS, placement, routing & sign-off Hands-on with tools like Cadence Innovus, PrimeTime, Calibre Scripting skills (TCL, Perl, Python) a strong plus Experience in advanced nodes (7nm/5nm/3nm) is a bonus 📩 Apply now: Send your resume to [email protected]

📢 Hiring Update – Innosilica We have sent online test invitations to all eligible candidates via email. 📧 Please check your inbox and spam folder to ensure you don’t miss it. #Innosilica #HiringUpdate #OnlineTest #CareerOpportunity #SemiconductorJobs