#ifndef PWM_CFG_H_ #define PWM_CFG_H_ #define PWM_INPUT_NUM 4 #define PWM_OUTPUT_NUM 0 #include "IfxGtm_PinMap.h" //Definitions of input channel ID and corresponding pin configurations #define PWM_INPUT_P02_00_ID 0x0200 #define PWM_INPUT_P02_00_CFG_PTR &IfxGtm_TIM0_0_P02_0_IN #define PWM_INPUT_P01_04_ID 0x0104 #define PWM_INPUT_P01_04_CFG_PTR &IfxGtm_TIM0_6_P01_4_IN #define PWM_INPUT_P00_06_ID 0x0006 #define PWM_INPUT_P00_06_CFG_PTR &IfxGtm_TIM2_5_P00_6_IN #define PWM_INPUT_P02_11_ID 0x020B #define PWM_INPUT_P02_11_CFG_PTR &IfxGtm_TIM0_7_P02_11_IN #define PWM_INPUT_P02_04_ID 0x0204 #define PWM_INPUT_P02_04_CFG_PTR &IfxGtm_TIM0_4_P02_4_IN #define PWM_INPUT_P02_09_ID 0x0209 #define PWM_INPUT_P02_09_CFG_PTR &IfxGtm_TIM0_2_P02_9_IN #endif /* PWM_CFG_H_ */

时间: 2025-07-11 22:35:31 浏览: 6
<think>嗯,用户给了一段C语言的头文件代码,还让我解释一下。首先,我需要仔细看看这段代码的结构和内容。看起来像是一个PWM配置的头文件,里面有很多宏定义和包含的文件。 首先,代码开头用了#ifndef PWM_CFG_H_,然后是#define PWM_CFG_H_,这是典型的头文件保护,防止重复包含。这部分我应该解释清楚它的作用,避免用户还不了解这种预处理指令的作用。 接下来是#define PWM_INPUT_NUM 4和PWM_OUTPUT_NUM 0,这里定义了输入通道的数量和输出通道的数量。输入是4,输出是0,可能这个配置是用于输入捕获,比如测量PWM信号的频率或占空比。需要解释这两个宏的意义,以及为什么输出是0。 然后是#include "IfxGtm_PinMap.h",这个头文件可能包含了GTM模块的引脚映射配置,GTM可能是某个微控制器的定时器模块,比如Infineon的Aurix系列中的GTM(Generic Timer Module)。用户可能是在使用Infineon的芯片,所以需要提到这一点。 接下来的几个宏定义,比如PWM_INPUT_P02_00_ID和对应的CFG_PTR,看起来是定义了不同输入通道的ID和配置指针。每个ID的数值像是将端口号和引脚号组合成的,比如0x0200可能是端口02,引脚00的组合,用十六进制表示。而配置指针指向了IfxGtm_TIM0_0_P02_0_IN这样的结构体,这些结构体应该是在IfxGtm_PinMap.h中定义的,用于配置定时器输入通道的引脚映射。 需要解释每个宏的作用,比如ID可能用于标识不同的通道,而CFG_PTR则用于初始化或配置对应的硬件寄存器。另外,不同的TIM0_0、TIM0_6等可能对应不同的定时器通道,需要说明这些通道如何与引脚关联。 用户可能需要了解这段代码在项目中的作用,比如配置PWM输入通道的参数,以及如何通过这些宏来管理不同的输入信号。同时,输出通道数为0可能意味着这个模块只用于输入,不产生PWM输出,这点也需要指出。 可能用户是在开发嵌入式系统,特别是使用Infineon的Aurix系列微控制器,涉及到PWM信号的输入捕获功能。他们可能想了解如何配置这些通道,或者为什么某些引脚被这样定义。 另外,需要注意代码中的每个部分对应的硬件模块和功能,比如GTM的定时器通道如何映射到具体引脚,以及这些配置在代码中如何使用。可能需要提到,这些配置通常结合底层驱动库使用,以实现具体的功能。 最后,要确保解释清晰,结构分明,分步骤或分部分讲解每个代码段的作用,帮助用户理解整个头文件的结构和用途。</think>以下是对代码的逐层解析: 1. **头文件保护机制** ```c #ifndef PWM_CFG_H_ #define PWM_CFG_H_ ... #endif ``` - 作用:防止头文件被重复包含 - 技术细节:当预处理器首次遇到该文件时,`PWM_CFG_H_`未定义,执行后续内容。后续包含时由于宏已定义,直接跳过 2. **PWM通道配置** ```c #define PWM_INPUT_NUM 4 // 输入通道数量 #define PWM_OUTPUT_NUM 0 // 输出通道数量 ``` - 系统级配置:明确输入/输出通道数量 - 硬件对应:可能用于Infineon AURIX系列MCU的GTM模块(Generic Timer Module) 3. **硬件抽象层引用** ```c #include "IfxGtm_PinMap.h" ``` - 作用:包含底层硬件寄存器映射 - 典型内容:包含GTM模块的定时器输入/输出引脚配置结构体 4. **输入通道映射(核心配置)** ```c #define PWM_INPUT_P02_00_ID 0x0200 #define PWM_INPUT_P02_00_CFG_PTR &IfxGtm_TIM0_0_P02_0_IN ``` - **ID编码规则**: - 示例:`0x0200` = 端口02引脚00 - 通用格式:`0xPPDD`(PP=端口号,DD=引脚号) - **配置指针**: - 指向预定义的GTM配置结构体 - 例如:`IfxGtm_TIM0_0_P02_0_IN`表示: ```c TIM0通道0 // 定时器模块0的第0通道 Port02引脚0 // 物理引脚位置 Input模式 // 输入捕获功能 ``` 5. **配置扩展性分析** - **定时器通道复用**: ```c TIM0_0, TIM0_6 // 同一定时器模块的不同通道 TIM2_5 // 不同定时器模块 ``` - **端口分布**: ```c Port00, Port01, Port02 // 不同物理I/O端口的引脚复用 ``` 6. **工程应用建议** - **使用场景**:常见于电机控制、PWM信号采集等需要精确时间测量的系统 - **配置流程**: 1. 通过ID识别物理引脚 2. 使用CFG_PTR初始化硬件寄存器 3. 配合中断服务程序实现信号采集 7. **扩展方向** - 输出通道配置可参考类似结构: ```c #define PWM_OUTPUT_PXX_XX_CFG_PTR &IfxGtm_TOM0_0_PXX_X_OUT ``` - 可添加占空比/频率等运行时参数配置结构体 该配置文件体现了**硬件抽象层(HAL)**的设计思想,通过预定义配置实现了硬件相关性与应用逻辑的解耦。在实际工程中,这类配置通常与BSP(Board Support Package)协同工作,确保底层硬件变更时上层应用代码不受影响。
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/*--------------------------------------------------------------*/ /* FatFs module application interface */ FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */ FRESULT f_open (FIL*, const TCHAR*, BYTE); /* Open or create a file */ FRESULT f_read (FIL*, void*, UINT, UINT*); /* Read data from a file */ FRESULT f_lseek (FIL*, DWORD); /* Move file pointer of a file object */ FRESULT f_close (FIL*); /* Close an open file object */ FRESULT f_opendir (DIR*, const TCHAR*); /* Open an existing directory */ FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */ FRESULT f_stat (const TCHAR*, FILINFO*); /* Get file status */ FRESULT f_write (FIL*, const void*, UINT, UINT*); /* Write data to a file */ FRESULT f_getfree (const TCHAR*, DWORD*, FATFS**); /* Get number of free clusters on the drive */ FRESULT f_truncate (FIL*); /* Truncate file */ FRESULT f_sync (FIL*); /* Flush cached data of a writing file */ FRESULT f_unlink (const TCHAR*); /* Delete an existing file or directory */ FRESULT f_mkdir (const TCHAR*); /* Create a new directory */ FRESULT f_chmod (const TCHAR*, BYTE, BYTE); /* Change attriburte of the file/dir */ FRESULT f_utime (const TCHAR*, const FILINFO*); /* Change timestamp of the file/dir */ FRESULT f_rename (const TCHAR*, const TCHAR*); /* Rename/Move a file or directory */ FRESULT f_chdrive (BYTE); /* Change current drive */ FRESULT f_chdir (const TCHAR*); /* Change current directory */ FRESULT f_getcwd (TCHAR*, UINT); /* Get current directory */ FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*); /* Forward data to the stream */ FRESULT f_mkfs (BYTE, BYTE, UINT); /* Create a file system on the drive */ FRESULT f_fdisk (BYTE, const DWORD[], void*); /* Divide a physical drive into some partitions */ int f_putc (TCHAR, FIL*); /* Put a character to the file */ int f_puts (const TCHAR*, FIL*); /* Put a string to the file */ int f_printf (FIL*, const TCHAR*, ...); /* Put a formatted string to the file */ TCHAR* f_gets (TCHAR*, int, FIL*); /* Get a string from the file */ #define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0) #define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0) #define f_tell(fp) ((fp)->fptr) #define f_size(fp) ((fp)->fsize) #ifndef EOF #define EOF (-1) #endif /*--------------------------------------------------------------*/ /* Additional user defined functions */ /* RTC function */ #if !_FS_READONLY DWORD get_fattime (void); #endif /* Unicode support functions */ #if _USE_LFN /* Unicode - OEM code conversion */ WCHAR ff_convert (WCHAR, UINT); /* OEM-Unicode bidirectional conversion */ WCHAR ff_wtoupper (WCHAR); /* Unicode upper-case conversion */ #if _USE_LFN == 3 /* Memory functions */ void* ff_memalloc (UINT); /* Allocate memory block */ void ff_memfree (void*); /* Free memory block */ #endif #endif /* Sync functions */ #if _FS_REENTRANT int ff_cre_syncobj (BYTE, _SYNC_t*);/* Create a sync object */ int ff_req_grant (_SYNC_t); /* Lock sync object */ void ff_rel_grant (_SYNC_t); /* Unlock sync object */ int ff_del_syncobj (_SYNC_t); /* Delete a sync object */ #endif /*--------------------------------------------------------------*/ /* Flags and offset address */ /* File access control and file status flags (FIL.flag) */ #define FA_READ 0x01 #define FA_OPEN_EXISTING 0x00 #define FA__ERROR 0x80 #if !_FS_READONLY #define FA_WRITE 0x02 #define FA_CREATE_NEW 0x04 #define FA_CREATE_ALWAYS 0x08 #define FA_OPEN_ALWAYS 0x10 #define FA__WRITTEN 0x20 #define FA__DIRTY 0x40 #endif /* FAT sub type (FATFS.fs_type) */ #define FS_FAT12 1 #define FS_FAT16 2 #define FS_FAT32 3 /* File attribute bits for directory entry */ #define AM_RDO 0x01 /* Read only */ #define AM_HID 0x02 /* Hidden */ #define AM_SYS 0x04 /* System */ #define AM_VOL 0x08 /* Volume label */ #define AM_LFN 0x0F /* LFN entry */ #define AM_DIR 0x10 /* Directory */ #define AM_ARC 0x20 /* Archive */ #define AM_MASK 0x3F /* Mask of defined bits */ /* Fast seek feature */ #define CREATE_LINKMAP 0xFFFFFFFF /*--------------------------------*/ /* Multi-byte word access macros */ #if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */ #define LD_WORD(ptr) (WORD)(*(WORD*)(BYTE*)(ptr)) #define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr)) #define ST_WORD(ptr,val) *(WORD*)(BYTE*)(ptr)=(WORD)(val) #define ST_DWORD(ptr,val) *(DWORD*)(BYTE*)(ptr)=(DWORD)(val) #else /* Use byte-by-byte access to the FAT structure */ #define LD_WORD(ptr) (WORD)(((WORD)*((BYTE*)(ptr)+1)<<8)|(WORD)*(BYTE*)(ptr)) #define LD_DWORD(ptr) (DWORD)(((DWORD)*((BYTE*)(ptr)+3)<<24)|((DWORD)*((BYTE*)(ptr)+2)<<16)|((WORD)*((BYTE*)(ptr)+1)<<8)|*(BYTE*)(ptr)) #define ST_WORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *((BYTE*)(ptr)+1)=(BYTE)((WORD)(val)>>8) #define ST_DWORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *((BYTE*)(ptr)+1)=(BYTE)((WORD)(val)>>8); *((BYTE*)(ptr)+2)=(BYTE)((DWORD)(val)>>16); *((BYTE*)(ptr)+3)=(BYTE)((DWORD)(val)>>24) #endif #ifdef __cplusplus } #endif #endif /* _FATFS */ 根据头文件修改一下

/* * Copyright (c) 2020 - 2025 Renesas Electronics Corporation and/or its affiliates * * SPDX-License-Identifier: BSD-3-Clause */ /*******************************************************************************************************************//** * @ingroup RENESAS_TRANSFER_INTERFACES * @defgroup TRANSFER_API Transfer Interface * * @brief Interface for data transfer functions. * * @section TRANSFER_API_SUMMARY Summary * The transfer interface supports background data transfer (no CPU intervention). * * * @{ **********************************************************************************************************************/ #ifndef R_TRANSFER_API_H #define R_TRANSFER_API_H /*********************************************************************************************************************** * Includes **********************************************************************************************************************/ /* Common error codes and definitions. */ #include "bsp_api.h" /* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ FSP_HEADER /********************************************************************************************************************** * Macro definitions **********************************************************************************************************************/ #define TRANSFER_SETTINGS_MODE_BITS (30U) #define TRANSFER_SETTINGS_SIZE_BITS (28U) #define TRANSFER_SETTINGS_SRC_ADDR_BITS (26U) #define TRANSFER_SETTINGS_CHAIN_MODE_BITS (22U) #define TRANSFER_SETTINGS_IRQ_BITS (21U) #define TRANSFER_SETTINGS_REPEAT_AREA_BITS (20U) #define TRANSFER_SETTINGS_DEST_ADDR_BITS (18U) /********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ /** Transfer control block. Allocate an instance specific control block to pass into the transfer API calls. */ typedef void transfer_ctrl_t; #ifndef BSP_OVERRIDE_TRANSFER_MODE_T /** Transfer mode describes what will happen when a transfer request occurs. */ typedef enum e_transfer_mode { /** In normal mode, each transfer request causes a transfer of @ref transfer_size_t from the source pointer to * the destination pointer. The transfer length is decremented and the source and address pointers are * updated according to @ref transfer_addr_mode_t. After the transfer length reaches 0, transfer requests * will not cause any further transfers. */ TRANSFER_MODE_NORMAL = 0, /** Repeat mode is like normal mode, except that when the transfer length reaches 0, the pointer to the * repeat area and the transfer length will be reset to their initial values. If DMAC is used, the * transfer repeats only transfer_info_t::num_blocks times. After the transfer repeats * transfer_info_t::num_blocks times, transfer requests will not cause any further transfers. If DTC is * used, the transfer repeats continuously (no limit to the number of repeat transfers). */ TRANSFER_MODE_REPEAT = 1, /** In block mode, each transfer request causes transfer_info_t::length transfers of @ref transfer_size_t. * After each individual transfer, the source and destination pointers are updated according to * @ref transfer_addr_mode_t. After the block transfer is complete, transfer_info_t::num_blocks is * decremented. After the transfer_info_t::num_blocks reaches 0, transfer requests will not cause any * further transfers. */ TRANSFER_MODE_BLOCK = 2, /** In addition to block mode features, repeat-block mode supports a ring buffer of blocks and offsets * within a block (to split blocks into arrays of their first data, second data, etc.) */ TRANSFER_MODE_REPEAT_BLOCK = 3 } transfer_mode_t; #endif #ifndef BSP_OVERRIDE_TRANSFER_SIZE_T /** Transfer size specifies the size of each individual transfer. * Total transfer length = transfer_size_t * transfer_length_t */ typedef enum e_transfer_size { TRANSFER_SIZE_1_BYTE = 0, ///< Each transfer transfers a 8-bit value TRANSFER_SIZE_2_BYTE = 1, ///< Each transfer transfers a 16-bit value TRANSFER_SIZE_4_BYTE = 2, ///< Each transfer transfers a 32-bit value TRANSFER_SIZE_8_BYTE = 3 ///< Each transfer transfers a 64-bit value } transfer_size_t; #endif #ifndef BSP_OVERRIDE_TRANSFER_ADDR_MODE_T /** Address mode specifies whether to modify (increment or decrement) pointer after each transfer. */ typedef enum e_transfer_addr_mode { /** Address pointer remains fixed after each transfer. */ TRANSFER_ADDR_MODE_FIXED = 0, /** Offset is added to the address pointer after each transfer. */ TRANSFER_ADDR_MODE_OFFSET = 1, /** Address pointer is incremented by associated @ref transfer_size_t after each transfer. */ TRANSFER_ADDR_MODE_INCREMENTED = 2, /** Address pointer is decremented by associated @ref transfer_size_t after each transfer. */ TRANSFER_ADDR_MODE_DECREMENTED = 3 } transfer_addr_mode_t; #endif #ifndef BSP_OVERRIDE_TRANSFER_REPEAT_AREA_T /** Repeat area options (source or destination). In @ref TRANSFER_MODE_REPEAT, the selected pointer returns to its * original value after transfer_info_t::length transfers. In @ref TRANSFER_MODE_BLOCK and @ref TRANSFER_MODE_REPEAT_BLOCK, * the selected pointer returns to its original value after each transfer. */ typedef enum e_transfer_repeat_area { /** Destination area repeated in @ref TRANSFER_MODE_REPEAT or @ref TRANSFER_MODE_BLOCK or @ref TRANSFER_MODE_REPEAT_BLOCK. */ TRANSFER_REPEAT_AREA_DESTINATION = 0, /** Source area repeated in @ref TRANSFER_MODE_REPEAT or @ref TRANSFER_MODE_BLOCK or @ref TRANSFER_MODE_REPEAT_BLOCK. */ TRANSFER_REPEAT_AREA_SOURCE = 1 } transfer_repeat_area_t; #endif #ifndef BSP_OVERRIDE_TRANSFER_CHAIN_MODE_T /** Chain transfer mode options. * @note Only applies for DTC. */ typedef enum e_transfer_chain_mode { /** Chain mode not used. */ TRANSFER_CHAIN_MODE_DISABLED = 0, /** Switch to next transfer after a single transfer from this @ref transfer_info_t. */ TRANSFER_CHAIN_MODE_EACH = 2, /** Complete the entire transfer defined in this @ref transfer_info_t before chaining to next transfer. */ TRANSFER_CHAIN_MODE_END = 3 } transfer_chain_mode_t; #endif #ifndef BSP_OVERRIDE_TRANSFER_IRQ_T /** Interrupt options. */ typedef enum e_transfer_irq { /** Interrupt occurs only after last transfer. If this transfer is chained to a subsequent transfer, * the interrupt will occur only after subsequent chained transfer(s) are complete. * @warning DTC triggers the interrupt of the activation source. Choosing TRANSFER_IRQ_END with DTC will * prevent activation source interrupts until the transfer is complete. */ TRANSFER_IRQ_END = 0, /** Interrupt occurs after each transfer. * @note Not available in all HAL drivers. See HAL driver for details. */ TRANSFER_IRQ_EACH = 1 } transfer_irq_t; #endif #ifndef BSP_OVERRIDE_TRANSFER_CALLBACK_ARGS_T /** Callback function parameter data. */ typedef struct st_transfer_callback_args_t { void const * p_context; ///< Placeholder for user data. Set in @ref transfer_api_t::open function in ::transfer_cfg_t. } transfer_callback_args_t; #endif /** Driver specific information. */ typedef struct st_transfer_properties { uint32_t block_count_max; ///< Maximum number of blocks uint32_t block_count_remaining; ///< Number of blocks remaining uint32_t transfer_length_max; ///< Maximum number of transfers uint32_t transfer_length_remaining; ///< Number of transfers remaining } transfer_properties_t; #ifndef BSP_OVERRIDE_TRANSFER_INFO_T /** This structure specifies the properties of the transfer. * @warning When using DTC, this structure corresponds to the descriptor block registers required by the DTC. * The following components may be modified by the driver: p_src, p_dest, num_blocks, and length. * @warning When using DTC, do NOT reuse this structure to configure multiple transfers. Each transfer must * have a unique transfer_info_t. * @warning When using DTC, this structure must not be allocated in a temporary location. Any instance of this * structure must remain in scope until the transfer it is used for is closed. * @note When using DTC, consider placing instances of this structure in a protected section of memory. */ typedef struct st_transfer_info { union { struct { uint32_t : 16; uint32_t : 2; /** Select what happens to destination pointer after each transfer. */ transfer_addr_mode_t dest_addr_mode : 2; /** Select to repeat source or destination area, unused in @ref TRANSFER_MODE_NORMAL. */ transfer_repeat_area_t repeat_area : 1; /** Select if interrupts should occur after each individual transfer or after the completion of all planned * transfers. */ transfer_irq_t irq : 1; /** Select when the chain transfer ends. */ transfer_chain_mode_t chain_mode : 2; uint32_t : 2; /** Select what happens to source pointer after each transfer. */ transfer_addr_mode_t src_addr_mode : 2; /** Select number of bytes to transfer at once. @see transfer_info_t::length. */ transfer_size_t size : 2; /** Select mode from @ref transfer_mode_t. */ transfer_mode_t mode : 2; } transfer_settings_word_b; uint32_t transfer_settings_word; }; void const * volatile p_src; ///< Source pointer void * volatile p_dest; ///< Destination pointer /** Number of blocks to transfer when using @ref TRANSFER_MODE_BLOCK (both DTC an DMAC) or * @ref TRANSFER_MODE_REPEAT (DMAC only) or * @ref TRANSFER_MODE_REPEAT_BLOCK (DMAC only), unused in other modes. */ volatile uint16_t num_blocks; /** Length of each transfer. Range limited for @ref TRANSFER_MODE_BLOCK, @ref TRANSFER_MODE_REPEAT, * and @ref TRANSFER_MODE_REPEAT_BLOCK * see HAL driver for details. */ volatile uint16_t length; } transfer_info_t; #endif /** Driver configuration set in @ref transfer_api_t::open. All elements except p_extend are required and must be * initialized. */ typedef struct st_transfer_cfg { /** Pointer to transfer configuration options. If using chain transfer (DTC only), this can be a pointer to * an array of chained transfers that will be completed in order. */ transfer_info_t * p_info; void const * p_extend; ///< Extension parameter for hardware specific settings. } transfer_cfg_t; /** Select whether to start single or repeated transfer with software start. */ typedef enum e_transfer_start_mode { TRANSFER_START_MODE_SINGLE = 0, ///< Software start triggers single transfer. TRANSFER_START_MODE_REPEAT = 1 ///< Software start transfer continues until transfer is complete. } transfer_start_mode_t; /** Transfer functions implemented at the HAL layer will follow this API. */ typedef struct st_transfer_api { /** Initial configuration. * * @param[in,out] p_ctrl Pointer to control block. Must be declared by user. Elements set here. * @param[in] p_cfg Pointer to configuration structure. All elements of this structure * must be set by user. */ fsp_err_t (* open)(transfer_ctrl_t * const p_ctrl, transfer_cfg_t const * const p_cfg); /** Reconfigure the transfer. * Enable the transfer if p_info is valid. * * @param[in,out] p_ctrl Pointer to control block. Must be declared by user. Elements set here. * @param[in] p_info Pointer to a new transfer info structure. */ fsp_err_t (* reconfigure)(transfer_ctrl_t * const p_ctrl, transfer_info_t * p_info); /** Reset source address pointer, destination address pointer, and/or length, keeping all other settings the same. * Enable the transfer if p_src, p_dest, and length are valid. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. * @param[in] p_src Pointer to source. Set to NULL if source pointer should not change. * @param[in] p_dest Pointer to destination. Set to NULL if destination pointer should not change. * @param[in] num_transfers Transfer length in normal mode or number of blocks in block mode. In DMAC only, * resets number of repeats (initially stored in transfer_info_t::num_blocks) in * repeat mode. Not used in repeat mode for DTC. */ fsp_err_t (* reset)(transfer_ctrl_t * const p_ctrl, void const * p_src, void * p_dest, uint16_t const num_transfers); /** Enable transfer. Transfers occur after the activation source event (or when * @ref transfer_api_t::softwareStart is called if no peripheral event is chosen as activation source). * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. */ fsp_err_t (* enable)(transfer_ctrl_t * const p_ctrl); /** Disable transfer. Transfers do not occur after the activation source event (or when * @ref transfer_api_t::softwareStart is called if no peripheral event is chosen as the DMAC activation source). * @note If a transfer is in progress, it will be completed. Subsequent transfer requests do not cause a * transfer. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. */ fsp_err_t (* disable)(transfer_ctrl_t * const p_ctrl); /** Start transfer in software. * @warning Only works if no peripheral event is chosen as the DMAC activation source. * @note Not supported for DTC. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. * @param[in] mode Select mode from @ref transfer_start_mode_t. */ fsp_err_t (* softwareStart)(transfer_ctrl_t * const p_ctrl, transfer_start_mode_t mode); /** Stop transfer in software. The transfer will stop after completion of the current transfer. * @note Not supported for DTC. * @note Only applies for transfers started with TRANSFER_START_MODE_REPEAT. * @warning Only works if no peripheral event is chosen as the DMAC activation source. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. */ fsp_err_t (* softwareStop)(transfer_ctrl_t * const p_ctrl); /** Provides information about this transfer. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. * @param[out] p_properties Driver specific information. */ fsp_err_t (* infoGet)(transfer_ctrl_t * const p_ctrl, transfer_properties_t * const p_properties); /** Releases hardware lock. This allows a transfer to be reconfigured using @ref transfer_api_t::open. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. */ fsp_err_t (* close)(transfer_ctrl_t * const p_ctrl); /** To update next transfer information without interruption during transfer. * Allow further transfer continuation. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. * @param[in] p_src Pointer to source. Set to NULL if source pointer should not change. * @param[in] p_dest Pointer to destination. Set to NULL if destination pointer should not change. * @param[in] num_transfers Transfer length in normal mode or block mode. */ fsp_err_t (* reload)(transfer_ctrl_t * const p_ctrl, void const * p_src, void * p_dest, uint32_t const num_transfers); /** Specify callback function and optional context pointer and working memory pointer. * * @param[in] p_ctrl Control block set in @ref transfer_api_t::open call for this transfer. * @param[in] p_callback Callback function to register * @param[in] p_context Pointer to send to callback function * @param[in] p_callback_memory Pointer to volatile memory where callback structure can be allocated. * Callback arguments allocated here are only valid during the callback. */ fsp_err_t (* callbackSet)(transfer_ctrl_t * const p_ctrl, void (* p_callback)(transfer_callback_args_t *), void const * const p_context, transfer_callback_args_t * const p_callback_memory); } transfer_api_t; /** This structure encompasses everything that is needed to use an instance of this interface. */ typedef struct st_transfer_instance { transfer_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance transfer_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance transfer_api_t const * p_api; ///< Pointer to the API structure for this instance } transfer_instance_t; /* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ FSP_FOOTER #endif /*******************************************************************************************************************//** * @} (end defgroup TRANSFER_API) **********************************************************************************************************************/ 这里存在 // 标准函数原型应类似: fsp_err_t R_TRANSFER_Open( transfer_ctrl_t * const p_ctrl, transfer_cfg_t const * const p_cfg);

#include "ADC_Config.h" #define ADCIP_CTRL (*(uint32_t*)(0x40020800+0x60)) /* ADC时钟: 14MHZ 声音范围:20Hz~20KHz TIME触发ADC:TIM频率 128K ADC采样时间 = (71.5 +12.5)/14 采样频率:128K 采样个数: 125ms=8HZ 128K/8Hz=16000次, 512K/8HZ=64000 64000/256=250 BUFF0大小256 BUFF1大小128,DMA HT中断,即要中断16000/128=125次 每125次求和 PA1:ADC_IN1 30-70DB PA2: ADC_IN2 70-100DB PA3:ADC_IN3 100-130DB 采样125ms: 共要计算 16000组数据 采样1s: 共要计算 16000*8=128000组数据 设置DMA BUFF大小 256组 HT中断 中断时间1ms 中断程序耗费8.8us 那么 采样125ms就需要中断 125000/1=125次 9K的信号能采样14组 那么 采样1s就需要中断 125*8=1000次 DMA_MEM 从开始到计算结束 用时140us 不会超过一次ADC DMA中断时间 数据不会被覆盖 */ ADC_BUFF Noise_Data; DMA_InitType DMA_InitStructure, DMA_InitStructure_MEM; u8 USB_Busy ; ADC_InitType ADC_InitStructure; extern uint16_t DMA_Test_Value[5], DMA_Test_Value1[5]; void TIM2_ETR_Config(void) { TIM_TimeBaseInitType TIM_TimeBaseStructure; OCInitType TIM_OCInitStructure; RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE); TIM_TimeBaseStructure.Period = TRG_FREQ_USER - 1; //64k TIM_TimeBaseStructure.Prescaler = 0; TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1; TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP; TIM_InitTimeBase(TIM2, &TIM_TimeBaseStructure); TIM_OCInitStructure.OcMode = TIM_OCMODE_PWM1; TIM_OCInitStructure.OutputState = TIM_OUTPUT_STATE_ENABLE; TIM_OCInitStructure.Pulse = TRG_FREQ_USER / 2 - 1; TIM_OCInitStructure.OcPolarity = TIM_OC_POLARITY_LOW; TIM_InitOc2(TIM2, &TIM_OCInitStructure); TIM_ConfigInt(TIM2, TIM_INT_CC2, ENABLE); /* TIM2 enable counter */ TIM_Enable(TIM2, ENABLE); TIM_EnableCtrlPwmOutputs(TIM2, ENABLE); } /** * @brief Configures the different system clocks. */ void RCC_Configuration(void) { /* Enable peripheral clocks ------------------------------------------------*/ /* Enable DMA clocks */ RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_DMA, ENABLE); /* Enable GPIOC clocks */ RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE); /* Enable ADC clocks */ RCC_EnableAHBPeriphClk(RCC_AHB_PERIPH_ADC, ENABLE); /* RCC_ADCHCLK_DIV16*/ ADC_ConfigClk(ADC_CTRL3_CKMOD_AHB, RCC_ADCHCLK_DIV2);//96/2=48M RCC_ConfigAdc1mClk(RCC_ADC1MCLK_SRC_HSE, RCC_ADC1MCLK_DIV12); //selsect HSE as RCC ADC1M CLK Source } /** * @brief Configures the different GPIO ports. */ void GPIO_Configuration(void) { GPIO_InitType GPIO_InitStructure; GPIO_InitStruct(&GPIO_InitStructure); /* Configure GPIO_PIN_WIFI_RST GPIO_PIN_WIFI_CEN GPIO_PIN_WIFI_RX GPIO_PIN_WIFI_TX as analog input ---------*/ GPIO_InitStructure.Pin = GPIO_PIN_WIFI_RST | GPIO_PIN_WIFI_CEN | GPIO_PIN_WIFI_RX | GPIO_PIN_WIFI_TX | GPIO_PIN_BATT; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Analog; GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure); } //配置DMA中断 void NVIC_DMA_Config(void) { NVIC_InitType NVIC_InitStructure; //DMA通道6中断设置 NVIC_InitStructure.NVIC_IRQChannel = DMA_Channel1_IRQn;// DMA1_Channel2_3_IRQn NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; //子优先级3 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;//IRQ通道使能 NVIC_Init(&NVIC_InitStructure); } void Change_Addr_MEM(MEA_GROUP_TypeDef MeaGroup) { DMA_EnableChannel(DMA_CH6, DISABLE); switch(MeaGroup) { case GROUP0: DMA_InitStructure_MEM.PeriphAddr = (uint32_t)Noise_Data.Buff0; break; case GROUP1: DMA_InitStructure_MEM.PeriphAddr = (uint32_t)(&Noise_Data.Buff0[DMA_BUFF_SIZE / 2]); break; } DMA_Init(DMA_CH6, &DMA_InitStructure_MEM); if(USB_Busy == 0) //对EEPROM数据进行释放锁后才去打开DMA3 { DMA_EnableChannel(DMA_CH6, ENABLE ); } else { DMA_EnableChannel(DMA_CH6, DISABLE ); } } void ADC_DMA_Cfg(void) { SysData.DMA_Group = 0; /* System clocks configuration ---------------------------------------------*/ RCC_Configuration(); /* GPIO configuration ------------------------------------------------------*/ GPIO_Configuration(); NVIC_DMA_Config(); /* DMA channel1 configuration ----------------------------------------------*/ DMA_DeInit(DMA_CH1); DMA_InitStructure.PeriphAddr = (uint32_t)&ADC->DAT; DMA_InitStructure.MemAddr = (uint32_t)Noise_Data.Buff0; DMA_InitStructure.Direction = DMA_DIR_PERIPH_SRC; DMA_InitStructure.BufSize = DMA_BUFF_SIZE; DMA_InitStructure.PeriphInc = DMA_PERIPH_INC_DISABLE; DMA_InitStructure.DMA_MemoryInc = DMA_MEM_INC_ENABLE; DMA_InitStructure.PeriphDataSize = DMA_PERIPH_DATA_SIZE_HALFWORD; DMA_InitStructure.MemDataSize = DMA_MemoryDataSize_HalfWord; DMA_InitStructure.CircularMode = DMA_MODE_NORMAL;//DMA_MODE_CIRCULAR; DMA_InitStructure.Priority = DMA_PRIORITY_HIGH; DMA_InitStructure.Mem2Mem = DMA_M2M_DISABLE; DMA_Init(DMA_CH1, &DMA_InitStructure); DMA_RequestRemap(DMA_REMAP_ADC1, DMA, DMA_CH1, ENABLE); DMA_ClrIntPendingBit(DMA_INT_TXC1, DMA); // DMA_ClrIntPendingBit(DMA_INT_HTX1,DMA); DMA_ConfigInt(DMA_CH1, DMA_INT_TXC, ENABLE); // DMA_ConfigInt(DMA_CH1,DMA_INT_HTX,ENABLE); /* Enable DMA channel1 */ DMA_EnableChannel(DMA_CH1, ENABLE); ADC_DeInit(ADC); /* ADC1 configuration ------------------------------------------------------*/ ADC_InitStructure.MultiChEn = ENABLE; ADC_InitStructure.ContinueConvEn = DISABLE; ADC_InitStructure.ExtTrigSelect = ADC_EXT_TRIGCONV_T2_CC2; ADC_InitStructure.DatAlign = ADC_DAT_ALIGN_R; ADC_InitStructure.ChsNumber = 4; ADC_Init(ADC, &ADC_InitStructure); ADCIP_CTRL = 0x28; //在ADC使能前配置这个 ADC_EnableTempSensorVrefint( ENABLE); /* ADC1 regular channel13 configuration */ ADC_ConfigRegularChannel(ADC, ADC_CH_1_PA0, 1, ADC_SampleTime_User);//WIFI_RST ADC_ConfigRegularChannel(ADC, ADC_CH_2_PA1, 2, ADC_SampleTime_User);//WIFI_CEN ADC_ConfigRegularChannel(ADC, ADC_CH_3_PA2, 3, ADC_SampleTime_User);//WIFI_RX ADC_ConfigRegularChannel(ADC, ADC_CH_4_PA3, 4, ADC_SampleTime_User);//WIFI_TX ADC_EnableExternalTrigConv(ADC, ENABLE); ADC_ConfigInt(ADC, ADC_INT_ENDC, ENABLE); /* Enable ADC DMA */ ADC_EnableDMA(ADC, ENABLE); /* Enable ADC */ ADC_Enable(ADC, ENABLE); /* Check ADC Ready */ while(ADC_GetFlagStatusNew(ADC, ADC_FLAG_RDY) == RESET); /* Start ADC1 calibration */ ADC_StartCalibration(ADC); /* Check the end of ADC1 calibration */ while (ADC_GetCalibrationStatus(ADC)); } #ifndef __ADC_CONFIG_H #define __ADC_CONFIG_H #include "main.h" #define ADC1_DR_Address 0x40012440 #define TRG_FREQ_1M 72 #define TRG_FREQ_500K 144 #define TRG_FREQ_600K 120 #define TRG_FREQ_300K 240 #define TRG_FREQ_50K 1440 //#define TRG_FREQ_64K 1125 //#define TRG_FREQ_32K 1125*2 #define TRG_FREQ_128K 1125 #define TRG_FREQ_64K 750 #define TRG_FREQ_USER TRG_FREQ_64K #define ADC_SampleTime_User ADC_SAMP_TIME_71CYCLES5 //要求大于 64*4=256K 48/(71.5+12.5+16)=480K >256K #define DMA_CAL_BUFF_SIZE 3200 //125ms*64*4=32000=3200*10= DMA_CAL_BUFF_SIZE*SMP_DMA_CNT 3200/64=50ms 中断一次 #define DMA_BUFF_SIZE DMA_CAL_BUFF_SIZE typedef enum { GROUP0 = 0x00, GROUP1 = 0x01, } MEA_GROUP_TypeDef; typedef struct { //ADC DMA 用 u16 Buff0[DMA_CAL_BUFF_SIZE]; u16 Buff1[DMA_CAL_BUFF_SIZE]; } ADC_BUFF; extern ADC_BUFF Noise_Data; void ADC_Config(MEA_RANGE_TypeDef MeaRange); void DMA_Config(void); void NVIC_DMA_Config(void); void DMA_Config_MEM(void); void TIM2_ETR_Config(void); void Change_Addr_MEM(MEA_GROUP_TypeDef MeaGroup); void ADC_DMA_Cfg(void); #endif /***************************************************************************** * Copyright (c) 2022, Nations Technologies Inc. * * All rights reserved. * **************************************************************************** * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the disclaimer below. * * Nations' name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY NATIONS "AS IS" AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE * DISCLAIMED. IN NO EVENT SHALL NATIONS BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ****************************************************************************/ /** * @file n32g43x_it.c * @author Nations * @version v1.2.0 * * @copyright Copyright (c) 2022, Nations Technologies Inc. All rights reserved. */ #include "n32g43x_it.h" #include "n32g43x.h" #include "main.h" #include "usb_istr.h" /** @addtogroup N32G43X_StdPeriph_Template * @{ */ extern __IO uint32_t CurrDataCounterEnd; /******************************************************************************/ /* Cortex-M4 Processor Exceptions Handlers */ /******************************************************************************/ /** * @brief This function handles NMI exception. */ void NMI_Handler(void) { } /** * @brief This function handles Hard Fault exception. */ void HardFault_Handler(void) { /* Go to infinite loop when Hard Fault exception occurs */ while (1) { } } /** * @brief This function handles Memory Manage exception. */ void MemManage_Handler(void) { /* Go to infinite loop when Memory Manage exception occurs */ while (1) { } } /** * @brief This function handles Bus Fault exception. */ void BusFault_Handler(void) { /* Go to infinite loop when Bus Fault exception occurs */ while (1) { } } /** * @brief This function handles Usage Fault exception. */ void UsageFault_Handler(void) { /* Go to infinite loop when Usage Fault exception occurs */ while (1) { } } /** * @brief This function handles SVCall exception. */ void SVC_Handler(void) { } /** * @brief This function handles Debug Monitor exception. */ void DebugMon_Handler(void) { } /** * @brief This function handles DMA interrupt request defined in main.h . */ void DMA_IRQ_HANDLER(void) { } /** * @brief This function handles USB_LP_IRQHandler Handler. */ void USB_LP_IRQHandler(void) { USB_Istr(); } /** * @brief This function handles USB WakeUp interrupt request. */ void USBWakeUp_IRQHandler(void) { EXTI_ClrITPendBit(EXTI_LINE17); } void DMA_Channel1_IRQHandler(void) { //国民芯片在一个DMA通道里面 配置另一个DMA通道会导致当前通道顺序异常 //这里配置 2us完成 ADC 一次的时间是15.4us 足够赶上下一次ADC完成 if(DMA_GetIntStatus(DMA_INT_TXC1, DMA) != RESET) //全传输完 { DMA_ClrIntPendingBit(DMA_INT_TXC1, DMA); //国民芯片 建议传输完成 重新配置TXNUM 否则可能出现顺序错乱 DMA_CH1->CHCFG &= (uint16_t)(~DMA_CHCFG1_CHEN); DMA_CH1->TXNUM = DMA_BUFF_SIZE; SysData.DMA_Group = !SysData.DMA_Group; DMA_CH1->MADDR = (uint32_t)Noise_Data.Buff0; if(SysData.DMA_Group != 0) { DMA_CH1->MADDR = (uint32_t)Noise_Data.Buff1; } DMA_CH1->CHCFG |= DMA_CHCFG1_CHEN; SysFlag.DMA_OK = 1; } } void DMA_Channel6_IRQHandler(void) { if(DMA_GetIntStatus(DMA_INT_TXC6, DMA) != RESET) { DMA_ClrIntPendingBit(DMA_INT_TXC6, DMA); // Get_AD_SUM(); } } void ADC_IRQHandler(void) { if(ADC_GetIntStatus(ADC, ADC_INT_ENDC) != RESET) { ADC_ClearIntPendingBit(ADC, ADC_INT_ENDC); // LED1_Turn(); } } void TIM2_IRQHandler(void) { if(TIM_GetFlagStatus(TIM2, TIM_FLAG_CC2) == SET) { TIM_ClearFlag(TIM2, TIM_FLAG_CC2); // LED1_Turn(); // test1++; } } void TIM3_IRQHandler(void) { if(TIM_GetFlagStatus(TIM3, TIM_FLAG_UPDATE) == SET) { TIM_ClearFlag(TIM3, TIM_FLAG_UPDATE); // Clock_150++; // Clock_500++; // Clock_750++; // SysClock++; // // Buzzer_Process(); } } void TIM4_IRQHandler(void) { if(TIM_GetFlagStatus(TIM4, TIM_FLAG_UPDATE) == SET) { TIM_ClearFlag(TIM4, TIM_FLAG_UPDATE); Clock_150++; Clock_500++; Clock_750++; SysClock++; LED1_Turn(); Buzzer_Process(); } } void EXTI9_5_IRQHandler(void) { if(EXTI_GetITStatus(EXTI_LINE8) != RESET) { EXTI_ClrITPendBit(EXTI_LINE8); SysFlag.PWD = 1; Clock_500 = 0; if((SysFlag.EraseDoing) && (SysInfo.PWRON_Erase == 0)) { SysInfo.PWRON_Erase = 1; Save_Param(&SysInfo.PWRON_Erase, sizeof(SysInfo.PWRON_Erase)); } } } /** * @brief This function handles SysTick Handler. */ u32 Time_1ms = 0; void SysTick_Handler(void) { Time_1ms++; } /******************************************************************************/ /* N32G43X Peripherals Interrupt Handlers */ /* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ /* available peripheral interrupt handler's name please refer to the startup */ /* file (startup_n32g43x.s). */ /******************************************************************************/ /** * @brief This function handles PPP interrupt request. */ /*void PPP_IRQHandler(void) { }*/ /** * @} */ void Get_AD_SUM(void) { uint64_t Sum[3] = {0, 0, 0}; //这里有3种计算,分别是sum[0],sum[1],sum[2] u8 Ratio; u16 loopi, *Data; u32 Temp; Data = Noise_Data.Buff1;//将DMA移过来的地址给Data if(SysData.DMA_Group != 0) Data = Noise_Data.Buff0;//将DMA移过来的地址给Data SysData.BattCnt = 0; //sum[0] for(loopi = 0; loopi < DMA_CAL_BUFF_SIZE; loopi += 4) //循环480/3=150次 { Temp = (u32)(*Data); //将Noise_Data.Buff1的值给Temp Data++;//地址++ if(Temp > ADC_HLimit) SysData.OverCntt[0]++; //如果Temp>2482,数据溢出的标志位++,这个数据溢出的标志位也有3种,用数组来表示 Temp = Temp + (s32)SysInfo.Cal_Adc[0];// 这个应该是存放校准后的ADC if(Temp > 0x80000000)Temp = 0; Temp = Temp * Temp; //不知道平方一次是用来干啥的 Sum[0] += (uint64_t)Temp; //计算总和,存到sum[0] //sum[1] Temp = (u32)(*Data); Data++; if(Temp > ADC_HLimit_H) SysData.OverCntt[1]++; Temp = Temp + (s32)SysInfo.Cal_Adc[1]; if(Temp > 0x80000000)Temp = 0; Temp = Temp * Temp; Sum[1] += (uint64_t)Temp; //计算总和,存到sum[1] //sum[2] Temp = (u32)(*Data); Data++; Temp = Temp + (s32)SysInfo.Cal_Adc[2]; if(Temp > 0x80000000) Temp = 0; Temp = Temp * Temp; Sum[2] += (uint64_t)Temp; //计算总和,存到sum[2] if(SysData.BattCnt < 64) { SysData.BattBuff[SysData.BattCnt++] = *Data; } Data++; } SysData.Batt = 0; for(loopi = 0; loopi < 64; loopi++) { SysData.Batt += SysData.BattBuff[loopi]; } SysData.Batt = SysData.Batt / 64; // //报警时低于3.3V不关机问题,电源检测这里添加关机 // if(SysData.Batt < BattSHUT) // { // Shut_Down(); // } //将计算的总和,存到SysData.ADC_VALUE SysData.ADC_VALUE[0] += (double)Sum[0]; SysData.ADC_VALUE[1] += (double)Sum[1]; SysData.ADC_VALUE[2] += (double)Sum[2]; SysData.ADC_CNT++; Ratio = SysData.Freq_Resp * 7 + 1; //不知道这2句是干嘛的 if(SysData.ADC_CNT >= (SMP_DMA_CNT * Ratio)) { SysData.ADC_CNT = 0; // if(SysData.Cal_Mode == 0) // { // if(SysData.OverCntt[0] < MIN_OVER_CNT) //溢出计数判断 // { // SysData.Adc_Range = RANG_70DB; // } // else if(SysData.OverCntt[1] < MIN_OVER_CNT) // { // SysData.Adc_Range = RANG_100DB; // } // else // { // SysData.Adc_Range = RANG_130DB; // } // } SysData.ADC_Sum_Value = (SysData.ADC_VALUE[SysData.Adc_Range] / (float)Ratio) + SysInfo.Cal_Adc_Squ[SysData.Adc_Range]; if(SysData.ADC_Sum_Value < 0) { ; } else { // Get_Noise_Data(); } SysData.ADC_VALUE[0] = 0; SysData.ADC_VALUE[1] = 0; SysData.ADC_VALUE[2] = 0; SysData.OverCntt[0] = 0; SysData.OverCntt[1] = 0; SysData.OverCntt[2] = 0; } } void Get_Noise_Data(void) { Phasea = SysData.ADC_Sum_Value; /* 523公式:10*log10(SysData.ADC_Sum_Value) *10 //是为了扩大10倍 用于获取小数部分,来显示 */ Phasea = log10(Phasea); Phasea = Phasea * 1000; Phaseb = (u32)Phasea; SysData.CAL_INT_Value = Phaseb + SysInfo.Cal_DB[SysData.Adc_Range]; SysData.ADC_INT_Value = SysData.CAL_INT_Value / 10; if(SysData.Cal_Mode == 0) { if(SysData.ADC_TAB_CNT == 0) { SysData.ADC_TAB_CNT = 1; SysData.ADC_INT_Value_TAB[1] = SysData.ADC_INT_Value; SysData.ADC_INT_Value_TAB[2] = SysData.ADC_INT_Value; SysData.ADC_INT_Value_TAB[3] = SysData.ADC_INT_Value; } else { SysData.ADC_INT_Value_TAB[3] = SysData.ADC_INT_Value_TAB[2]; SysData.ADC_INT_Value_TAB[2] = SysData.ADC_INT_Value_TAB[1]; SysData.ADC_INT_Value_TAB[1] = SysData.ADC_INT_Value_TAB[0]; } SysData.ADC_INT_Value_TAB[0] = SysData.ADC_INT_Value; } else { SysData.CalEn = 1; if(SysData.Adc_Range == RANG_130DB) { if(SysData.ADC_INT_Value == 1300) { SysFlag.FlickEn = 1; } else { SysFlag.FlickEn = 0; } } } } 保留温湿度和电压,去除噪音

/* * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2022-09-21 baijinhui the first version */ #include "app_actuator.h" #if (ACTUATOR_TYPE == 25) #include <rtthread.h> #include <rtdevice.h> #include "board.h" #include <stdio.h> #include "bsp_can.h" #include "app_location.h" #include "app_chassis.h" #include "lib_inc.h" #include "app_chassis_fork.h" #include "app_qrps.h" #define DBG_TAG "actuator" #define DBG_LVL DBG_LOG #include /*-------------------------外部引用-------------------------*/ /*-------------------------公共变量-------------------------*/ /*-------------------------局部变量-------------------------*/ #define Pi 3.14159265359f static struct msg_actuator_status msg1; static struct msg_actuator_ctrl msg2; static struct msg_actuator_para msg3; static struct msg_qrps_status qrpsMsg1; static struct msg_location_status locationMsg1; static struct msg_chassis_ctrl chassisMsg2; static struct msg_chassis_para chassisMsg3; static struct msg_chassis_fork_status forkMsg1; static struct msg_chassis_fork_ctrl forkMsg2; static struct rt_messagequeue mq_actuatorDriver; static char msg_pool_actuatorDriver[128]; struct rx_actuatorDriver { unsigned short int id; unsigned char cmd; unsigned short int index; unsigned char sub_index; unsigned char dat[4]; }; static unsigned int actStatus[3] = { 0 }; // 动作执行状态 static unsigned int timeCount[3] = { 0 }; //动作执行计时 static unsigned int hightNeedCal = 1; //高度需要校准 0不需要 1需要 static unsigned int slideNeedCal = 1; //横移需要校准 0不需要 1需要 static unsigned int locBiasError = 0; //上装定位偏差错误 /*-------------------------函数实现-------------------------*/ void app_actuator_status(struct msg_actuator_status *status) { RT_ASSERT(status != RT_NULL); rt_memcpy(status, &msg1, sizeof(msg1)); } void app_actuator_ctrl(struct msg_actuator_ctrl *ctrl) { RT_ASSERT(ctrl != RT_NULL); rt_memcp

/*********************** cs5530.h ****************************** * @brief CS5530 24-bit ADC驱动头文件 ****************************************************************/ #ifndef __CS5530_H #define __CS5530_H #ifdef __cplusplus extern "C" { #endif #include "main.h" #include <stdint.h> /* 硬件配置 -----------------------------------------------------*/ #define CS5530_SPI_TIMEOUT 100 // SPI超时时间(ms) #define CS5530_FILTER_SIZE 16 // 滑动平均滤波器窗口大小 #define CS5530_REF_VOLTAGE 5.0f // 参考电压5V #define CS5530_GAIN 64 // 内部放大器增益 /* 寄存器命令 ---------------------------------------------------*/ typedef enum { CMD_WRITE_OFFSET = 0x01, // 写偏移寄存器 CMD_READ_OFFSET = 0x09, // 读偏移寄存器 CMD_WRITE_GAIN = 0x02, // 写增益寄存器 CMD_READ_GAIN = 0x0A, // 读增益寄存器 CMD_WRITE_CONFIG = 0x03, // 写配置寄存器 CMD_READ_CONFIG = 0x0B, // 读配置寄存器 CMD_SINGLE_CONV = 0x80, // 单次转换 CMD_CONT_CONV = 0x81, // 连续转换 CMD_SYS_OFFSET_CAL = 0x85, // 系统偏移校准 CMD_SYS_GAIN_CAL = 0x86 // 系统增益校准 } CS5530_Command; /* 配置寄存器位定义 ----------------------------------------------*/ typedef struct { uint8_t PSS : 1; // 位31: 省电模式选择 uint8_t PDW : 1; // 位30: 掉电模式 uint8_t RS : 1; // 位29: 系统复位 uint8_t RV : 1; // 位28: 复位有效(只读) uint8_t IS : 1; // 位27: 输入短路 uint8_t NU1 : 1; // 位26: 保留 uint8_t VRS : 1; // 位25: 电压参考选择 uint8_t A1 : 1; // 位24: 输出锁存A1 uint8_t A0 : 1; // 位23: 输出锁存A0 uint8_t NU2 : 3; // 位22-20: 保留 uint8_t FRS : 1; // 位19: 滤波器速率选择 uint8_t NU3 : 4; // 位18-15: 保留 uint8_t WR : 4; // 位14-11: 字速率选择 uint8_t UB : 1; // 位10: 单/双极性选择 uint8_t OCD : 1; // 位9: 开路检测 uint8_t NU4 : 8; // 位8-0: 保留 } CS5530_ConfigReg; /* 设备句柄结构体 ------------------------------------------------*/ typedef struct { SPI_HandleTypeDef *hspi; // SPI句柄 GPIO_TypeDef *cs_port; // 片选端口 uint16_t cs_pin; // 片选引脚 float scale_factor; // 传感器灵敏度(kg/LSB) int32_t offset; // 去皮偏移值 } CS5530_HandleTypeDef; /* 函数声明 -----------------------------------------------------*/ void CS5530_Init(CS5530_HandleTypeDef *hcs, SPI_HandleTypeDef *hspi, GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin); void CS5530_Config(CS5530_HandleTypeDef *hcs, uint8_t word_rate, uint8_t is_bipolar); int32_t CS5530_ReadRawData(CS5530_HandleTypeDef *hcs); float CS5530_GetWeight(CS5530_HandleTypeDef *hcs, uint8_t samples); void CS5530_Tare(CS5530_HandleTypeDef *hcs, uint8_t samples); void CS5530_Calibrate(CS5530_HandleTypeDef *hcs, float known_weight); #ifdef __cplusplus } #endif #endif /* __CS5530_H *//*********************** cs5530.c ****************************** * @brief CS5530 24-bit ADC驱动实现 ****************************************************************/ #include "cs5530.h" #include <string.h> static uint8_t tx_buf[8] = {0}; static uint8_t rx_buf[8] = {0}; static int32_t filter_buf[CS5530_FILTER_SIZE] = {0}; static uint8_t filter_idx = 0; /* 私有函数 -----------------------------------------------------*/ /** * @brief 片选控制 * @param hcs: 设备句柄 * @param state: 0-使能片选,1-关闭片选 */ static void CS_Enable(CS5530_HandleTypeDef *hcs, uint8_t state) { HAL_GPIO_WritePin(hcs->cs_port, hcs->cs_pin, (state ? GPIO_PIN_RESET : GPIO_PIN_SET)); } /** * @brief SPI传输封装 * @param hcs: 设备句柄 * @param tx_data: 发送缓冲区 * @param rx_data: 接收缓冲区 * @param size: 数据长度 */ static void SPI_TransmitReceive(CS5530_HandleTypeDef *hcs, uint8_t *tx_data, uint8_t *rx_data, uint16_t size) { CS_Enable(hcs, 1); HAL_SPI_TransmitReceive(hcs->hspi, tx_data, rx_data, size, CS5530_SPI_TIMEOUT); CS_Enable(hcs, 0); } /** * @brief 发送命令并读取32位寄存器 * @param hcs: 设备句柄 * @param cmd: 命令字节 * @retval 寄存器值 */ static uint32_t ReadRegister(CS5530_HandleTypeDef *hcs, CS5530_Command cmd) { tx_buf[0] = (uint8_t)cmd; memset(tx_buf+1, 0xFF, 4); // 填充无效数据用于读取 SPI_TransmitReceive(hcs, tx_buf, rx_buf, 5); return (rx_buf[1] << 24) | (rx_buf[2] << 16) | (rx_buf[3] << 8) | rx_buf[4]; } /** * @brief 写入32位寄存器 * @param hcs: 设备句柄 * @param cmd: 命令字节 * @param data: 待写入数据 */ static void WriteRegister(CS5530_HandleTypeDef *hcs, CS5530_Command cmd, uint32_t data) { tx_buf[0] = (uint8_t)cmd; tx_buf[1] = (data >> 24) & 0xFF; tx_buf[2] = (data >> 16) & 0xFF; tx_buf[3] = (data >> 8) & 0xFF; tx_buf[4] = data & 0xFF; SPI_TransmitReceive(hcs, tx_buf, rx_buf, 5); } /* 公有函数 -----------------------------------------------------*/ /** * @brief 初始化CS5530 * @param hcs: 设备句柄 * @param hspi: SPI句柄 * @param GPIOx: 片选端口 * @param GPIO_Pin: 片选引脚 */ void CS5530_Init(CS5530_HandleTypeDef *hcs, SPI_HandleTypeDef *hspi, GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { // 初始化句柄参数 hcs->hspi = hspi; hcs->cs_port = GPIOx; hcs->cs_pin = GPIO_Pin; hcs->scale_factor = 1.0f; // 需要根据传感器校准 hcs->offset = 0; // 硬件复位序列(手册2.2.1) for(int i=0; i<15; i++) { tx_buf[0] = 0xFF; // SYNC1 SPI_TransmitReceive(hcs, tx_buf, rx_buf, 1); } tx_buf[0] = 0xFE; // SYNC0 SPI_TransmitReceive(hcs, tx_buf, rx_buf, 1); // 系统复位(设置RS位) CS5530_ConfigReg cfg = {0}; cfg.RS = 1; WriteRegister(hcs, CMD_WRITE_CONFIG, *(uint32_t*)&cfg); HAL_Delay(1); // 等待8 MCLK周期(4.9152MHz约1.6μs) // 清除复位位 cfg.RS = 0; WriteRegister(hcs, CMD_WRITE_CONFIG, *(uint32_t*)&cfg); } /** * @brief 配置工作模式 * @param hcs: 设备句柄 * @param word_rate: 输出速率(见WR位定义) * @param is_bipolar: 0-双极性,1-单极性 */ void CS5530_Config(CS5530_HandleTypeDef *hcs, uint8_t word_rate, uint8_t is_bipolar) { CS5530_ConfigReg cfg = {0}; cfg.VRS = 1; // VREF范围1~2.5V cfg.WR = word_rate; // 例如:0x01对应60 SPS cfg.UB = is_bipolar ? 0 : 1; // 极性选择 WriteRegister(hcs, CMD_WRITE_CONFIG, *(uint32_t*)&cfg); } /** * @brief 读取原始ADC数据(带符号扩展) * @param hcs: 设备句柄 * @retval 24位原始数据 */ int32_t CS5530_ReadRawData(CS5530_HandleTypeDef *hcs) { tx_buf[0] = CMD_SINGLE_CONV; SPI_TransmitReceive(hcs, tx_buf, rx_buf, 4); // 读取32位数据 // 解析24位数据(D31-D8为有效位) int32_t raw = (rx_buf[0] << 16) | (rx_buf[1] << 8) | rx_buf[2]; // 符号扩展(若为负数) if(raw & 0x00800000) { raw |= 0xFF000000; } return raw; } /** * @brief 获取滤波后的重量值 * @param hcs: 设备句柄 * @param samples: 采样次数(用于滑动平均) * @retval 实际重量(单位:kg) */ float CS5530_GetWeight(CS5530_HandleTypeDef *hcs, uint8_t samples) { int64_t sum = 0; for(uint8_t i=0; i<samples; i++){ int32_t raw = CS5530_ReadRawData(hcs); filter_buf[filter_idx] = raw - hcs->offset; // 去除零点偏移 filter_idx = (filter_idx + 1) % CS5530_FILTER_SIZE; sum += filter_buf[filter_idx]; HAL_Delay(10); // 根据输出速率调整 } float avg = (float)sum / samples; return avg * hcs->scale_factor; } /** * @brief 去皮操作(零点校准) * @param hcs: 设备句柄 * @param samples: 校准采样次数 */ void CS5530_Tare(CS5530_HandleTypeDef *hcs, uint8_t samples) { int64_t sum = 0; for(uint8_t i=0; i<samples; i++) { sum += CS5530_ReadRawData(hcs); HAL_Delay(10); } hcs->offset = sum / samples; } /** * @brief 已知重量校准(需加载标准砝码) * @param hcs: 设备句柄 * @param known_weight: 已知重量(kg) */ void CS5530_Calibrate(CS5530_HandleTypeDef *hcs, float known_weight) { // 1. 执行系统增益校准 tx_buf[0] = CMD_SYS_GAIN_CAL; SPI_TransmitReceive(hcs, tx_buf, rx_buf, 1); HAL_Delay(100); // 等待校准完成 // 2. 计算灵敏度系数 float raw = CS5530_GetWeight(hcs, 10); // 取10次平均 hcs->scale_factor = known_weight / raw; }检查错误 然后 CS5530_GetWeight改用整数 详尽注释

/** ************************************************************ * @file ringbuffer.c * @brief Loop buffer processing * @author Gizwits * @date 2017-07-19 * @version V03030000 * @copyright Gizwits * * @note Gizwits is only for smart hardware * Gizwits Smart Cloud for Smart Products * Links | Value Added | Open | Neutral | Safety | Own | Free | Ecology * www.gizwits.com * ***********************************************************/ #include "ringBuffer.h" #include "common.h" int8_t ICACHE_FLASH_ATTR rbCreate(rb_t* rb) { if(NULL == rb) { return -1; } rb->rbHead = rb->rbBuff; rb->rbTail = rb->rbBuff; return 0; } int8_t ICACHE_FLASH_ATTR rbDelete(rb_t* rb) { if(NULL == rb) { return -1; } rb->rbBuff = NULL; rb->rbHead = NULL; rb->rbTail = NULL; rb->rbCapacity = 0; return 0; } int32_t ICACHE_FLASH_ATTR rbCapacity(rb_t *rb) { if(NULL == rb) { return -1; } return rb->rbCapacity; } int32_t ICACHE_FLASH_ATTR rbCanRead(rb_t *rb) { if(NULL == rb) { return -1; } if (rb->rbHead == rb->rbTail) { return 0; } if (rb->rbHead < rb->rbTail) { return rb->rbTail - rb->rbHead; } return rbCapacity(rb) - (rb->rbHead - rb->rbTail); } int32_t ICACHE_FLASH_ATTR rbCanWrite(rb_t *rb) { if(NULL == rb) { return -1; } return rbCapacity(rb) - rbCanRead(rb); } int32_t ICACHE_FLASH_ATTR rbRead(rb_t *rb, void *data, size_t count) { int32_t copySz = 0; if(NULL == rb) { return -1; } if(NULL == data) { return -1; } if (rb->rbHead < rb->rbTail) { copySz = min(count, rbCanRead(rb)); memcpy(data, rb->rbHead, copySz); rb->rbHead += copySz; return copySz; } else { if (count < rbCapacity(rb)-(rb->rbHead - rb->rbBuff)) { copySz = count; memcpy(data, rb->rbHead, copySz); rb->rbHead += copySz; return copySz; } else { copySz = rbCapacity(rb) - (rb->rbHead - rb->rbBuff); memcpy(data, rb->rbHead, copySz); rb->rbHead = rb->rbBuff; copySz += rbRead(rb, (char*)data+copySz, count-copySz); return copySz; } } } int32_t ICACHE_FLASH_ATTR rbWrite(rb_t *rb, const void *data, size_t count) { int32_t tailAvailSz = 0; if((NULL == rb)||(NULL == data)) { return -1; } if (count >= rbCanWrite(rb)) { return -2; } if (rb->rbHead <= rb->rbTail) { tailAvailSz = rbCapacity(rb) - (rb->rbTail - rb->rbBuff); if (count <= tailAvailSz) { memcpy(rb->rbTail, data, count); rb->rbTail += count; if (rb->rbTail == rb->rbBuff+rbCapacity(rb)) { rb->rbTail = rb->rbBuff; } return count; } else { memcpy(rb->rbTail, data, tailAvailSz); rb->rbTail = rb->rbBuff; return tailAvailSz + rbWrite(rb, (char*)data+tailAvailSz, count-tailAvailSz); } } else { memcpy(rb->rbTail, data, count); rb->rbTail += count; return count; } } /** ************************************************************ * @file ringbuffer.h * @brief Loop buffer processing * @author Gizwits * @date 2017-07-19 * @version V03030000 * @copyright Gizwits * * @note Gizwits is only for smart hardware * Gizwits Smart Cloud for Smart Products * Links | Value Added | Open | Neutral | Safety | Own | Free | Ecology * www.gizwits.com * ***********************************************************/ #ifndef _GIZWITS_RING_BUFFER_H #define _GIZWITS_RING_BUFFER_H #ifdef __cplusplus extern "C" { #endif #include <stdint.h> #include <stdio.h> #include <stdlib.h> #include <string.h> #define min(a, b) (a)<(b)?(a):(b) ///< Calculate the minimum value #pragma pack(1) typedef struct { size_t rbCapacity; uint8_t *rbHead; uint8_t *rbTail; uint8_t *rbBuff; }rb_t; #pragma pack() int8_t rbCreate(rb_t* rb); int8_t rbDelete(rb_t* rb); int32_t rbCapacity(rb_t *rb); int32_t rbCanRead(rb_t *rb); int32_t rbCanWrite(rb_t *rb); int32_t rbRead(rb_t *rb, void *data, size_t count); int32_t rbWrite(rb_t *rb, const void *data, size_t count); #ifdef __cplusplus } #endif #endif 1、Serial drive for Module communication,(1、Interrupt receive data to write to the ring buffer ;2、实现uartWrite() Serial send function) 2、Serial print function , printf()

#include "interrupt.h" #include "soc_C6748.h" #include "hw_syscfg0_C6748.h" #include "timer.h" #include "TL6748.h" #include "systick.h" /****************************************************************************/ /* */ /* 全局变量 */ /* */ /****************************************************************************/ static volatile unsigned int flagIsrCnt = 1; /****************************************************************************/ /* */ /* 宏定义 */ /* */ /****************************************************************************/ #define TMR_PERIOD_LSB32 0x5DC0 #define TMR_PERIOD_MSB32 0x0 /****************************************************************************/ /* */ /* 函数声明 */ /* */ /****************************************************************************/ void (*pfnCallbackHandler)(void); /****************************************************************************/ /* */ /* 定时器中断服务函数 */ /* */ /****************************************************************************/ static void TimerTickIsr(void) { TimerIntDisable(SOC_TMR_0_REGS, TMR_INT_TMR34_NON_CAPT_MODE); IntEventClear(SYS_INT_T64P0_TINT34); TimerIntStatusClear(SOC_TMR_0_REGS, TMR_INT_TMR34_NON_CAPT_MODE); pfnCallbackHandler(); TimerIntEnable(SOC_TMR_0_REGS, TMR_INT_TMR34_NON_CAPT_MODE); } /****************************************************************************/ /* */ /* 定时器中断初始化 */ /* */ /****************************************************************************/ void TimerTickConfigure(void (*pfnHandler)(void)) { pfnCallbackHandler = pfnHandler; TimerConfigure(SOC_TMR_0_REGS, TMR_CFG_32BIT_UNCH_CLK_BOTH_INT); IntRegister(C674X_MASK_INT11, TimerTickIsr); IntEventMap(C674X_MASK_INT11, SYS_INT_T64P0_TINT34); IntEnable(C674X_MASK_INT11); TimerIntEnable(SOC_TMR_0_REGS, TMR_INT_TMR34_NON_CAPT_MODE); } /****************************************************************************/ /* */ /* 定时器初始化 */ /* */ /****************************************************************************/ void TimerTickPeriodSet(unsigned int milliSec) { TimerPeriodSet(SOC_TMR_0_REGS, TMR_TIMER34, (milliSec * TMR_PERIOD_LSB32)); TimerReloadSet(SOC_TMR_0_REGS, TMR_TIMER34, (milliSec * TMR_PERIOD_LSB32)); } /****************************************************************************/ /* */ /* 定时器启动 */ /* */ /****************************************************************************/ void TimerTickEnable(void) { TimerEnable(SOC_TMR_0_REGS, TMR_TIMER34, TMR_ENABLE_CONTRELOAD); } /****************************************************************************/ /* */ /* 定时器停止 */ /* */ /****************************************************************************/ void TimerTickDisable(void) { TimerDisable(SOC_TMR_0_REGS, TMR_TIMER34); } 把这个.c文件生成对应的.h文件

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