Paging Basics and VAT

Paging is a smart memory management technique that keeps memory flexible, efficient, and scalable. Memory works like a hotel—each room (frame) is the same size, and guests (pages) can occupy any available room without worrying about being next to each other. Paging solves several key problems:

• No External Fragmentation: Programs don’t need contiguous memory blocks; pages can fit into any free frame.
• Flexible Allocation: Only the required pages are loaded into RAM, while inactive ones remain on disk.
• Supports Virtual Memory: Allows programs larger than physical RAM to run smoothly.
• Simplifies Memory Management: Fixed-size pages and frames make allocation predictable and efficient.

Virtual Memory

Think of virtual memory like a library lending system. You might only take a few books home at a time, but it feels like you have access to the whole library. Similarly, virtual memory gives a program the impression it has a large, continuous block of memory, while the physical RAM might be smaller or fragmented.

• Running large programs that exceed physical memory.
• Allowing multiple programs to share RAM efficiently.
• Simplifying memory management for the operating system.

Breaking Memory into Blocks

Both virtual and physical memory are divided into equal-sized blocks:

So, a program doesn’t need its entire memory in one contiguous area—it only needs the pages currently in use, while others can stay on disk until needed. This is what allows virtual memory to exist.

Note: Page size = Frame size. This ensures that any page can fit perfectly into any frame.

Virtual Address Structure

Whenever the CPU accesses memory, it generates a Virtual Address (VA). The VA points to data in the program’s address space, but it’s not a real RAM address yet.

A virtual address has two main parts:

Virtual Address (VA) = [ Page Number (P) | Page Offset (D) ]

• Page Number (P): Identifies which page the data is in.
• Page Offset (D): Identifies the exact byte or word within that page.

Example:

• Page size = 1 KB → 10 bits for offset (because 2¹⁰ = 1024 bytes)
• Remaining bits in the virtual address specify the page number.

Working of Address Translation

The CPU alone can’t access physical memory directly using virtual addresses. This is where the Memory Management Unit (MMU) comes in. It translates the virtual address to a physical address (PA) that points to actual RAM.

Step-by-Step Translation:

1. CPU generates a VA: “I want data at this location.”
2. MMU extracts the Page Number (P) from the VA.
3. MMU looks up the corresponding Frame Number (F) in the page table.
4. Physical Address (PA) is formed by combining the Frame Number (F) with the Page Offset (D).
5. The offset remains unchanged, ensuring the exact data within the frame is accessed.

Physical Address (PA) = [ Frame Number (F) | Page Offset (D) ]

Examples Walkthrough

Example 1: Small Memory Scenario

• Virtual Address Space: 8 KB
• Physical Memory: 4 KB
• Page Size: 1 KB

Calculations:

• Number of pages = 8 → 3 bits for page number
• Number of frames = 4 → 2 bits for frame number
• Offset = 10 bits (1 KB page)

Address Format:

VA = [3-bit Page Number | 10-bit Offset]
PA = [2-bit Frame Number | 10-bit Offset]

Scenario:
CPU wants data at VA: page 5, offset 200.

• MMU finds page 5 is in frame 2.
• Physical Address = frame 2 + offset 200 → CPU accesses correct location.

The program thinks it’s using page 5 continuously, but physically it could be anywhere in RAM.

Example 2: Larger Memory Scenario

• Virtual Address Space: 128 MB
• Physical Memory: 16 MB
• Page/Frame Size: 4 KB

Calculations:

• Number of pages = 128 MB / 4 KB = 32K → 15 bits for page number
• Number of frames = 16 MB / 4 KB = 4K → 12 bits for offset
• Each memory request uses these bits to translate VA → PA efficiently

This demonstrates how paging scales for larger programs, allowing the CPU to access memory efficiently without requiring contiguous physical memory.