Multiplying Floating Point Numbers Last Updated : 12 Jul, 2025 Comments Improve Suggest changes 6 Likes Like Report Prerequisite - IEEE Standard 754 Floating Point Numbers Problem:- Here, we have discussed an algorithm to multiply two floating point numbers, x and y. Algorithm:- Convert these numbers in scientific notation, so that we can explicitly represent hidden 1. Let ‘a’ be the exponent of x and ‘b’ be the exponent of y. Assume resulting exponent c = a+b. It can be adjusted after the next step. Multiply mantissa of x to mantissa of y. Call this result m. If m does not have a single 1 left of radix point, then adjust radix point so it does, and adjust exponent c to compensate. Add sign bits, mod 2, to get sign of resulting multiplication. Convert back to one byte floating point representation, truncating bits if needed. Note : Negative values are simple to take care of in floating point multiplication. Treat sign bit as 1 bit unsigned binary, add mod 2. This is the same as XORing the sign bit. Example :- Suppose you want to multiply following two numbers: Now, these are steps according to above algorithm: Given, A = 1.11 x 2^0 and B = 1.01 x 2^2 So, exponent c = a + b = 0 + 2 = 2 is the resulting exponent. Now, multiply 1.11 by 1.01, so result will be 10.0011 We need to normalize 10.0011 to 1.00011 and adjust exponent 1 by 3 appropriately. Resulting sign bit 0 (XOR) 0 = 0, means positive. Now, truncate and normalite it 1.00011 x 2^3 to 1.000 x 2^3. Therefore, resultant number is, Similarly, we can multiply other floating point numbers. Create Quiz Comment R rajkumarupadhyay515 Follow 6 Improve R rajkumarupadhyay515 Follow 6 Improve Article Tags : Write From Home Digital Logic Explore Number SystemsBase Conversions for Number System8 min read1's and 2's complement of a Binary Number8 min readBCD or Binary Coded Decimal6 min readError Detection Codes - Parity Bit4 min readBoolean Algebra and Logic GatesLogic Gates - Definition, Types, Uses8 min readBasic Conversion of Logic Gates6 min readRealization of Logic Gate Using Universal gates6 min readCanonical and Standard Form8 min readTypes of Integrated Circuits7 min readMinimization TechniquesMinimization of Boolean Functions4 min readIntroduction of K-Map (Karnaugh Map)4 min read5 variable K-Map in Digital Logic5 min readVarious Implicants in K-Map5 min readDon't Care (X) Conditions in K-Maps4 min readQuine McCluskey Method8 min readTwo Level Implementation of Logic Gates9 min readCombinational CircuitsHalf Adder3 min readFull Adder5 min readHalf Subtractor in Digital Logic4 min readFull Subtractor in Digital Logic3 min readParallel Adder and Parallel Subtractor5 min readSequential Binary Multiplier12 min readMultiplexers9 min readEvent Demultiplexer in Node.js3 min readBinary Decoder in Digital Logic5 min readEncoders5 min readCode Converters - Binary to/from Gray Code5 min readMagnitude Comparator in Digital Logic6 min readSequential CircuitsIntroduction of Sequential Circuits6 min readDifference between Combinational and Sequential Circuit4 min readLatches in Digital Logic6 min readFlip-Flop Types7 min readConversion of Flip-FlopConversion of S-R Flip-Flop into D Flip-Flop1 min readConversion of S-R Flip-Flop into T Flip-Flop1 min readConversion of J-K Flip-Flop into T Flip-Flop1 min readConversion of J-K Flip-Flop into D Flip-Flop4 min readRegister, Counter, and Memory UnitCounters in Digital Logic4 min readRipple Counter in Digital Logic3 min readRing Counter in Digital Logic7 min readGeneral Purpose Registers8 min readShift Registers in Digital Logic4 min readComputer Memory9 min readRandom Access Memory (RAM)11 min readRead Only Memory (ROM)8 min readLMNs and GATE PYQsLMN - Digital Electronics14 min readDigital Logic and Design - GATE CSE Previous Year Questions2 min read Like