Parallel processing – systolic arrays

The parallel processing approach diverges from traditional Von Neumann architecture. One such approach is the concept of Systolic processing using systolic arrays. 

A systolic array is a network of processors that rhythmically compute and pass data through the system. They derived their name from drawing an analogy to how blood rhythmically flows through a biological heart as the data flows from memory in a rhythmic fashion passing through many elements before it returns to memory. It is also an example of pipelining along with parallel computing. It was introduced in the 1970s and was used by Intel to make CMU’s iWarp processor in 1990. 

In a systolic array, there are a large number of identical simple processors or processing elements(PEs) that are arranged in a well-organized structure such as a linear or two-dimensional array. Each processing element is connected with the other PEs and has limited private storage. 

A Host station is often used for communication with the outside world in the network. 

Characteristics: 
 

1. Parallel Computing – 
   Many processes are carried out simultaneously. As the arrays have a non-centralized structure, parallel computing is implemented. 
    
2. Pipelinability – 
   It means that the array can achieve high speed. It shows a linear rate pipelinability. 
    
3. Synchronous evaluation – 
   The computation of data is timed by a global clock and then the data is passed through the network. The global clock synchronizes the array and has fixed-length clock cycles. 
    
4. Repeatability – 
   Most of the arrays have the repetition and interconnection of a single type of PE in the entire network. 
    
5. Spatial Locality – 
   The cells have a local communication interconnection. 
    
6. Temporal Locality – 
   One unit time delay is at least required for the transmission of signals from one cell to another. 
    
7. Modularity and regularity – 
   A systolic array consists of processing units that are modular and have homogeneous interconnection and the computer network can be extended indefinitely. 
    

Advantages of Systolic array –  

• High Degree of Parallelism: The arrays employ a high degree of parallelism and can sustain a very high throughput.
• Compact and Efficient: They are highly compact, robust, and efficient.
• Simple and Regular Data and Control Flow: Data and control flow are simple and regular.
   

Disadvantages of Systolic array – 

• Specialized and Inflexible: They are highly specialized and inflexible regarding the problems they can solve.
• Difficult to Build: They are difficult to build.
• Expensive: They are expensive

Systolic Array Applications

 Features of systolic arrays:

Array of Processing Elements: A systolic array consists of a large number of identical processing elements that are arranged in a regular grid. Each processing element is capable of performing a simple operation on its input data and passing the result to its neighbors.

Pipelined Processing: Systolic arrays are designed to operate in a pipelined manner, with data flowing through the array in a sequential manner. This allows for high throughput and low latency, as each processing element can begin working on the next piece of data as soon as it finishes its current task.

Local Communication: Communication between processing elements in a systolic array is typically done using local connections, which reduces the amount of data that needs to be transmitted over long distances. This can help to reduce latency and increase overall system performance.

Regular Structure: Systolic arrays have a regular, predictable structure, which makes them well-suited to hardware implementations. This regularity also makes it easier to design and optimize algorithms for systolic arrays.

Scalability: Systolic arrays can be easily scaled to handle larger data sets or more complex algorithms by adding more processing elements to the array. This makes them a flexible and adaptable architecture for a wide range of applications.

High Parallelism: The large number of processing elements in a systolic array allows for high levels of parallelism, which can significantly improve performance for tasks that are amenable to parallel processing.