GATE | CS | 2016 | Set 1 | Digital Logic | Combinational Circuit | Question 43

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Consider a carry lookahead adder for adding two n-bit integers, built using gates of fan-in at most two. The time to perform addition using this adder is

Θ(1)

Θ(Log (n))

Θ(√ n)

Θ(n)

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Digital Logic & Number representation,GATE-CS-2016 (Set 1),Combinational Circuits,Digital Logic GATE CS PYQ Quiz,Combinational Circuit PYQ quiz GATE CS
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Computer Organization and Architecture
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Digital Logic
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