COA - Quiz Day 10

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Question 1

The primary purpose of a system bus in a computer architecture is to:

  • Transfer data between CPU and power supply

  • Provide dedicated communication between two devices

  • Facilitate communication among CPU, memory, and I/O devices

  • Increase the clock speed of the processor

Question 2

Which of the following correctly matches the three main types of bus lines?

  • Address Bus – Bidirectional, Data Bus – Unidirectional, Control Bus – Unidirectional

  • Address Bus – Unidirectional, Data Bus – Bidirectional, Control Bus – Unidirectional

  • Address Bus – Bidirectional, Data Bus – Unidirectional, Control Bus – Bidirectional

  • All buses are bidirectional in modern computers

Question 3

In a system with multiple devices requesting the bus simultaneously, which component is responsible for granting access?

  • Program Counter

  • Bus Arbiter

  • Memory Management Unit

  • DMA Controller

Question 4

Which of the following would increase the data transfer rate of a system bus?

  • Decreasing bus width

  • Lowering clock frequency

  • Increasing bus width and clock speed

  • Reducing the number of devices on the bus

Question 5

In Programmed I/O, the CPU:

  • Executes I/O using interrupts only

  • Polls the I/O device continuously

  • Transfers data directly to memory

  • Is not involved in I/O operations

Question 6

Which of the following best describes Interrupt-Initiated I/O?

  • CPU polls each device until it's ready

  • CPU is interrupted by I/O device when it is ready

  • Data is transferred without CPU involvement

  • CPU disables all interrupts during data transfer

Question 7

Which statement about Direct Memory Access (DMA) is TRUE?

  • DMA transfers require the CPU to move each byte

  • DMA uses the system bus to transfer data without CPU intervention

  • DMA cannot work with RAM

  • DMA increases CPU workload

Question 8

During a DMA transfer, how does the DMA controller gain control of the system bus?

  • Through an I/O trap

  • By sending a HOLD signal to the CPU

  • By using an interrupt

  • By using the cache controller

Question 9

Which of the following shows the correct ascending order of CPU involvement in memory transfer mechanisms?

  • DMA < Interrupt-Initiated I/O < Programmed I/O

  • Programmed I/O < DMA < Interrupt-Initiated I/O

  • Interrupt-Initiated I/O < Programmed I/O < DMA

  • DMA < Programmed I/O < Interrupt-Initiated I/O

Question 10

Which of the following statements is TRUE regarding the efficiency of memory transfer mechanisms?

  • Programmed I/O is more efficient than DMA

  • DMA is best suited for large data transfers

  • Interrupt-Initiated I/O is unsuitable for real-time systems

  • Programmed I/O is ideal for multitasking systems

There are 10 questions to complete.

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