CPU control design and Interfaces

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Question 1

The amount of ROM needed to implement a 4 bit multiplier is

  • 64 bits

  • 128 bits

  • 1 Kbits

  • 2 Kbits

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Question 2

Consider the following sequence of micro-operations. 

     MBR ← PC 
     MAR ← X  
     PC ← Y  
     Memory ← MBR

Which one of the following is a possible operation performed by this sequence?

  • Instruction fetch

  • Operand fetch

  • Conditional branch

  • Initiation of interrupt service

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Question 3

The Memory Address Register

  • is a hardware memory device which denotes the location of the current instruction being executed.

  • is a group of electrical circuit, that performs the intent of instructions fetched from memory

  • contains the address of the memory location that is to be read from or stored into

  • contains a copy of the designated memory location specified by the MAR after a "read" or the new contents of the memory prior to a "write"

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Question 4

A cache memory needs an access time of 30 ns and main memory 150 ns, what is the average access time of CPU (assume hit ratio = 80%)?

  • 60

  • 30

  • 150

  • 70

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Question 5

Match the following : 4

  • (1)
  • (2)
  • (3)
  • (4)
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Question 6

How many 32K X 1 RAM chips are needed to provide a memory capacity of 256K-bytes?

  • 8

  • 32

  • 64

  • 128

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Question 7

The register that stores the bits required to mask the interrupts is ______.
  • Status register
  • Interrupt service register
  • Interrupt mask register
  • Interrupt request register
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Question 8

In ______ addressing mode, the operands are stored in the memory. The address of the corresponding memory location is given in a register which is specified in the instruction.
  • Register direct
  • Register indirect
  • Base indexed
  • Displacement
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Question 9

In the case of parallelization, Amdahl’s law states that if P is the proportion of a program that can be made parallel and (1 - P) is the proportion that cannot be parallelized, then the maximum speed-up that can be achieved by using N processors is:
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Question 10

In which addressing mode, the effective address of the operand is generated by adding a constant value to the content of a register?

  • Absolute mode

  • Indirect mode

  • Immediate mode

  • Index mode

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