Microprocessor

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Question 1

Answer the following: a. Draw the schematic of an 8085 based system that can be used to measure the width of a pulse. Assume that the pulse is given as a TTL compatible signal by the source which generates it. b.  Write the 8085 Assembly Language program to measure the width of the pulse. State all your assumption clearly.

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    Question 2

    Direction for questions 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3. 

     Instruction 	 Operation 	 Instruction Size(in words)
     MOV R1,5000; 	 R1 ¬ Memory[5000] 	 2
     MOV R2, (R1); 	 R2 ¬ Memory[(R1)] 	 1
     ADD R2, R3; 	 R2 ¬ R2 + R3 	         1
     MOV 6000, R2; 	 Memory [6000] ¬ R2 	 2
     HALT 	         Machine halts 	         1

    Consider that the memory is byte addressable with size 32 bits, and the program has been loaded starting from memory location 1000 (decimal). If an interrupt occurs while the CPU has been halted after executing the HALT instruction, the return address (in decimal) saved in the stack will be

    • 1007

    • 1020

    • 1024

    • 1028

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    Question 3

    Which of the following addressing modes are suitable for program relocation at run time ? 

    (i)   Absolute addressing
    (ii)  Based addressing
    (iii) Relative addressing
    (iv)  Indirect addressing

    • (i) and (iv)

    • (i) and (ii)

    • (ii) and (iii)

    • (i), (ii) and (iv)

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    Question 4

    The microinstructions stored in the control memory of a processor have a width of 26 bits. Each microinstruction is divided into three fields: a micro-operation field of 13 bits, a next address field (X), and a MUX select field (Y). There are 8 status bits in the inputs of the MUX.

    GATECS2004Q65

    How many bits are there in the X and Y fields, and what is the size of the control memory in number of words?

    • 10, 3, 1024

    • 8, 5, 256

    • 5, 8, 2048

    • 10, 3, 512

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    Question 5

    Directions for question 63 to 64: Consider the following program segment for a hypothetical CPU having three user registers R1, R2 and R3.

     Instruction 	 Operation 	 Instruction Size(in words)
     MOV R1,5000; 	 R1 ¬ Memory[5000] 	 2
     MOV R2, (R1); 	 R2 ¬ Memory[(R1)] 	 1
     ADD R2, R3; 	 R2 ¬ R2 + R3 	         1
     MOV 6000, R2; 	 Memory [6000] ¬ R2 	 2
     HALT 	         Machine halts 	         1

    Let the clock cycles required for various operations be as follows: Register to/ from memory transfer: 3 clock cycles ADD with both operands in register : 1 clock cycle Instruction fetch and decode : 2 clock cycles per word The total number of clock cycles required to execute the program is

    • 29

    • 24

    • 23

    • 20

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    Question 6

    Specify the contents of the accumulator and the status of the S, Z and CY flags when 8085 microprocessor performs addition of 87 H and 79 H.
    • 11, 1, 1, 1
    • 10, 0, 1, 0
    • 1, 1, 0, 0
    • 00, 0, 1, 1
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    Question 7

    IEEE 1394 is related to

    • RS-232

    • USB

    • Firewire

    • PCI

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    Question 8

    8085 microprocessor has _____ hardware interrupts.
    • 2
    • 3
    • 4
    • 5
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    Question 9

    Given the following statements: (A) Frequency Division Multiplexing is a technique that can be applied when the bandwidth of a link is greater than combined bandwidth of signals to be transmitted. (B) Wavelength Division Multiplexing (WDM) is an analog multiplexing Technique to combine optical signals. (C) WDM is a Digital Multiplexing Technique. (D) TDM is a Digital Multiplexing Technique. Which of the following is correct?
    • (A), (B), (C) and (D) are true.
    • (A), (B), (C) and (D) are false.
    • (A), (B) and (D) are false; (C) is true.
    • (A), (B) and (D) are True; (C) is false.
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    Question 10

    In 8086, the jump condition for the instruction JNBE is?

    • CF = 0 or ZF = 0

    • ZF = 0 and SF = 1

    • CF = 0 and ZF = 0

    • CF = 0

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    There are 57 questions to complete.

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